stm32l4x2_pac/tim15/
ccmr1_output.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::CCMR1_OUTPUT {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct OC1M_2R {
47    bits: bool,
48}
49impl OC1M_2R {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct OC1MR {
68    bits: u8,
69}
70impl OC1MR {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bits(&self) -> u8 {
74        self.bits
75    }
76}
77#[doc = r" Value of the field"]
78pub struct OC1PER {
79    bits: bool,
80}
81impl OC1PER {
82    #[doc = r" Value of the field as raw bits"]
83    #[inline]
84    pub fn bit(&self) -> bool {
85        self.bits
86    }
87    #[doc = r" Returns `true` if the bit is clear (0)"]
88    #[inline]
89    pub fn bit_is_clear(&self) -> bool {
90        !self.bit()
91    }
92    #[doc = r" Returns `true` if the bit is set (1)"]
93    #[inline]
94    pub fn bit_is_set(&self) -> bool {
95        self.bit()
96    }
97}
98#[doc = r" Value of the field"]
99pub struct OC1FER {
100    bits: bool,
101}
102impl OC1FER {
103    #[doc = r" Value of the field as raw bits"]
104    #[inline]
105    pub fn bit(&self) -> bool {
106        self.bits
107    }
108    #[doc = r" Returns `true` if the bit is clear (0)"]
109    #[inline]
110    pub fn bit_is_clear(&self) -> bool {
111        !self.bit()
112    }
113    #[doc = r" Returns `true` if the bit is set (1)"]
114    #[inline]
115    pub fn bit_is_set(&self) -> bool {
116        self.bit()
117    }
118}
119#[doc = r" Value of the field"]
120pub struct CC1SR {
121    bits: u8,
122}
123impl CC1SR {
124    #[doc = r" Value of the field as raw bits"]
125    #[inline]
126    pub fn bits(&self) -> u8 {
127        self.bits
128    }
129}
130#[doc = r" Proxy"]
131pub struct _OC1M_2W<'a> {
132    w: &'a mut W,
133}
134impl<'a> _OC1M_2W<'a> {
135    #[doc = r" Sets the field bit"]
136    pub fn set_bit(self) -> &'a mut W {
137        self.bit(true)
138    }
139    #[doc = r" Clears the field bit"]
140    pub fn clear_bit(self) -> &'a mut W {
141        self.bit(false)
142    }
143    #[doc = r" Writes raw bits to the field"]
144    #[inline]
145    pub fn bit(self, value: bool) -> &'a mut W {
146        const MASK: bool = true;
147        const OFFSET: u8 = 16;
148        self.w.bits &= !((MASK as u32) << OFFSET);
149        self.w.bits |= ((value & MASK) as u32) << OFFSET;
150        self.w
151    }
152}
153#[doc = r" Proxy"]
154pub struct _OC1MW<'a> {
155    w: &'a mut W,
156}
157impl<'a> _OC1MW<'a> {
158    #[doc = r" Writes raw bits to the field"]
159    #[inline]
160    pub unsafe fn bits(self, value: u8) -> &'a mut W {
161        const MASK: u8 = 7;
162        const OFFSET: u8 = 4;
163        self.w.bits &= !((MASK as u32) << OFFSET);
164        self.w.bits |= ((value & MASK) as u32) << OFFSET;
165        self.w
166    }
167}
168#[doc = r" Proxy"]
169pub struct _OC1PEW<'a> {
170    w: &'a mut W,
171}
172impl<'a> _OC1PEW<'a> {
173    #[doc = r" Sets the field bit"]
174    pub fn set_bit(self) -> &'a mut W {
175        self.bit(true)
176    }
177    #[doc = r" Clears the field bit"]
178    pub fn clear_bit(self) -> &'a mut W {
179        self.bit(false)
180    }
181    #[doc = r" Writes raw bits to the field"]
182    #[inline]
183    pub fn bit(self, value: bool) -> &'a mut W {
184        const MASK: bool = true;
185        const OFFSET: u8 = 3;
186        self.w.bits &= !((MASK as u32) << OFFSET);
187        self.w.bits |= ((value & MASK) as u32) << OFFSET;
188        self.w
189    }
190}
191#[doc = r" Proxy"]
192pub struct _OC1FEW<'a> {
193    w: &'a mut W,
194}
195impl<'a> _OC1FEW<'a> {
196    #[doc = r" Sets the field bit"]
197    pub fn set_bit(self) -> &'a mut W {
198        self.bit(true)
199    }
200    #[doc = r" Clears the field bit"]
201    pub fn clear_bit(self) -> &'a mut W {
202        self.bit(false)
203    }
204    #[doc = r" Writes raw bits to the field"]
205    #[inline]
206    pub fn bit(self, value: bool) -> &'a mut W {
207        const MASK: bool = true;
208        const OFFSET: u8 = 2;
209        self.w.bits &= !((MASK as u32) << OFFSET);
210        self.w.bits |= ((value & MASK) as u32) << OFFSET;
211        self.w
212    }
213}
214#[doc = r" Proxy"]
215pub struct _CC1SW<'a> {
216    w: &'a mut W,
217}
218impl<'a> _CC1SW<'a> {
219    #[doc = r" Writes raw bits to the field"]
220    #[inline]
221    pub unsafe fn bits(self, value: u8) -> &'a mut W {
222        const MASK: u8 = 3;
223        const OFFSET: u8 = 0;
224        self.w.bits &= !((MASK as u32) << OFFSET);
225        self.w.bits |= ((value & MASK) as u32) << OFFSET;
226        self.w
227    }
228}
229impl R {
230    #[doc = r" Value of the register as raw bits"]
231    #[inline]
232    pub fn bits(&self) -> u32 {
233        self.bits
234    }
235    #[doc = "Bit 16 - Output Compare 1 mode"]
236    #[inline]
237    pub fn oc1m_2(&self) -> OC1M_2R {
238        let bits = {
239            const MASK: bool = true;
240            const OFFSET: u8 = 16;
241            ((self.bits >> OFFSET) & MASK as u32) != 0
242        };
243        OC1M_2R { bits }
244    }
245    #[doc = "Bits 4:6 - Output Compare 1 mode"]
246    #[inline]
247    pub fn oc1m(&self) -> OC1MR {
248        let bits = {
249            const MASK: u8 = 7;
250            const OFFSET: u8 = 4;
251            ((self.bits >> OFFSET) & MASK as u32) as u8
252        };
253        OC1MR { bits }
254    }
255    #[doc = "Bit 3 - Output Compare 1 preload enable"]
256    #[inline]
257    pub fn oc1pe(&self) -> OC1PER {
258        let bits = {
259            const MASK: bool = true;
260            const OFFSET: u8 = 3;
261            ((self.bits >> OFFSET) & MASK as u32) != 0
262        };
263        OC1PER { bits }
264    }
265    #[doc = "Bit 2 - Output Compare 1 fast enable"]
266    #[inline]
267    pub fn oc1fe(&self) -> OC1FER {
268        let bits = {
269            const MASK: bool = true;
270            const OFFSET: u8 = 2;
271            ((self.bits >> OFFSET) & MASK as u32) != 0
272        };
273        OC1FER { bits }
274    }
275    #[doc = "Bits 0:1 - Capture/Compare 1 selection"]
276    #[inline]
277    pub fn cc1s(&self) -> CC1SR {
278        let bits = {
279            const MASK: u8 = 3;
280            const OFFSET: u8 = 0;
281            ((self.bits >> OFFSET) & MASK as u32) as u8
282        };
283        CC1SR { bits }
284    }
285}
286impl W {
287    #[doc = r" Reset value of the register"]
288    #[inline]
289    pub fn reset_value() -> W {
290        W { bits: 0 }
291    }
292    #[doc = r" Writes raw bits to the register"]
293    #[inline]
294    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
295        self.bits = bits;
296        self
297    }
298    #[doc = "Bit 16 - Output Compare 1 mode"]
299    #[inline]
300    pub fn oc1m_2(&mut self) -> _OC1M_2W {
301        _OC1M_2W { w: self }
302    }
303    #[doc = "Bits 4:6 - Output Compare 1 mode"]
304    #[inline]
305    pub fn oc1m(&mut self) -> _OC1MW {
306        _OC1MW { w: self }
307    }
308    #[doc = "Bit 3 - Output Compare 1 preload enable"]
309    #[inline]
310    pub fn oc1pe(&mut self) -> _OC1PEW {
311        _OC1PEW { w: self }
312    }
313    #[doc = "Bit 2 - Output Compare 1 fast enable"]
314    #[inline]
315    pub fn oc1fe(&mut self) -> _OC1FEW {
316        _OC1FEW { w: self }
317    }
318    #[doc = "Bits 0:1 - Capture/Compare 1 selection"]
319    #[inline]
320    pub fn cc1s(&mut self) -> _CC1SW {
321        _CC1SW { w: self }
322    }
323}
stm32l4x2_pac/tim15/ccmr1_output.rs

stm32l4x2_pac/tim15/
ccmr1_output.rs
