stm32l4x2_pac/tim1/
smcr.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::SMCR {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct ETPR {
47    bits: bool,
48}
49impl ETPR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct ECER {
68    bits: bool,
69}
70impl ECER {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bit(&self) -> bool {
74        self.bits
75    }
76    #[doc = r" Returns `true` if the bit is clear (0)"]
77    #[inline]
78    pub fn bit_is_clear(&self) -> bool {
79        !self.bit()
80    }
81    #[doc = r" Returns `true` if the bit is set (1)"]
82    #[inline]
83    pub fn bit_is_set(&self) -> bool {
84        self.bit()
85    }
86}
87#[doc = r" Value of the field"]
88pub struct ETPSR {
89    bits: u8,
90}
91impl ETPSR {
92    #[doc = r" Value of the field as raw bits"]
93    #[inline]
94    pub fn bits(&self) -> u8 {
95        self.bits
96    }
97}
98#[doc = r" Value of the field"]
99pub struct ETFR {
100    bits: u8,
101}
102impl ETFR {
103    #[doc = r" Value of the field as raw bits"]
104    #[inline]
105    pub fn bits(&self) -> u8 {
106        self.bits
107    }
108}
109#[doc = r" Value of the field"]
110pub struct MSMR {
111    bits: bool,
112}
113impl MSMR {
114    #[doc = r" Value of the field as raw bits"]
115    #[inline]
116    pub fn bit(&self) -> bool {
117        self.bits
118    }
119    #[doc = r" Returns `true` if the bit is clear (0)"]
120    #[inline]
121    pub fn bit_is_clear(&self) -> bool {
122        !self.bit()
123    }
124    #[doc = r" Returns `true` if the bit is set (1)"]
125    #[inline]
126    pub fn bit_is_set(&self) -> bool {
127        self.bit()
128    }
129}
130#[doc = r" Value of the field"]
131pub struct TSR {
132    bits: u8,
133}
134impl TSR {
135    #[doc = r" Value of the field as raw bits"]
136    #[inline]
137    pub fn bits(&self) -> u8 {
138        self.bits
139    }
140}
141#[doc = r" Value of the field"]
142pub struct SMSR {
143    bits: u8,
144}
145impl SMSR {
146    #[doc = r" Value of the field as raw bits"]
147    #[inline]
148    pub fn bits(&self) -> u8 {
149        self.bits
150    }
151}
152#[doc = r" Proxy"]
153pub struct _ETPW<'a> {
154    w: &'a mut W,
155}
156impl<'a> _ETPW<'a> {
157    #[doc = r" Sets the field bit"]
158    pub fn set_bit(self) -> &'a mut W {
159        self.bit(true)
160    }
161    #[doc = r" Clears the field bit"]
162    pub fn clear_bit(self) -> &'a mut W {
163        self.bit(false)
164    }
165    #[doc = r" Writes raw bits to the field"]
166    #[inline]
167    pub fn bit(self, value: bool) -> &'a mut W {
168        const MASK: bool = true;
169        const OFFSET: u8 = 15;
170        self.w.bits &= !((MASK as u32) << OFFSET);
171        self.w.bits |= ((value & MASK) as u32) << OFFSET;
172        self.w
173    }
174}
175#[doc = r" Proxy"]
176pub struct _ECEW<'a> {
177    w: &'a mut W,
178}
179impl<'a> _ECEW<'a> {
180    #[doc = r" Sets the field bit"]
181    pub fn set_bit(self) -> &'a mut W {
182        self.bit(true)
183    }
184    #[doc = r" Clears the field bit"]
185    pub fn clear_bit(self) -> &'a mut W {
186        self.bit(false)
187    }
188    #[doc = r" Writes raw bits to the field"]
189    #[inline]
190    pub fn bit(self, value: bool) -> &'a mut W {
191        const MASK: bool = true;
192        const OFFSET: u8 = 14;
193        self.w.bits &= !((MASK as u32) << OFFSET);
194        self.w.bits |= ((value & MASK) as u32) << OFFSET;
195        self.w
196    }
197}
198#[doc = r" Proxy"]
199pub struct _ETPSW<'a> {
200    w: &'a mut W,
201}
202impl<'a> _ETPSW<'a> {
203    #[doc = r" Writes raw bits to the field"]
204    #[inline]
205    pub unsafe fn bits(self, value: u8) -> &'a mut W {
206        const MASK: u8 = 3;
207        const OFFSET: u8 = 12;
208        self.w.bits &= !((MASK as u32) << OFFSET);
209        self.w.bits |= ((value & MASK) as u32) << OFFSET;
210        self.w
211    }
212}
213#[doc = r" Proxy"]
214pub struct _ETFW<'a> {
215    w: &'a mut W,
216}
217impl<'a> _ETFW<'a> {
218    #[doc = r" Writes raw bits to the field"]
219    #[inline]
220    pub unsafe fn bits(self, value: u8) -> &'a mut W {
221        const MASK: u8 = 15;
222        const OFFSET: u8 = 8;
223        self.w.bits &= !((MASK as u32) << OFFSET);
224        self.w.bits |= ((value & MASK) as u32) << OFFSET;
225        self.w
226    }
227}
228#[doc = r" Proxy"]
229pub struct _MSMW<'a> {
230    w: &'a mut W,
231}
232impl<'a> _MSMW<'a> {
233    #[doc = r" Sets the field bit"]
234    pub fn set_bit(self) -> &'a mut W {
235        self.bit(true)
236    }
237    #[doc = r" Clears the field bit"]
238    pub fn clear_bit(self) -> &'a mut W {
239        self.bit(false)
240    }
241    #[doc = r" Writes raw bits to the field"]
242    #[inline]
243    pub fn bit(self, value: bool) -> &'a mut W {
244        const MASK: bool = true;
245        const OFFSET: u8 = 7;
246        self.w.bits &= !((MASK as u32) << OFFSET);
247        self.w.bits |= ((value & MASK) as u32) << OFFSET;
248        self.w
249    }
250}
251#[doc = r" Proxy"]
252pub struct _TSW<'a> {
253    w: &'a mut W,
254}
255impl<'a> _TSW<'a> {
256    #[doc = r" Writes raw bits to the field"]
257    #[inline]
258    pub unsafe fn bits(self, value: u8) -> &'a mut W {
259        const MASK: u8 = 7;
260        const OFFSET: u8 = 4;
261        self.w.bits &= !((MASK as u32) << OFFSET);
262        self.w.bits |= ((value & MASK) as u32) << OFFSET;
263        self.w
264    }
265}
266#[doc = r" Proxy"]
267pub struct _SMSW<'a> {
268    w: &'a mut W,
269}
270impl<'a> _SMSW<'a> {
271    #[doc = r" Writes raw bits to the field"]
272    #[inline]
273    pub unsafe fn bits(self, value: u8) -> &'a mut W {
274        const MASK: u8 = 7;
275        const OFFSET: u8 = 0;
276        self.w.bits &= !((MASK as u32) << OFFSET);
277        self.w.bits |= ((value & MASK) as u32) << OFFSET;
278        self.w
279    }
280}
281impl R {
282    #[doc = r" Value of the register as raw bits"]
283    #[inline]
284    pub fn bits(&self) -> u32 {
285        self.bits
286    }
287    #[doc = "Bit 15 - External trigger polarity"]
288    #[inline]
289    pub fn etp(&self) -> ETPR {
290        let bits = {
291            const MASK: bool = true;
292            const OFFSET: u8 = 15;
293            ((self.bits >> OFFSET) & MASK as u32) != 0
294        };
295        ETPR { bits }
296    }
297    #[doc = "Bit 14 - External clock enable"]
298    #[inline]
299    pub fn ece(&self) -> ECER {
300        let bits = {
301            const MASK: bool = true;
302            const OFFSET: u8 = 14;
303            ((self.bits >> OFFSET) & MASK as u32) != 0
304        };
305        ECER { bits }
306    }
307    #[doc = "Bits 12:13 - External trigger prescaler"]
308    #[inline]
309    pub fn etps(&self) -> ETPSR {
310        let bits = {
311            const MASK: u8 = 3;
312            const OFFSET: u8 = 12;
313            ((self.bits >> OFFSET) & MASK as u32) as u8
314        };
315        ETPSR { bits }
316    }
317    #[doc = "Bits 8:11 - External trigger filter"]
318    #[inline]
319    pub fn etf(&self) -> ETFR {
320        let bits = {
321            const MASK: u8 = 15;
322            const OFFSET: u8 = 8;
323            ((self.bits >> OFFSET) & MASK as u32) as u8
324        };
325        ETFR { bits }
326    }
327    #[doc = "Bit 7 - Master/Slave mode"]
328    #[inline]
329    pub fn msm(&self) -> MSMR {
330        let bits = {
331            const MASK: bool = true;
332            const OFFSET: u8 = 7;
333            ((self.bits >> OFFSET) & MASK as u32) != 0
334        };
335        MSMR { bits }
336    }
337    #[doc = "Bits 4:6 - Trigger selection"]
338    #[inline]
339    pub fn ts(&self) -> TSR {
340        let bits = {
341            const MASK: u8 = 7;
342            const OFFSET: u8 = 4;
343            ((self.bits >> OFFSET) & MASK as u32) as u8
344        };
345        TSR { bits }
346    }
347    #[doc = "Bits 0:2 - Slave mode selection"]
348    #[inline]
349    pub fn sms(&self) -> SMSR {
350        let bits = {
351            const MASK: u8 = 7;
352            const OFFSET: u8 = 0;
353            ((self.bits >> OFFSET) & MASK as u32) as u8
354        };
355        SMSR { bits }
356    }
357}
358impl W {
359    #[doc = r" Reset value of the register"]
360    #[inline]
361    pub fn reset_value() -> W {
362        W { bits: 0 }
363    }
364    #[doc = r" Writes raw bits to the register"]
365    #[inline]
366    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
367        self.bits = bits;
368        self
369    }
370    #[doc = "Bit 15 - External trigger polarity"]
371    #[inline]
372    pub fn etp(&mut self) -> _ETPW {
373        _ETPW { w: self }
374    }
375    #[doc = "Bit 14 - External clock enable"]
376    #[inline]
377    pub fn ece(&mut self) -> _ECEW {
378        _ECEW { w: self }
379    }
380    #[doc = "Bits 12:13 - External trigger prescaler"]
381    #[inline]
382    pub fn etps(&mut self) -> _ETPSW {
383        _ETPSW { w: self }
384    }
385    #[doc = "Bits 8:11 - External trigger filter"]
386    #[inline]
387    pub fn etf(&mut self) -> _ETFW {
388        _ETFW { w: self }
389    }
390    #[doc = "Bit 7 - Master/Slave mode"]
391    #[inline]
392    pub fn msm(&mut self) -> _MSMW {
393        _MSMW { w: self }
394    }
395    #[doc = "Bits 4:6 - Trigger selection"]
396    #[inline]
397    pub fn ts(&mut self) -> _TSW {
398        _TSW { w: self }
399    }
400    #[doc = "Bits 0:2 - Slave mode selection"]
401    #[inline]
402    pub fn sms(&mut self) -> _SMSW {
403        _SMSW { w: self }
404    }
405}
stm32l4x2_pac/tim1/smcr.rs

stm32l4x2_pac/tim1/
smcr.rs
