1#[doc = r" Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - control register 1"]
5 pub cr1: CR1,
6 #[doc = "0x04 - control register 2"]
7 pub cr2: CR2,
8 #[doc = "0x08 - slave mode control register"]
9 pub smcr: SMCR,
10 #[doc = "0x0c - DMA/Interrupt enable register"]
11 pub dier: DIER,
12 #[doc = "0x10 - status register"]
13 pub sr: SR,
14 #[doc = "0x14 - event generation register"]
15 pub egr: EGR,
16 #[doc = "0x18 - capture/compare mode register 1 (output mode)"]
17 pub ccmr1_output: CCMR1_OUTPUT,
18 #[doc = "0x1c - capture/compare mode register 2 (output mode)"]
19 pub ccmr2_output: CCMR2_OUTPUT,
20 #[doc = "0x20 - capture/compare enable register"]
21 pub ccer: CCER,
22 #[doc = "0x24 - counter"]
23 pub cnt: CNT,
24 #[doc = "0x28 - prescaler"]
25 pub psc: PSC,
26 #[doc = "0x2c - auto-reload register"]
27 pub arr: ARR,
28 #[doc = "0x30 - repetition counter register"]
29 pub rcr: RCR,
30 #[doc = "0x34 - capture/compare register 1"]
31 pub ccr1: CCR,
32 #[doc = "0x38 - capture/compare register 1"]
33 pub ccr2: CCR,
34 #[doc = "0x3c - capture/compare register 1"]
35 pub ccr3: CCR,
36 #[doc = "0x40 - capture/compare register 1"]
37 pub ccr4: CCR,
38 #[doc = "0x44 - break and dead-time register"]
39 pub bdtr: BDTR,
40 #[doc = "0x48 - DMA control register"]
41 pub dcr: DCR,
42 #[doc = "0x4c - DMA address for full transfer"]
43 pub dmar: DMAR,
44 #[doc = "0x50 - DMA address for full transfer"]
45 pub or1: OR1,
46 #[doc = "0x54 - capture/compare mode register 2 (output mode)"]
47 pub ccmr3_output: CCMR3_OUTPUT,
48 #[doc = "0x58 - capture/compare register 4"]
49 pub ccr5: CCR5,
50 #[doc = "0x5c - capture/compare register 4"]
51 pub ccr6: CCR6,
52 #[doc = "0x60 - DMA address for full transfer"]
53 pub or2: OR2,
54 #[doc = "0x64 - DMA address for full transfer"]
55 pub or3: OR3,
56}
57#[doc = "control register 1"]
58pub struct CR1 {
59 register: ::vcell::VolatileCell<u32>,
60}
61#[doc = "control register 1"]
62pub mod cr1;
63#[doc = "control register 2"]
64pub struct CR2 {
65 register: ::vcell::VolatileCell<u32>,
66}
67#[doc = "control register 2"]
68pub mod cr2;
69#[doc = "slave mode control register"]
70pub struct SMCR {
71 register: ::vcell::VolatileCell<u32>,
72}
73#[doc = "slave mode control register"]
74pub mod smcr;
75#[doc = "DMA/Interrupt enable register"]
76pub struct DIER {
77 register: ::vcell::VolatileCell<u32>,
78}
79#[doc = "DMA/Interrupt enable register"]
80pub mod dier;
81#[doc = "status register"]
82pub struct SR {
83 register: ::vcell::VolatileCell<u32>,
84}
85#[doc = "status register"]
86pub mod sr;
87#[doc = "event generation register"]
88pub struct EGR {
89 register: ::vcell::VolatileCell<u32>,
90}
91#[doc = "event generation register"]
92pub mod egr;
93#[doc = "capture/compare mode register 1 (output mode)"]
94pub struct CCMR1_OUTPUT {
95 register: ::vcell::VolatileCell<u32>,
96}
97#[doc = "capture/compare mode register 1 (output mode)"]
98pub mod ccmr1_output;
99#[doc = "capture/compare mode register 1 (input mode)"]
100pub struct CCMR1_INPUT {
101 register: ::vcell::VolatileCell<u32>,
102}
103#[doc = "capture/compare mode register 1 (input mode)"]
104pub mod ccmr1_input;
105#[doc = "capture/compare mode register 2 (output mode)"]
106pub struct CCMR2_OUTPUT {
107 register: ::vcell::VolatileCell<u32>,
108}
109#[doc = "capture/compare mode register 2 (output mode)"]
110pub mod ccmr2_output;
111#[doc = "capture/compare mode register 2 (input mode)"]
112pub struct CCMR2_INPUT {
113 register: ::vcell::VolatileCell<u32>,
114}
115#[doc = "capture/compare mode register 2 (input mode)"]
116pub mod ccmr2_input;
117#[doc = "capture/compare enable register"]
118pub struct CCER {
119 register: ::vcell::VolatileCell<u32>,
120}
121#[doc = "capture/compare enable register"]
122pub mod ccer;
123#[doc = "counter"]
124pub struct CNT {
125 register: ::vcell::VolatileCell<u32>,
126}
127#[doc = "counter"]
128pub mod cnt;
129#[doc = "prescaler"]
130pub struct PSC {
131 register: ::vcell::VolatileCell<u32>,
132}
133#[doc = "prescaler"]
134pub mod psc;
135#[doc = "auto-reload register"]
136pub struct ARR {
137 register: ::vcell::VolatileCell<u32>,
138}
139#[doc = "auto-reload register"]
140pub mod arr;
141#[doc = "repetition counter register"]
142pub struct RCR {
143 register: ::vcell::VolatileCell<u32>,
144}
145#[doc = "repetition counter register"]
146pub mod rcr;
147#[doc = "capture/compare register 1"]
148pub struct CCR {
149 register: ::vcell::VolatileCell<u32>,
150}
151#[doc = "capture/compare register 1"]
152pub mod ccr;
153#[doc = "break and dead-time register"]
154pub struct BDTR {
155 register: ::vcell::VolatileCell<u32>,
156}
157#[doc = "break and dead-time register"]
158pub mod bdtr;
159#[doc = "DMA control register"]
160pub struct DCR {
161 register: ::vcell::VolatileCell<u32>,
162}
163#[doc = "DMA control register"]
164pub mod dcr;
165#[doc = "DMA address for full transfer"]
166pub struct DMAR {
167 register: ::vcell::VolatileCell<u32>,
168}
169#[doc = "DMA address for full transfer"]
170pub mod dmar;
171#[doc = "DMA address for full transfer"]
172pub struct OR1 {
173 register: ::vcell::VolatileCell<u32>,
174}
175#[doc = "DMA address for full transfer"]
176pub mod or1;
177#[doc = "capture/compare mode register 2 (output mode)"]
178pub struct CCMR3_OUTPUT {
179 register: ::vcell::VolatileCell<u32>,
180}
181#[doc = "capture/compare mode register 2 (output mode)"]
182pub mod ccmr3_output;
183#[doc = "capture/compare register 4"]
184pub struct CCR5 {
185 register: ::vcell::VolatileCell<u32>,
186}
187#[doc = "capture/compare register 4"]
188pub mod ccr5;
189#[doc = "capture/compare register 4"]
190pub struct CCR6 {
191 register: ::vcell::VolatileCell<u32>,
192}
193#[doc = "capture/compare register 4"]
194pub mod ccr6;
195#[doc = "DMA address for full transfer"]
196pub struct OR2 {
197 register: ::vcell::VolatileCell<u32>,
198}
199#[doc = "DMA address for full transfer"]
200pub mod or2;
201#[doc = "DMA address for full transfer"]
202pub struct OR3 {
203 register: ::vcell::VolatileCell<u32>,
204}
205#[doc = "DMA address for full transfer"]
206pub mod or3;