stm32l4x2_pac/syscfg/
exticr3.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::EXTICR3 {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct EXTI11R {
47    bits: u8,
48}
49impl EXTI11R {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bits(&self) -> u8 {
53        self.bits
54    }
55}
56#[doc = r" Value of the field"]
57pub struct EXTI10R {
58    bits: u8,
59}
60impl EXTI10R {
61    #[doc = r" Value of the field as raw bits"]
62    #[inline]
63    pub fn bits(&self) -> u8 {
64        self.bits
65    }
66}
67#[doc = r" Value of the field"]
68pub struct EXTI9R {
69    bits: u8,
70}
71impl EXTI9R {
72    #[doc = r" Value of the field as raw bits"]
73    #[inline]
74    pub fn bits(&self) -> u8 {
75        self.bits
76    }
77}
78#[doc = r" Value of the field"]
79pub struct EXTI8R {
80    bits: u8,
81}
82impl EXTI8R {
83    #[doc = r" Value of the field as raw bits"]
84    #[inline]
85    pub fn bits(&self) -> u8 {
86        self.bits
87    }
88}
89#[doc = r" Proxy"]
90pub struct _EXTI11W<'a> {
91    w: &'a mut W,
92}
93impl<'a> _EXTI11W<'a> {
94    #[doc = r" Writes raw bits to the field"]
95    #[inline]
96    pub unsafe fn bits(self, value: u8) -> &'a mut W {
97        const MASK: u8 = 7;
98        const OFFSET: u8 = 12;
99        self.w.bits &= !((MASK as u32) << OFFSET);
100        self.w.bits |= ((value & MASK) as u32) << OFFSET;
101        self.w
102    }
103}
104#[doc = r" Proxy"]
105pub struct _EXTI10W<'a> {
106    w: &'a mut W,
107}
108impl<'a> _EXTI10W<'a> {
109    #[doc = r" Writes raw bits to the field"]
110    #[inline]
111    pub unsafe fn bits(self, value: u8) -> &'a mut W {
112        const MASK: u8 = 7;
113        const OFFSET: u8 = 8;
114        self.w.bits &= !((MASK as u32) << OFFSET);
115        self.w.bits |= ((value & MASK) as u32) << OFFSET;
116        self.w
117    }
118}
119#[doc = r" Proxy"]
120pub struct _EXTI9W<'a> {
121    w: &'a mut W,
122}
123impl<'a> _EXTI9W<'a> {
124    #[doc = r" Writes raw bits to the field"]
125    #[inline]
126    pub unsafe fn bits(self, value: u8) -> &'a mut W {
127        const MASK: u8 = 7;
128        const OFFSET: u8 = 4;
129        self.w.bits &= !((MASK as u32) << OFFSET);
130        self.w.bits |= ((value & MASK) as u32) << OFFSET;
131        self.w
132    }
133}
134#[doc = r" Proxy"]
135pub struct _EXTI8W<'a> {
136    w: &'a mut W,
137}
138impl<'a> _EXTI8W<'a> {
139    #[doc = r" Writes raw bits to the field"]
140    #[inline]
141    pub unsafe fn bits(self, value: u8) -> &'a mut W {
142        const MASK: u8 = 7;
143        const OFFSET: u8 = 0;
144        self.w.bits &= !((MASK as u32) << OFFSET);
145        self.w.bits |= ((value & MASK) as u32) << OFFSET;
146        self.w
147    }
148}
149impl R {
150    #[doc = r" Value of the register as raw bits"]
151    #[inline]
152    pub fn bits(&self) -> u32 {
153        self.bits
154    }
155    #[doc = "Bits 12:14 - EXTI 11 configuration bits"]
156    #[inline]
157    pub fn exti11(&self) -> EXTI11R {
158        let bits = {
159            const MASK: u8 = 7;
160            const OFFSET: u8 = 12;
161            ((self.bits >> OFFSET) & MASK as u32) as u8
162        };
163        EXTI11R { bits }
164    }
165    #[doc = "Bits 8:10 - EXTI 10 configuration bits"]
166    #[inline]
167    pub fn exti10(&self) -> EXTI10R {
168        let bits = {
169            const MASK: u8 = 7;
170            const OFFSET: u8 = 8;
171            ((self.bits >> OFFSET) & MASK as u32) as u8
172        };
173        EXTI10R { bits }
174    }
175    #[doc = "Bits 4:6 - EXTI 9 configuration bits"]
176    #[inline]
177    pub fn exti9(&self) -> EXTI9R {
178        let bits = {
179            const MASK: u8 = 7;
180            const OFFSET: u8 = 4;
181            ((self.bits >> OFFSET) & MASK as u32) as u8
182        };
183        EXTI9R { bits }
184    }
185    #[doc = "Bits 0:2 - EXTI 8 configuration bits"]
186    #[inline]
187    pub fn exti8(&self) -> EXTI8R {
188        let bits = {
189            const MASK: u8 = 7;
190            const OFFSET: u8 = 0;
191            ((self.bits >> OFFSET) & MASK as u32) as u8
192        };
193        EXTI8R { bits }
194    }
195}
196impl W {
197    #[doc = r" Reset value of the register"]
198    #[inline]
199    pub fn reset_value() -> W {
200        W { bits: 0 }
201    }
202    #[doc = r" Writes raw bits to the register"]
203    #[inline]
204    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
205        self.bits = bits;
206        self
207    }
208    #[doc = "Bits 12:14 - EXTI 11 configuration bits"]
209    #[inline]
210    pub fn exti11(&mut self) -> _EXTI11W {
211        _EXTI11W { w: self }
212    }
213    #[doc = "Bits 8:10 - EXTI 10 configuration bits"]
214    #[inline]
215    pub fn exti10(&mut self) -> _EXTI10W {
216        _EXTI10W { w: self }
217    }
218    #[doc = "Bits 4:6 - EXTI 9 configuration bits"]
219    #[inline]
220    pub fn exti9(&mut self) -> _EXTI9W {
221        _EXTI9W { w: self }
222    }
223    #[doc = "Bits 0:2 - EXTI 8 configuration bits"]
224    #[inline]
225    pub fn exti8(&mut self) -> _EXTI8W {
226        _EXTI8W { w: self }
227    }
228}
stm32l4x2_pac/syscfg/exticr3.rs

stm32l4x2_pac/syscfg/
exticr3.rs
