1#[doc = r" Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - DFSDM Channel cluster: contains CHCFG?R1, CHCFG?R2, CHAWSCD?R, CHWDAT?R and CHDATIN?R registers"]
5 pub ch0: CH,
6 _reserved0: [u8; 12usize],
7 #[doc = "0x20 - DFSDM Channel cluster: contains CHCFG?R1, CHCFG?R2, CHAWSCD?R, CHWDAT?R and CHDATIN?R registers"]
8 pub ch1: CH,
9 _reserved1: [u8; 12usize],
10 #[doc = "0x40 - DFSDM Channel cluster: contains CHCFG?R1, CHCFG?R2, CHAWSCD?R, CHWDAT?R and CHDATIN?R registers"]
11 pub ch2: CH,
12 _reserved2: [u8; 12usize],
13 #[doc = "0x60 - DFSDM Channel cluster: contains CHCFG?R1, CHCFG?R2, CHAWSCD?R, CHWDAT?R and CHDATIN?R registers"]
14 pub ch3: CH,
15 _reserved3: [u8; 12usize],
16 #[doc = "0x80 - DFSDM Channel cluster: contains CHCFG?R1, CHCFG?R2, CHAWSCD?R, CHWDAT?R and CHDATIN?R registers"]
17 pub ch4: CH,
18 _reserved4: [u8; 12usize],
19 #[doc = "0xa0 - DFSDM Channel cluster: contains CHCFG?R1, CHCFG?R2, CHAWSCD?R, CHWDAT?R and CHDATIN?R registers"]
20 pub ch5: CH,
21 _reserved5: [u8; 12usize],
22 #[doc = "0xc0 - DFSDM Channel cluster: contains CHCFG?R1, CHCFG?R2, CHAWSCD?R, CHWDAT?R and CHDATIN?R registers"]
23 pub ch6: CH,
24 _reserved6: [u8; 12usize],
25 #[doc = "0xe0 - DFSDM Channel cluster: contains CHCFG?R1, CHCFG?R2, CHAWSCD?R, CHWDAT?R and CHDATIN?R registers"]
26 pub ch7: CH,
27 _reserved7: [u8; 12usize],
28 #[doc = "0x100 - Cluster FLT%s, containing DFSDM?_CR1, DFSDM?_ISR, DFSDM?_ICR, DFSDM?_JCHGR, DFSDM?_FCR, DFSDM?_JDATAR, DFSDM?_RDATAR, DFSDM?_AWHTR, DFSDM?_AWLTR, DFSDM?_AWSR, DFSDM?_AWCFR, DFSDM?_EXMAX, DFSDM?_EXMIN, DFSDM?_CNVTIMR"]
29 pub flt0: FLT,
30 _reserved8: [u8; 196usize],
31 #[doc = "0x200 - Cluster FLT%s, containing DFSDM?_CR1, DFSDM?_ISR, DFSDM?_ICR, DFSDM?_JCHGR, DFSDM?_FCR, DFSDM?_JDATAR, DFSDM?_RDATAR, DFSDM?_AWHTR, DFSDM?_AWLTR, DFSDM?_AWSR, DFSDM?_AWCFR, DFSDM?_EXMAX, DFSDM?_EXMIN, DFSDM?_CNVTIMR"]
32 pub flt1: FLT,
33 _reserved9: [u8; 196usize],
34 #[doc = "0x300 - Cluster FLT%s, containing DFSDM?_CR1, DFSDM?_ISR, DFSDM?_ICR, DFSDM?_JCHGR, DFSDM?_FCR, DFSDM?_JDATAR, DFSDM?_RDATAR, DFSDM?_AWHTR, DFSDM?_AWLTR, DFSDM?_AWSR, DFSDM?_AWCFR, DFSDM?_EXMAX, DFSDM?_EXMIN, DFSDM?_CNVTIMR"]
35 pub flt2: FLT,
36 _reserved10: [u8; 196usize],
37 #[doc = "0x400 - Cluster FLT%s, containing DFSDM?_CR1, DFSDM?_ISR, DFSDM?_ICR, DFSDM?_JCHGR, DFSDM?_FCR, DFSDM?_JDATAR, DFSDM?_RDATAR, DFSDM?_AWHTR, DFSDM?_AWLTR, DFSDM?_AWSR, DFSDM?_AWCFR, DFSDM?_EXMAX, DFSDM?_EXMIN, DFSDM?_CNVTIMR"]
38 pub flt3: FLT,
39}
40#[doc = r" Register block"]
41#[repr(C)]
42pub struct CH {
43 #[doc = "0x00 - channel configuration y register"]
44 pub cfgr1: self::ch::CFGR1,
45 #[doc = "0x04 - channel configuration y register"]
46 pub cfgr2: self::ch::CFGR2,
47 #[doc = "0x08 - analog watchdog and short-circuit detector register"]
48 pub awscdr: self::ch::AWSCDR,
49 #[doc = "0x0c - channel watchdog filter data register"]
50 pub wdatr: self::ch::WDATR,
51 #[doc = "0x10 - channel data input register"]
52 pub datinr: self::ch::DATINR,
53}
54#[doc = r" Register block"]
55#[doc = "DFSDM Channel cluster: contains CHCFG?R1, CHCFG?R2, CHAWSCD?R, CHWDAT?R and CHDATIN?R registers"]
56pub mod ch;
57#[doc = r" Register block"]
58#[repr(C)]
59pub struct FLT {
60 #[doc = "0x00 - control register 1"]
61 pub cr2: self::flt::CR2,
62 _reserved0: [u8; 4usize],
63 #[doc = "0x08 - interrupt and status register"]
64 pub isr: self::flt::ISR,
65 #[doc = "0x0c - interrupt flag clear register"]
66 pub icr: self::flt::ICR,
67 #[doc = "0x10 - injected channel group selection register"]
68 pub jchgr: self::flt::JCHGR,
69 #[doc = "0x14 - filter control register"]
70 pub fcr: self::flt::FCR,
71 #[doc = "0x18 - data register for injected group"]
72 pub jdatar: self::flt::JDATAR,
73 #[doc = "0x1c - data register for the regular channel"]
74 pub rdatar: self::flt::RDATAR,
75 #[doc = "0x20 - analog watchdog high threshold register"]
76 pub awhtr: self::flt::AWHTR,
77 #[doc = "0x24 - analog watchdog low threshold register"]
78 pub awltr: self::flt::AWLTR,
79 #[doc = "0x28 - analog watchdog status register"]
80 pub awsr: self::flt::AWSR,
81 #[doc = "0x2c - analog watchdog clear flag register"]
82 pub awcfr: self::flt::AWCFR,
83 #[doc = "0x30 - Extremes detector maximum register"]
84 pub exmax: self::flt::EXMAX,
85 #[doc = "0x34 - Extremes detector minimum register"]
86 pub exmin: self::flt::EXMIN,
87 #[doc = "0x38 - conversion timer register"]
88 pub cnvtimr: self::flt::CNVTIMR,
89}
90#[doc = r" Register block"]
91#[doc = "Cluster FLT%s, containing DFSDM?_CR1, DFSDM?_ISR, DFSDM?_ICR, DFSDM?_JCHGR, DFSDM?_FCR, DFSDM?_JDATAR, DFSDM?_RDATAR, DFSDM?_AWHTR, DFSDM?_AWLTR, DFSDM?_AWSR, DFSDM?_AWCFR, DFSDM?_EXMAX, DFSDM?_EXMIN, DFSDM?_CNVTIMR"]
92pub mod flt;
93#[doc = "control register 2"]
94pub struct DFSDM0_CR2 {
95 register: ::vcell::VolatileCell<u32>,
96}
97#[doc = "control register 2"]
98pub mod dfsdm0_cr2;
99#[doc = "control register 2"]
100pub struct DFSDM1_CR2 {
101 register: ::vcell::VolatileCell<u32>,
102}
103#[doc = "control register 2"]
104pub mod dfsdm1_cr2;
105#[doc = "control register 2"]
106pub struct DFSDM2_CR2 {
107 register: ::vcell::VolatileCell<u32>,
108}
109#[doc = "control register 2"]
110pub mod dfsdm2_cr2;
111#[doc = "control register 2"]
112pub struct DFSDM3_CR2 {
113 register: ::vcell::VolatileCell<u32>,
114}
115#[doc = "control register 2"]
116pub mod dfsdm3_cr2;