stm32l4x2_pac/dbgmcu/
cr.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::CR {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct DBG_SLEEPR {
47    bits: bool,
48}
49impl DBG_SLEEPR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct DBG_STOPR {
68    bits: bool,
69}
70impl DBG_STOPR {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bit(&self) -> bool {
74        self.bits
75    }
76    #[doc = r" Returns `true` if the bit is clear (0)"]
77    #[inline]
78    pub fn bit_is_clear(&self) -> bool {
79        !self.bit()
80    }
81    #[doc = r" Returns `true` if the bit is set (1)"]
82    #[inline]
83    pub fn bit_is_set(&self) -> bool {
84        self.bit()
85    }
86}
87#[doc = r" Value of the field"]
88pub struct DBG_STANDBYR {
89    bits: bool,
90}
91impl DBG_STANDBYR {
92    #[doc = r" Value of the field as raw bits"]
93    #[inline]
94    pub fn bit(&self) -> bool {
95        self.bits
96    }
97    #[doc = r" Returns `true` if the bit is clear (0)"]
98    #[inline]
99    pub fn bit_is_clear(&self) -> bool {
100        !self.bit()
101    }
102    #[doc = r" Returns `true` if the bit is set (1)"]
103    #[inline]
104    pub fn bit_is_set(&self) -> bool {
105        self.bit()
106    }
107}
108#[doc = r" Value of the field"]
109pub struct TRACE_IOENR {
110    bits: bool,
111}
112impl TRACE_IOENR {
113    #[doc = r" Value of the field as raw bits"]
114    #[inline]
115    pub fn bit(&self) -> bool {
116        self.bits
117    }
118    #[doc = r" Returns `true` if the bit is clear (0)"]
119    #[inline]
120    pub fn bit_is_clear(&self) -> bool {
121        !self.bit()
122    }
123    #[doc = r" Returns `true` if the bit is set (1)"]
124    #[inline]
125    pub fn bit_is_set(&self) -> bool {
126        self.bit()
127    }
128}
129#[doc = r" Value of the field"]
130pub struct TRACE_MODER {
131    bits: u8,
132}
133impl TRACE_MODER {
134    #[doc = r" Value of the field as raw bits"]
135    #[inline]
136    pub fn bits(&self) -> u8 {
137        self.bits
138    }
139}
140#[doc = r" Proxy"]
141pub struct _DBG_SLEEPW<'a> {
142    w: &'a mut W,
143}
144impl<'a> _DBG_SLEEPW<'a> {
145    #[doc = r" Sets the field bit"]
146    pub fn set_bit(self) -> &'a mut W {
147        self.bit(true)
148    }
149    #[doc = r" Clears the field bit"]
150    pub fn clear_bit(self) -> &'a mut W {
151        self.bit(false)
152    }
153    #[doc = r" Writes raw bits to the field"]
154    #[inline]
155    pub fn bit(self, value: bool) -> &'a mut W {
156        const MASK: bool = true;
157        const OFFSET: u8 = 0;
158        self.w.bits &= !((MASK as u32) << OFFSET);
159        self.w.bits |= ((value & MASK) as u32) << OFFSET;
160        self.w
161    }
162}
163#[doc = r" Proxy"]
164pub struct _DBG_STOPW<'a> {
165    w: &'a mut W,
166}
167impl<'a> _DBG_STOPW<'a> {
168    #[doc = r" Sets the field bit"]
169    pub fn set_bit(self) -> &'a mut W {
170        self.bit(true)
171    }
172    #[doc = r" Clears the field bit"]
173    pub fn clear_bit(self) -> &'a mut W {
174        self.bit(false)
175    }
176    #[doc = r" Writes raw bits to the field"]
177    #[inline]
178    pub fn bit(self, value: bool) -> &'a mut W {
179        const MASK: bool = true;
180        const OFFSET: u8 = 1;
181        self.w.bits &= !((MASK as u32) << OFFSET);
182        self.w.bits |= ((value & MASK) as u32) << OFFSET;
183        self.w
184    }
185}
186#[doc = r" Proxy"]
187pub struct _DBG_STANDBYW<'a> {
188    w: &'a mut W,
189}
190impl<'a> _DBG_STANDBYW<'a> {
191    #[doc = r" Sets the field bit"]
192    pub fn set_bit(self) -> &'a mut W {
193        self.bit(true)
194    }
195    #[doc = r" Clears the field bit"]
196    pub fn clear_bit(self) -> &'a mut W {
197        self.bit(false)
198    }
199    #[doc = r" Writes raw bits to the field"]
200    #[inline]
201    pub fn bit(self, value: bool) -> &'a mut W {
202        const MASK: bool = true;
203        const OFFSET: u8 = 2;
204        self.w.bits &= !((MASK as u32) << OFFSET);
205        self.w.bits |= ((value & MASK) as u32) << OFFSET;
206        self.w
207    }
208}
209#[doc = r" Proxy"]
210pub struct _TRACE_IOENW<'a> {
211    w: &'a mut W,
212}
213impl<'a> _TRACE_IOENW<'a> {
214    #[doc = r" Sets the field bit"]
215    pub fn set_bit(self) -> &'a mut W {
216        self.bit(true)
217    }
218    #[doc = r" Clears the field bit"]
219    pub fn clear_bit(self) -> &'a mut W {
220        self.bit(false)
221    }
222    #[doc = r" Writes raw bits to the field"]
223    #[inline]
224    pub fn bit(self, value: bool) -> &'a mut W {
225        const MASK: bool = true;
226        const OFFSET: u8 = 5;
227        self.w.bits &= !((MASK as u32) << OFFSET);
228        self.w.bits |= ((value & MASK) as u32) << OFFSET;
229        self.w
230    }
231}
232#[doc = r" Proxy"]
233pub struct _TRACE_MODEW<'a> {
234    w: &'a mut W,
235}
236impl<'a> _TRACE_MODEW<'a> {
237    #[doc = r" Writes raw bits to the field"]
238    #[inline]
239    pub unsafe fn bits(self, value: u8) -> &'a mut W {
240        const MASK: u8 = 3;
241        const OFFSET: u8 = 6;
242        self.w.bits &= !((MASK as u32) << OFFSET);
243        self.w.bits |= ((value & MASK) as u32) << OFFSET;
244        self.w
245    }
246}
247impl R {
248    #[doc = r" Value of the register as raw bits"]
249    #[inline]
250    pub fn bits(&self) -> u32 {
251        self.bits
252    }
253    #[doc = "Bit 0 - Debug Sleep mode"]
254    #[inline]
255    pub fn dbg_sleep(&self) -> DBG_SLEEPR {
256        let bits = {
257            const MASK: bool = true;
258            const OFFSET: u8 = 0;
259            ((self.bits >> OFFSET) & MASK as u32) != 0
260        };
261        DBG_SLEEPR { bits }
262    }
263    #[doc = "Bit 1 - Debug Stop mode"]
264    #[inline]
265    pub fn dbg_stop(&self) -> DBG_STOPR {
266        let bits = {
267            const MASK: bool = true;
268            const OFFSET: u8 = 1;
269            ((self.bits >> OFFSET) & MASK as u32) != 0
270        };
271        DBG_STOPR { bits }
272    }
273    #[doc = "Bit 2 - Debug Standby mode"]
274    #[inline]
275    pub fn dbg_standby(&self) -> DBG_STANDBYR {
276        let bits = {
277            const MASK: bool = true;
278            const OFFSET: u8 = 2;
279            ((self.bits >> OFFSET) & MASK as u32) != 0
280        };
281        DBG_STANDBYR { bits }
282    }
283    #[doc = "Bit 5 - Trace pin assignment control"]
284    #[inline]
285    pub fn trace_ioen(&self) -> TRACE_IOENR {
286        let bits = {
287            const MASK: bool = true;
288            const OFFSET: u8 = 5;
289            ((self.bits >> OFFSET) & MASK as u32) != 0
290        };
291        TRACE_IOENR { bits }
292    }
293    #[doc = "Bits 6:7 - Trace pin assignment control"]
294    #[inline]
295    pub fn trace_mode(&self) -> TRACE_MODER {
296        let bits = {
297            const MASK: u8 = 3;
298            const OFFSET: u8 = 6;
299            ((self.bits >> OFFSET) & MASK as u32) as u8
300        };
301        TRACE_MODER { bits }
302    }
303}
304impl W {
305    #[doc = r" Reset value of the register"]
306    #[inline]
307    pub fn reset_value() -> W {
308        W { bits: 0 }
309    }
310    #[doc = r" Writes raw bits to the register"]
311    #[inline]
312    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
313        self.bits = bits;
314        self
315    }
316    #[doc = "Bit 0 - Debug Sleep mode"]
317    #[inline]
318    pub fn dbg_sleep(&mut self) -> _DBG_SLEEPW {
319        _DBG_SLEEPW { w: self }
320    }
321    #[doc = "Bit 1 - Debug Stop mode"]
322    #[inline]
323    pub fn dbg_stop(&mut self) -> _DBG_STOPW {
324        _DBG_STOPW { w: self }
325    }
326    #[doc = "Bit 2 - Debug Standby mode"]
327    #[inline]
328    pub fn dbg_standby(&mut self) -> _DBG_STANDBYW {
329        _DBG_STANDBYW { w: self }
330    }
331    #[doc = "Bit 5 - Trace pin assignment control"]
332    #[inline]
333    pub fn trace_ioen(&mut self) -> _TRACE_IOENW {
334        _TRACE_IOENW { w: self }
335    }
336    #[doc = "Bits 6:7 - Trace pin assignment control"]
337    #[inline]
338    pub fn trace_mode(&mut self) -> _TRACE_MODEW {
339        _TRACE_MODEW { w: self }
340    }
341}
stm32l4x2_pac/dbgmcu/cr.rs

stm32l4x2_pac/dbgmcu/
cr.rs
