stm32l476/sai1/
asr.rs

1#[doc = "Register `ASR` reader"]
2pub type R = crate::R<AsrSpec>;
3#[doc = "Register `ASR` writer"]
4pub type W = crate::W<AsrSpec>;
5#[doc = "Field `OVRUDR` reader - Overrun / underrun"]
6pub type OvrudrR = crate::BitReader;
7#[doc = "Field `OVRUDR` writer - Overrun / underrun"]
8pub type OvrudrW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `MUTEDET` reader - Mute detection"]
10pub type MutedetR = crate::BitReader;
11#[doc = "Field `MUTEDET` writer - Mute detection"]
12pub type MutedetW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `WCKCFG` reader - Wrong clock configuration flag. This bit is read only"]
14pub type WckcfgR = crate::BitReader;
15#[doc = "Field `WCKCFG` writer - Wrong clock configuration flag. This bit is read only"]
16pub type WckcfgW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `FREQ` reader - FIFO request"]
18pub type FreqR = crate::BitReader;
19#[doc = "Field `FREQ` writer - FIFO request"]
20pub type FreqW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `CNRDY` reader - Codec not ready"]
22pub type CnrdyR = crate::BitReader;
23#[doc = "Field `CNRDY` writer - Codec not ready"]
24pub type CnrdyW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `AFSDET` reader - Anticipated frame synchronization detection"]
26pub type AfsdetR = crate::BitReader;
27#[doc = "Field `AFSDET` writer - Anticipated frame synchronization detection"]
28pub type AfsdetW<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `LFSDET` reader - Late frame synchronization detection"]
30pub type LfsdetR = crate::BitReader;
31#[doc = "Field `LFSDET` writer - Late frame synchronization detection"]
32pub type LfsdetW<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `FLVL` reader - FIFO level threshold"]
34pub type FlvlR = crate::FieldReader;
35#[doc = "Field `FLVL` writer - FIFO level threshold"]
36pub type FlvlW<'a, REG> = crate::FieldWriter<'a, REG, 3>;
37impl R {
38    #[doc = "Bit 0 - Overrun / underrun"]
39    #[inline(always)]
40    pub fn ovrudr(&self) -> OvrudrR {
41        OvrudrR::new((self.bits & 1) != 0)
42    }
43    #[doc = "Bit 1 - Mute detection"]
44    #[inline(always)]
45    pub fn mutedet(&self) -> MutedetR {
46        MutedetR::new(((self.bits >> 1) & 1) != 0)
47    }
48    #[doc = "Bit 2 - Wrong clock configuration flag. This bit is read only"]
49    #[inline(always)]
50    pub fn wckcfg(&self) -> WckcfgR {
51        WckcfgR::new(((self.bits >> 2) & 1) != 0)
52    }
53    #[doc = "Bit 3 - FIFO request"]
54    #[inline(always)]
55    pub fn freq(&self) -> FreqR {
56        FreqR::new(((self.bits >> 3) & 1) != 0)
57    }
58    #[doc = "Bit 4 - Codec not ready"]
59    #[inline(always)]
60    pub fn cnrdy(&self) -> CnrdyR {
61        CnrdyR::new(((self.bits >> 4) & 1) != 0)
62    }
63    #[doc = "Bit 5 - Anticipated frame synchronization detection"]
64    #[inline(always)]
65    pub fn afsdet(&self) -> AfsdetR {
66        AfsdetR::new(((self.bits >> 5) & 1) != 0)
67    }
68    #[doc = "Bit 6 - Late frame synchronization detection"]
69    #[inline(always)]
70    pub fn lfsdet(&self) -> LfsdetR {
71        LfsdetR::new(((self.bits >> 6) & 1) != 0)
72    }
73    #[doc = "Bits 16:18 - FIFO level threshold"]
74    #[inline(always)]
75    pub fn flvl(&self) -> FlvlR {
76        FlvlR::new(((self.bits >> 16) & 7) as u8)
77    }
78}
79impl W {
80    #[doc = "Bit 0 - Overrun / underrun"]
81    #[inline(always)]
82    pub fn ovrudr(&mut self) -> OvrudrW<AsrSpec> {
83        OvrudrW::new(self, 0)
84    }
85    #[doc = "Bit 1 - Mute detection"]
86    #[inline(always)]
87    pub fn mutedet(&mut self) -> MutedetW<AsrSpec> {
88        MutedetW::new(self, 1)
89    }
90    #[doc = "Bit 2 - Wrong clock configuration flag. This bit is read only"]
91    #[inline(always)]
92    pub fn wckcfg(&mut self) -> WckcfgW<AsrSpec> {
93        WckcfgW::new(self, 2)
94    }
95    #[doc = "Bit 3 - FIFO request"]
96    #[inline(always)]
97    pub fn freq(&mut self) -> FreqW<AsrSpec> {
98        FreqW::new(self, 3)
99    }
100    #[doc = "Bit 4 - Codec not ready"]
101    #[inline(always)]
102    pub fn cnrdy(&mut self) -> CnrdyW<AsrSpec> {
103        CnrdyW::new(self, 4)
104    }
105    #[doc = "Bit 5 - Anticipated frame synchronization detection"]
106    #[inline(always)]
107    pub fn afsdet(&mut self) -> AfsdetW<AsrSpec> {
108        AfsdetW::new(self, 5)
109    }
110    #[doc = "Bit 6 - Late frame synchronization detection"]
111    #[inline(always)]
112    pub fn lfsdet(&mut self) -> LfsdetW<AsrSpec> {
113        LfsdetW::new(self, 6)
114    }
115    #[doc = "Bits 16:18 - FIFO level threshold"]
116    #[inline(always)]
117    pub fn flvl(&mut self) -> FlvlW<AsrSpec> {
118        FlvlW::new(self, 16)
119    }
120}
121#[doc = "AStatus register\n\nYou can [`read`](crate::Reg::read) this register and get [`asr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`asr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
122pub struct AsrSpec;
123impl crate::RegisterSpec for AsrSpec {
124    type Ux = u32;
125}
126#[doc = "`read()` method returns [`asr::R`](R) reader structure"]
127impl crate::Readable for AsrSpec {}
128#[doc = "`write(|w| ..)` method takes [`asr::W`](W) writer structure"]
129impl crate::Writable for AsrSpec {
130    type Safety = crate::Unsafe;
131}
132#[doc = "`reset()` method sets ASR to value 0"]
133impl crate::Resettable for AsrSpec {}
stm32l476/sai1/asr.rs

stm32l476/sai1/
asr.rs
