stm32l476/adc1/
sqr2.rs

1#[doc = "Register `SQR2` reader"]
2pub type R = crate::R<Sqr2Spec>;
3#[doc = "Register `SQR2` writer"]
4pub type W = crate::W<Sqr2Spec>;
5#[doc = "Field `SQ5` reader - SQ5"]
6pub type Sq5R = crate::FieldReader;
7#[doc = "Field `SQ5` writer - SQ5"]
8pub type Sq5W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
9#[doc = "Field `SQ6` reader - SQ6"]
10pub type Sq6R = crate::FieldReader;
11#[doc = "Field `SQ6` writer - SQ6"]
12pub type Sq6W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
13#[doc = "Field `SQ7` reader - SQ7"]
14pub type Sq7R = crate::FieldReader;
15#[doc = "Field `SQ7` writer - SQ7"]
16pub type Sq7W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
17#[doc = "Field `SQ8` reader - SQ8"]
18pub type Sq8R = crate::FieldReader;
19#[doc = "Field `SQ8` writer - SQ8"]
20pub type Sq8W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
21#[doc = "Field `SQ9` reader - SQ9"]
22pub type Sq9R = crate::FieldReader;
23#[doc = "Field `SQ9` writer - SQ9"]
24pub type Sq9W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
25impl R {
26    #[doc = "Bits 0:4 - SQ5"]
27    #[inline(always)]
28    pub fn sq5(&self) -> Sq5R {
29        Sq5R::new((self.bits & 0x1f) as u8)
30    }
31    #[doc = "Bits 6:10 - SQ6"]
32    #[inline(always)]
33    pub fn sq6(&self) -> Sq6R {
34        Sq6R::new(((self.bits >> 6) & 0x1f) as u8)
35    }
36    #[doc = "Bits 12:16 - SQ7"]
37    #[inline(always)]
38    pub fn sq7(&self) -> Sq7R {
39        Sq7R::new(((self.bits >> 12) & 0x1f) as u8)
40    }
41    #[doc = "Bits 18:22 - SQ8"]
42    #[inline(always)]
43    pub fn sq8(&self) -> Sq8R {
44        Sq8R::new(((self.bits >> 18) & 0x1f) as u8)
45    }
46    #[doc = "Bits 24:28 - SQ9"]
47    #[inline(always)]
48    pub fn sq9(&self) -> Sq9R {
49        Sq9R::new(((self.bits >> 24) & 0x1f) as u8)
50    }
51}
52impl W {
53    #[doc = "Bits 0:4 - SQ5"]
54    #[inline(always)]
55    pub fn sq5(&mut self) -> Sq5W<Sqr2Spec> {
56        Sq5W::new(self, 0)
57    }
58    #[doc = "Bits 6:10 - SQ6"]
59    #[inline(always)]
60    pub fn sq6(&mut self) -> Sq6W<Sqr2Spec> {
61        Sq6W::new(self, 6)
62    }
63    #[doc = "Bits 12:16 - SQ7"]
64    #[inline(always)]
65    pub fn sq7(&mut self) -> Sq7W<Sqr2Spec> {
66        Sq7W::new(self, 12)
67    }
68    #[doc = "Bits 18:22 - SQ8"]
69    #[inline(always)]
70    pub fn sq8(&mut self) -> Sq8W<Sqr2Spec> {
71        Sq8W::new(self, 18)
72    }
73    #[doc = "Bits 24:28 - SQ9"]
74    #[inline(always)]
75    pub fn sq9(&mut self) -> Sq9W<Sqr2Spec> {
76        Sq9W::new(self, 24)
77    }
78}
79#[doc = "regular sequence register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`sqr2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sqr2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct Sqr2Spec;
81impl crate::RegisterSpec for Sqr2Spec {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`sqr2::R`](R) reader structure"]
85impl crate::Readable for Sqr2Spec {}
86#[doc = "`write(|w| ..)` method takes [`sqr2::W`](W) writer structure"]
87impl crate::Writable for Sqr2Spec {
88    type Safety = crate::Unsafe;
89}
90#[doc = "`reset()` method sets SQR2 to value 0"]
91impl crate::Resettable for Sqr2Spec {}
stm32l476/adc1/sqr2.rs

stm32l476/adc1/
sqr2.rs
