Struct stm32l4::stm32l4x5::fmc::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {

    pub bcr1: Reg<BCR1_SPEC>,
    pub btr1: Reg<BTR_SPEC>,
    pub bcr2: Reg<BCR_SPEC>,
    pub btr2: Reg<BTR_SPEC>,
    pub bcr3: Reg<BCR_SPEC>,
    pub btr3: Reg<BTR_SPEC>,
    pub bcr4: Reg<BCR_SPEC>,
    pub btr4: Reg<BTR_SPEC>,
    pub pcr: Reg<PCR_SPEC>,
    pub sr: Reg<SR_SPEC>,
    pub pmem: Reg<PMEM_SPEC>,
    pub patt: Reg<PATT_SPEC>,
    pub eccr: Reg<ECCR_SPEC>,
    pub bwtr1: Reg<BWTR_SPEC>,
    pub bwtr2: Reg<BWTR_SPEC>,
    pub bwtr3: Reg<BWTR_SPEC>,
    pub bwtr4: Reg<BWTR_SPEC>,
    /* private fields */
}

Register block

Fields

bcr1: Reg<BCR1_SPEC>

0x00 - SRAM/NOR-Flash chip-select control register 1

btr1: Reg<BTR_SPEC>

0x04 - SRAM/NOR-Flash chip-select timing register 1

bcr2: Reg<BCR_SPEC>

0x08 - SRAM/NOR-Flash chip-select control register 2

btr2: Reg<BTR_SPEC>

0x0c - SRAM/NOR-Flash chip-select timing register 1

bcr3: Reg<BCR_SPEC>

0x10 - SRAM/NOR-Flash chip-select control register 2

btr3: Reg<BTR_SPEC>

0x14 - SRAM/NOR-Flash chip-select timing register 1

bcr4: Reg<BCR_SPEC>

0x18 - SRAM/NOR-Flash chip-select control register 2

btr4: Reg<BTR_SPEC>

0x1c - SRAM/NOR-Flash chip-select timing register 1

pcr: Reg<PCR_SPEC>

0x80 - PC Card/NAND Flash control register 3

sr: Reg<SR_SPEC>

0x84 - FIFO status and interrupt register 3

pmem: Reg<PMEM_SPEC>

0x88 - Common memory space timing register 3

patt: Reg<PATT_SPEC>

0x8c - Attribute memory space timing register 3

eccr: Reg<ECCR_SPEC>

0x94 - ECC result register 3

bwtr1: Reg<BWTR_SPEC>

0x104 - SRAM/NOR-Flash write timing registers 1

bwtr2: Reg<BWTR_SPEC>

0x10c - SRAM/NOR-Flash write timing registers 1

bwtr3: Reg<BWTR_SPEC>

0x114 - SRAM/NOR-Flash write timing registers 1

bwtr4: Reg<BWTR_SPEC>

0x11c - SRAM/NOR-Flash write timing registers 1