Expand description
Field MODE1
writer - DAC Channel 1 mode
Implementations
sourceimpl<'a, const O: u8> MODE1_W<'a, O>
impl<'a, const O: u8> MODE1_W<'a, O>
sourcepub fn normal_pin_buffer(self) -> &'a mut W
pub fn normal_pin_buffer(self) -> &'a mut W
Normal mode - DAC channelx is connected to external pin with Buffer enabled
sourcepub fn normal_pin_chip_buffer(self) -> &'a mut W
pub fn normal_pin_chip_buffer(self) -> &'a mut W
Normal mode - DAC channelx is connected to external pin and to on chip peripherals with Buffer enabled
sourcepub fn normal_pin_no_buffer(self) -> &'a mut W
pub fn normal_pin_no_buffer(self) -> &'a mut W
Normal mode - DAC channelx is connected to external pin with Buffer disabled
sourcepub fn normal_chip_no_buffer(self) -> &'a mut W
pub fn normal_chip_no_buffer(self) -> &'a mut W
Normal mode - DAC channelx is connected to on chip peripherals with Buffer disabled
sourcepub fn shpin_buffer(self) -> &'a mut W
pub fn shpin_buffer(self) -> &'a mut W
S&H mode - DAC channelx is connected to external pin with Buffer enabled
sourcepub fn shpin_chip_buffer(self) -> &'a mut W
pub fn shpin_chip_buffer(self) -> &'a mut W
S&H mode - DAC channelx is connected to external pin and to on chip peripherals with Buffer enabled
sourcepub fn shpin_no_buffer(self) -> &'a mut W
pub fn shpin_no_buffer(self) -> &'a mut W
S&H mode - DAC channelx is connected to external pin and to on chip peripherals with Buffer disabled
sourcepub fn shchip_no_buffer(self) -> &'a mut W
pub fn shchip_no_buffer(self) -> &'a mut W
S&H mode - DAC channelx is connected to on chip peripherals with Buffer disabled