Struct stm32l4::stm32l4x1::rcc::pllcfgr::R

pub struct R(_);

Register PLLCFGR reader

Implementations

impl R

pub fn pllr(&self) -> PLLR_R

Bits 25:26 - Main PLL division factor for PLLCLK (system clock)

pub fn pllren(&self) -> PLLREN_R

Bit 24 - Main PLL PLLCLK output enable

pub fn pllq(&self) -> PLLQ_R

Bits 21:22 - Main PLL division factor for PLLUSB1CLK(48 MHz clock)

pub fn pllqen(&self) -> PLLQEN_R

Bit 20 - Main PLL PLLUSB1CLK output enable

pub fn pllp(&self) -> PLLP_R

Bit 17 - Main PLL division factor for PLLSAI3CLK (SAI1 and SAI2 clock)

pub fn pllpen(&self) -> PLLPEN_R

Bit 16 - Main PLL PLLSAI3CLK output enable

pub fn plln(&self) -> PLLN_R

Bits 8:14 - Main PLL multiplication factor for VCO

pub fn pllm(&self) -> PLLM_R

Bits 4:6 - Division factor for the main PLL and audio PLL (PLLSAI1 and PLLSAI2) input clock

pub fn pllsrc(&self) -> PLLSRC_R

Bits 0:1 - Main PLL, PLLSAI1 and PLLSAI2 entry clock source

pub fn pllpdiv(&self) -> PLLPDIV_R

Bits 27:31 - Main PLL division factor for PLLSAI2CLK

Methods from Deref<Target = R<PLLCFGR_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<PLLCFGR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<PLLCFGR_SPEC>> for R

fn from(reader: R<PLLCFGR_SPEC>) -> Self

Converts to this type from the input type.