Struct stm32l4::stm32l4x1::fpu::fpscr::W

pub struct W(_);

Register FPSCR writer

Implementations

impl W

pub fn ioc(&mut self) -> IOC_W<'_, 0>

Bit 0 - Invalid operation cumulative exception bit

pub fn dzc(&mut self) -> DZC_W<'_, 1>

Bit 1 - Division by zero cumulative exception bit.

pub fn ofc(&mut self) -> OFC_W<'_, 2>

Bit 2 - Overflow cumulative exception bit

pub fn ufc(&mut self) -> UFC_W<'_, 3>

Bit 3 - Underflow cumulative exception bit

pub fn ixc(&mut self) -> IXC_W<'_, 4>

Bit 4 - Inexact cumulative exception bit

pub fn idc(&mut self) -> IDC_W<'_, 7>

Bit 7 - Input denormal cumulative exception bit.

pub fn rmode(&mut self) -> RMODE_W<'_, 22>

Bits 22:23 - Rounding Mode control field

pub fn fz(&mut self) -> FZ_W<'_, 24>

Bit 24 - Flush-to-zero mode control bit:

pub fn dn(&mut self) -> DN_W<'_, 25>

Bit 25 - Default NaN mode control bit

pub fn ahp(&mut self) -> AHP_W<'_, 26>

Bit 26 - Alternative half-precision control bit

pub fn v(&mut self) -> V_W<'_, 28>

Bit 28 - Overflow condition code flag

pub fn c(&mut self) -> C_W<'_, 29>

Bit 29 - Carry condition code flag

pub fn z(&mut self) -> Z_W<'_, 30>

Bit 30 - Zero condition code flag

pub fn n(&mut self) -> N_W<'_, 31>

Bit 31 - Negative condition code flag

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<FPSCR_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<FPSCR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<FPSCR_SPEC>> for W

fn from(writer: W<FPSCR_SPEC>) -> Self

Converts to this type from the input type.