stm32l4/stm32l4x5/syscfg/
scsr.rs

1///Register `SCSR` reader
2pub type R = crate::R<SCSRrs>;
3///Register `SCSR` writer
4pub type W = crate::W<SCSRrs>;
5///Field `SRAM2ER` reader - SRAM2 Erase
6pub type SRAM2ER_R = crate::BitReader;
7///Field `SRAM2ER` writer - SRAM2 Erase
8pub type SRAM2ER_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `SRAM2BSY` reader - SRAM2 busy by erase operation
10pub type SRAM2BSY_R = crate::BitReader;
11impl R {
12    ///Bit 0 - SRAM2 Erase
13    #[inline(always)]
14    pub fn sram2er(&self) -> SRAM2ER_R {
15        SRAM2ER_R::new((self.bits & 1) != 0)
16    }
17    ///Bit 1 - SRAM2 busy by erase operation
18    #[inline(always)]
19    pub fn sram2bsy(&self) -> SRAM2BSY_R {
20        SRAM2BSY_R::new(((self.bits >> 1) & 1) != 0)
21    }
22}
23impl core::fmt::Debug for R {
24    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
25        f.debug_struct("SCSR")
26            .field("sram2bsy", &self.sram2bsy())
27            .field("sram2er", &self.sram2er())
28            .finish()
29    }
30}
31impl W {
32    ///Bit 0 - SRAM2 Erase
33    #[inline(always)]
34    pub fn sram2er(&mut self) -> SRAM2ER_W<SCSRrs> {
35        SRAM2ER_W::new(self, 0)
36    }
37}
38/**SCSR
39
40You can [`read`](crate::Reg::read) this register and get [`scsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
41
42See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L4x5.html#SYSCFG:SCSR)*/
43pub struct SCSRrs;
44impl crate::RegisterSpec for SCSRrs {
45    type Ux = u32;
46}
47///`read()` method returns [`scsr::R`](R) reader structure
48impl crate::Readable for SCSRrs {}
49///`write(|w| ..)` method takes [`scsr::W`](W) writer structure
50impl crate::Writable for SCSRrs {
51    type Safety = crate::Unsafe;
52}
53///`reset()` method sets SCSR to value 0
54impl crate::Resettable for SCSRrs {}
stm32l4/stm32l4x5/syscfg/scsr.rs

stm32l4/stm32l4x5/syscfg/
scsr.rs
