stm32l4/stm32l4x5/pwr/
pucrd.rs

1///Register `PUCRD` reader
2pub type R = crate::R<PUCRDrs>;
3///Register `PUCRD` writer
4pub type W = crate::W<PUCRDrs>;
5///Field `PU0` reader - Port D pull-up bit y (y=0..15)
6pub type PU0_R = crate::BitReader;
7///Field `PU0` writer - Port D pull-up bit y (y=0..15)
8pub type PU0_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `PU1` reader - Port D pull-up bit y (y=0..15)
10pub type PU1_R = crate::BitReader;
11///Field `PU1` writer - Port D pull-up bit y (y=0..15)
12pub type PU1_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `PU2` reader - Port D pull-up bit y (y=0..15)
14pub type PU2_R = crate::BitReader;
15///Field `PU2` writer - Port D pull-up bit y (y=0..15)
16pub type PU2_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `PU3` reader - Port D pull-up bit y (y=0..15)
18pub type PU3_R = crate::BitReader;
19///Field `PU3` writer - Port D pull-up bit y (y=0..15)
20pub type PU3_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `PU4` reader - Port D pull-up bit y (y=0..15)
22pub type PU4_R = crate::BitReader;
23///Field `PU4` writer - Port D pull-up bit y (y=0..15)
24pub type PU4_W<'a, REG> = crate::BitWriter<'a, REG>;
25///Field `PU5` reader - Port D pull-up bit y (y=0..15)
26pub type PU5_R = crate::BitReader;
27///Field `PU5` writer - Port D pull-up bit y (y=0..15)
28pub type PU5_W<'a, REG> = crate::BitWriter<'a, REG>;
29///Field `PU6` reader - Port D pull-up bit y (y=0..15)
30pub type PU6_R = crate::BitReader;
31///Field `PU6` writer - Port D pull-up bit y (y=0..15)
32pub type PU6_W<'a, REG> = crate::BitWriter<'a, REG>;
33///Field `PU7` reader - Port D pull-up bit y (y=0..15)
34pub type PU7_R = crate::BitReader;
35///Field `PU7` writer - Port D pull-up bit y (y=0..15)
36pub type PU7_W<'a, REG> = crate::BitWriter<'a, REG>;
37///Field `PU8` reader - Port D pull-up bit y (y=0..15)
38pub type PU8_R = crate::BitReader;
39///Field `PU8` writer - Port D pull-up bit y (y=0..15)
40pub type PU8_W<'a, REG> = crate::BitWriter<'a, REG>;
41///Field `PU9` reader - Port D pull-up bit y (y=0..15)
42pub type PU9_R = crate::BitReader;
43///Field `PU9` writer - Port D pull-up bit y (y=0..15)
44pub type PU9_W<'a, REG> = crate::BitWriter<'a, REG>;
45///Field `PU10` reader - Port D pull-up bit y (y=0..15)
46pub type PU10_R = crate::BitReader;
47///Field `PU10` writer - Port D pull-up bit y (y=0..15)
48pub type PU10_W<'a, REG> = crate::BitWriter<'a, REG>;
49///Field `PU11` reader - Port D pull-up bit y (y=0..15)
50pub type PU11_R = crate::BitReader;
51///Field `PU11` writer - Port D pull-up bit y (y=0..15)
52pub type PU11_W<'a, REG> = crate::BitWriter<'a, REG>;
53///Field `PU12` reader - Port D pull-up bit y (y=0..15)
54pub type PU12_R = crate::BitReader;
55///Field `PU12` writer - Port D pull-up bit y (y=0..15)
56pub type PU12_W<'a, REG> = crate::BitWriter<'a, REG>;
57///Field `PU13` reader - Port D pull-up bit y (y=0..15)
58pub type PU13_R = crate::BitReader;
59///Field `PU13` writer - Port D pull-up bit y (y=0..15)
60pub type PU13_W<'a, REG> = crate::BitWriter<'a, REG>;
61///Field `PU14` reader - Port D pull-up bit y (y=0..15)
62pub type PU14_R = crate::BitReader;
63///Field `PU14` writer - Port D pull-up bit y (y=0..15)
64pub type PU14_W<'a, REG> = crate::BitWriter<'a, REG>;
65///Field `PU15` reader - Port D pull-up bit y (y=0..15)
66pub type PU15_R = crate::BitReader;
67///Field `PU15` writer - Port D pull-up bit y (y=0..15)
68pub type PU15_W<'a, REG> = crate::BitWriter<'a, REG>;
69impl R {
70    ///Bit 0 - Port D pull-up bit y (y=0..15)
71    #[inline(always)]
72    pub fn pu0(&self) -> PU0_R {
73        PU0_R::new((self.bits & 1) != 0)
74    }
75    ///Bit 1 - Port D pull-up bit y (y=0..15)
76    #[inline(always)]
77    pub fn pu1(&self) -> PU1_R {
78        PU1_R::new(((self.bits >> 1) & 1) != 0)
79    }
80    ///Bit 2 - Port D pull-up bit y (y=0..15)
81    #[inline(always)]
82    pub fn pu2(&self) -> PU2_R {
83        PU2_R::new(((self.bits >> 2) & 1) != 0)
84    }
85    ///Bit 3 - Port D pull-up bit y (y=0..15)
86    #[inline(always)]
87    pub fn pu3(&self) -> PU3_R {
88        PU3_R::new(((self.bits >> 3) & 1) != 0)
89    }
90    ///Bit 4 - Port D pull-up bit y (y=0..15)
91    #[inline(always)]
92    pub fn pu4(&self) -> PU4_R {
93        PU4_R::new(((self.bits >> 4) & 1) != 0)
94    }
95    ///Bit 5 - Port D pull-up bit y (y=0..15)
96    #[inline(always)]
97    pub fn pu5(&self) -> PU5_R {
98        PU5_R::new(((self.bits >> 5) & 1) != 0)
99    }
100    ///Bit 6 - Port D pull-up bit y (y=0..15)
101    #[inline(always)]
102    pub fn pu6(&self) -> PU6_R {
103        PU6_R::new(((self.bits >> 6) & 1) != 0)
104    }
105    ///Bit 7 - Port D pull-up bit y (y=0..15)
106    #[inline(always)]
107    pub fn pu7(&self) -> PU7_R {
108        PU7_R::new(((self.bits >> 7) & 1) != 0)
109    }
110    ///Bit 8 - Port D pull-up bit y (y=0..15)
111    #[inline(always)]
112    pub fn pu8(&self) -> PU8_R {
113        PU8_R::new(((self.bits >> 8) & 1) != 0)
114    }
115    ///Bit 9 - Port D pull-up bit y (y=0..15)
116    #[inline(always)]
117    pub fn pu9(&self) -> PU9_R {
118        PU9_R::new(((self.bits >> 9) & 1) != 0)
119    }
120    ///Bit 10 - Port D pull-up bit y (y=0..15)
121    #[inline(always)]
122    pub fn pu10(&self) -> PU10_R {
123        PU10_R::new(((self.bits >> 10) & 1) != 0)
124    }
125    ///Bit 11 - Port D pull-up bit y (y=0..15)
126    #[inline(always)]
127    pub fn pu11(&self) -> PU11_R {
128        PU11_R::new(((self.bits >> 11) & 1) != 0)
129    }
130    ///Bit 12 - Port D pull-up bit y (y=0..15)
131    #[inline(always)]
132    pub fn pu12(&self) -> PU12_R {
133        PU12_R::new(((self.bits >> 12) & 1) != 0)
134    }
135    ///Bit 13 - Port D pull-up bit y (y=0..15)
136    #[inline(always)]
137    pub fn pu13(&self) -> PU13_R {
138        PU13_R::new(((self.bits >> 13) & 1) != 0)
139    }
140    ///Bit 14 - Port D pull-up bit y (y=0..15)
141    #[inline(always)]
142    pub fn pu14(&self) -> PU14_R {
143        PU14_R::new(((self.bits >> 14) & 1) != 0)
144    }
145    ///Bit 15 - Port D pull-up bit y (y=0..15)
146    #[inline(always)]
147    pub fn pu15(&self) -> PU15_R {
148        PU15_R::new(((self.bits >> 15) & 1) != 0)
149    }
150}
151impl core::fmt::Debug for R {
152    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
153        f.debug_struct("PUCRD")
154            .field("pu15", &self.pu15())
155            .field("pu14", &self.pu14())
156            .field("pu13", &self.pu13())
157            .field("pu12", &self.pu12())
158            .field("pu11", &self.pu11())
159            .field("pu10", &self.pu10())
160            .field("pu9", &self.pu9())
161            .field("pu8", &self.pu8())
162            .field("pu7", &self.pu7())
163            .field("pu6", &self.pu6())
164            .field("pu5", &self.pu5())
165            .field("pu4", &self.pu4())
166            .field("pu3", &self.pu3())
167            .field("pu2", &self.pu2())
168            .field("pu1", &self.pu1())
169            .field("pu0", &self.pu0())
170            .finish()
171    }
172}
173impl W {
174    ///Bit 0 - Port D pull-up bit y (y=0..15)
175    #[inline(always)]
176    pub fn pu0(&mut self) -> PU0_W<PUCRDrs> {
177        PU0_W::new(self, 0)
178    }
179    ///Bit 1 - Port D pull-up bit y (y=0..15)
180    #[inline(always)]
181    pub fn pu1(&mut self) -> PU1_W<PUCRDrs> {
182        PU1_W::new(self, 1)
183    }
184    ///Bit 2 - Port D pull-up bit y (y=0..15)
185    #[inline(always)]
186    pub fn pu2(&mut self) -> PU2_W<PUCRDrs> {
187        PU2_W::new(self, 2)
188    }
189    ///Bit 3 - Port D pull-up bit y (y=0..15)
190    #[inline(always)]
191    pub fn pu3(&mut self) -> PU3_W<PUCRDrs> {
192        PU3_W::new(self, 3)
193    }
194    ///Bit 4 - Port D pull-up bit y (y=0..15)
195    #[inline(always)]
196    pub fn pu4(&mut self) -> PU4_W<PUCRDrs> {
197        PU4_W::new(self, 4)
198    }
199    ///Bit 5 - Port D pull-up bit y (y=0..15)
200    #[inline(always)]
201    pub fn pu5(&mut self) -> PU5_W<PUCRDrs> {
202        PU5_W::new(self, 5)
203    }
204    ///Bit 6 - Port D pull-up bit y (y=0..15)
205    #[inline(always)]
206    pub fn pu6(&mut self) -> PU6_W<PUCRDrs> {
207        PU6_W::new(self, 6)
208    }
209    ///Bit 7 - Port D pull-up bit y (y=0..15)
210    #[inline(always)]
211    pub fn pu7(&mut self) -> PU7_W<PUCRDrs> {
212        PU7_W::new(self, 7)
213    }
214    ///Bit 8 - Port D pull-up bit y (y=0..15)
215    #[inline(always)]
216    pub fn pu8(&mut self) -> PU8_W<PUCRDrs> {
217        PU8_W::new(self, 8)
218    }
219    ///Bit 9 - Port D pull-up bit y (y=0..15)
220    #[inline(always)]
221    pub fn pu9(&mut self) -> PU9_W<PUCRDrs> {
222        PU9_W::new(self, 9)
223    }
224    ///Bit 10 - Port D pull-up bit y (y=0..15)
225    #[inline(always)]
226    pub fn pu10(&mut self) -> PU10_W<PUCRDrs> {
227        PU10_W::new(self, 10)
228    }
229    ///Bit 11 - Port D pull-up bit y (y=0..15)
230    #[inline(always)]
231    pub fn pu11(&mut self) -> PU11_W<PUCRDrs> {
232        PU11_W::new(self, 11)
233    }
234    ///Bit 12 - Port D pull-up bit y (y=0..15)
235    #[inline(always)]
236    pub fn pu12(&mut self) -> PU12_W<PUCRDrs> {
237        PU12_W::new(self, 12)
238    }
239    ///Bit 13 - Port D pull-up bit y (y=0..15)
240    #[inline(always)]
241    pub fn pu13(&mut self) -> PU13_W<PUCRDrs> {
242        PU13_W::new(self, 13)
243    }
244    ///Bit 14 - Port D pull-up bit y (y=0..15)
245    #[inline(always)]
246    pub fn pu14(&mut self) -> PU14_W<PUCRDrs> {
247        PU14_W::new(self, 14)
248    }
249    ///Bit 15 - Port D pull-up bit y (y=0..15)
250    #[inline(always)]
251    pub fn pu15(&mut self) -> PU15_W<PUCRDrs> {
252        PU15_W::new(self, 15)
253    }
254}
255/**Power Port D pull-up control register
256
257You can [`read`](crate::Reg::read) this register and get [`pucrd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pucrd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
258
259See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L4x5.html#PWR:PUCRD)*/
260pub struct PUCRDrs;
261impl crate::RegisterSpec for PUCRDrs {
262    type Ux = u32;
263}
264///`read()` method returns [`pucrd::R`](R) reader structure
265impl crate::Readable for PUCRDrs {}
266///`write(|w| ..)` method takes [`pucrd::W`](W) writer structure
267impl crate::Writable for PUCRDrs {
268    type Safety = crate::Unsafe;
269}
270///`reset()` method sets PUCRD to value 0
271impl crate::Resettable for PUCRDrs {}
stm32l4/stm32l4x5/pwr/pucrd.rs

stm32l4/stm32l4x5/pwr/
pucrd.rs
