stm32l4/stm32l4x5/lcd/
sr.rs

1///Register `SR` reader
2pub type R = crate::R<SRrs>;
3///Register `SR` writer
4pub type W = crate::W<SRrs>;
5///Field `ENS` reader - ENS
6pub type ENS_R = crate::BitReader;
7///Field `SOF` reader - Start of frame flag
8pub type SOF_R = crate::BitReader;
9///Field `UDR` writer - Update display request
10pub type UDR_W<'a, REG> = crate::BitWriter<'a, REG>;
11///Field `UDD` reader - Update Display Done
12pub type UDD_R = crate::BitReader;
13///Field `RDY` reader - Ready flag
14pub type RDY_R = crate::BitReader;
15///Field `FCRSF` reader - LCD Frame Control Register Synchronization flag
16pub type FCRSF_R = crate::BitReader;
17impl R {
18    ///Bit 0 - ENS
19    #[inline(always)]
20    pub fn ens(&self) -> ENS_R {
21        ENS_R::new((self.bits & 1) != 0)
22    }
23    ///Bit 1 - Start of frame flag
24    #[inline(always)]
25    pub fn sof(&self) -> SOF_R {
26        SOF_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    ///Bit 3 - Update Display Done
29    #[inline(always)]
30    pub fn udd(&self) -> UDD_R {
31        UDD_R::new(((self.bits >> 3) & 1) != 0)
32    }
33    ///Bit 4 - Ready flag
34    #[inline(always)]
35    pub fn rdy(&self) -> RDY_R {
36        RDY_R::new(((self.bits >> 4) & 1) != 0)
37    }
38    ///Bit 5 - LCD Frame Control Register Synchronization flag
39    #[inline(always)]
40    pub fn fcrsf(&self) -> FCRSF_R {
41        FCRSF_R::new(((self.bits >> 5) & 1) != 0)
42    }
43}
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("SR")
47            .field("fcrsf", &self.fcrsf())
48            .field("rdy", &self.rdy())
49            .field("udd", &self.udd())
50            .field("sof", &self.sof())
51            .field("ens", &self.ens())
52            .finish()
53    }
54}
55impl W {
56    ///Bit 2 - Update display request
57    #[inline(always)]
58    pub fn udr(&mut self) -> UDR_W<SRrs> {
59        UDR_W::new(self, 2)
60    }
61}
62/**status register
63
64You can [`read`](crate::Reg::read) this register and get [`sr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
65
66See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L4x5.html#LCD:SR)*/
67pub struct SRrs;
68impl crate::RegisterSpec for SRrs {
69    type Ux = u32;
70}
71///`read()` method returns [`sr::R`](R) reader structure
72impl crate::Readable for SRrs {}
73///`write(|w| ..)` method takes [`sr::W`](W) writer structure
74impl crate::Writable for SRrs {
75    type Safety = crate::Unsafe;
76}
77///`reset()` method sets SR to value 0x20
78impl crate::Resettable for SRrs {
79    const RESET_VALUE: u32 = 0x20;
80}
stm32l4/stm32l4x5/lcd/sr.rs

stm32l4/stm32l4x5/lcd/
sr.rs
