stm32l4/stm32l4x5/fmc/
pcr.rs

1///Register `PCR` reader
2pub type R = crate::R<PCRrs>;
3///Register `PCR` writer
4pub type W = crate::W<PCRrs>;
5/**PWAITEN
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum PWAITEN {
11    ///0: Wait feature disabled
12    Disabled = 0,
13    ///1: Wait feature enabled
14    Enabled = 1,
15}
16impl From<PWAITEN> for bool {
17    #[inline(always)]
18    fn from(variant: PWAITEN) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `PWAITEN` reader - PWAITEN
23pub type PWAITEN_R = crate::BitReader<PWAITEN>;
24impl PWAITEN_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> PWAITEN {
28        match self.bits {
29            false => PWAITEN::Disabled,
30            true => PWAITEN::Enabled,
31        }
32    }
33    ///Wait feature disabled
34    #[inline(always)]
35    pub fn is_disabled(&self) -> bool {
36        *self == PWAITEN::Disabled
37    }
38    ///Wait feature enabled
39    #[inline(always)]
40    pub fn is_enabled(&self) -> bool {
41        *self == PWAITEN::Enabled
42    }
43}
44///Field `PWAITEN` writer - PWAITEN
45pub type PWAITEN_W<'a, REG> = crate::BitWriter<'a, REG, PWAITEN>;
46impl<'a, REG> PWAITEN_W<'a, REG>
47where
48    REG: crate::Writable + crate::RegisterSpec,
49{
50    ///Wait feature disabled
51    #[inline(always)]
52    pub fn disabled(self) -> &'a mut crate::W<REG> {
53        self.variant(PWAITEN::Disabled)
54    }
55    ///Wait feature enabled
56    #[inline(always)]
57    pub fn enabled(self) -> &'a mut crate::W<REG> {
58        self.variant(PWAITEN::Enabled)
59    }
60}
61/**PBKEN
62
63Value on reset: 0*/
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum PBKEN {
67    ///0: Corresponding memory bank is disabled
68    Disabled = 0,
69    ///1: Corresponding memory bank is enabled
70    Enabled = 1,
71}
72impl From<PBKEN> for bool {
73    #[inline(always)]
74    fn from(variant: PBKEN) -> Self {
75        variant as u8 != 0
76    }
77}
78///Field `PBKEN` reader - PBKEN
79pub type PBKEN_R = crate::BitReader<PBKEN>;
80impl PBKEN_R {
81    ///Get enumerated values variant
82    #[inline(always)]
83    pub const fn variant(&self) -> PBKEN {
84        match self.bits {
85            false => PBKEN::Disabled,
86            true => PBKEN::Enabled,
87        }
88    }
89    ///Corresponding memory bank is disabled
90    #[inline(always)]
91    pub fn is_disabled(&self) -> bool {
92        *self == PBKEN::Disabled
93    }
94    ///Corresponding memory bank is enabled
95    #[inline(always)]
96    pub fn is_enabled(&self) -> bool {
97        *self == PBKEN::Enabled
98    }
99}
100///Field `PBKEN` writer - PBKEN
101pub type PBKEN_W<'a, REG> = crate::BitWriter<'a, REG, PBKEN>;
102impl<'a, REG> PBKEN_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    ///Corresponding memory bank is disabled
107    #[inline(always)]
108    pub fn disabled(self) -> &'a mut crate::W<REG> {
109        self.variant(PBKEN::Disabled)
110    }
111    ///Corresponding memory bank is enabled
112    #[inline(always)]
113    pub fn enabled(self) -> &'a mut crate::W<REG> {
114        self.variant(PBKEN::Enabled)
115    }
116}
117/**PTYP
118
119Value on reset: 1*/
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122pub enum PTYP {
123    ///1: NAND Flash
124    Nandflash = 1,
125}
126impl From<PTYP> for bool {
127    #[inline(always)]
128    fn from(variant: PTYP) -> Self {
129        variant as u8 != 0
130    }
131}
132///Field `PTYP` reader - PTYP
133pub type PTYP_R = crate::BitReader<PTYP>;
134impl PTYP_R {
135    ///Get enumerated values variant
136    #[inline(always)]
137    pub const fn variant(&self) -> Option<PTYP> {
138        match self.bits {
139            true => Some(PTYP::Nandflash),
140            _ => None,
141        }
142    }
143    ///NAND Flash
144    #[inline(always)]
145    pub fn is_nandflash(&self) -> bool {
146        *self == PTYP::Nandflash
147    }
148}
149///Field `PTYP` writer - PTYP
150pub type PTYP_W<'a, REG> = crate::BitWriter<'a, REG, PTYP>;
151impl<'a, REG> PTYP_W<'a, REG>
152where
153    REG: crate::Writable + crate::RegisterSpec,
154{
155    ///NAND Flash
156    #[inline(always)]
157    pub fn nandflash(self) -> &'a mut crate::W<REG> {
158        self.variant(PTYP::Nandflash)
159    }
160}
161/**PWID
162
163Value on reset: 1*/
164#[cfg_attr(feature = "defmt", derive(defmt::Format))]
165#[derive(Clone, Copy, Debug, PartialEq, Eq)]
166#[repr(u8)]
167pub enum PWID {
168    ///0: External memory device width 8 bits
169    Bits8 = 0,
170    ///1: External memory device width 16 bits
171    Bits16 = 1,
172}
173impl From<PWID> for u8 {
174    #[inline(always)]
175    fn from(variant: PWID) -> Self {
176        variant as _
177    }
178}
179impl crate::FieldSpec for PWID {
180    type Ux = u8;
181}
182impl crate::IsEnum for PWID {}
183///Field `PWID` reader - PWID
184pub type PWID_R = crate::FieldReader<PWID>;
185impl PWID_R {
186    ///Get enumerated values variant
187    #[inline(always)]
188    pub const fn variant(&self) -> Option<PWID> {
189        match self.bits {
190            0 => Some(PWID::Bits8),
191            1 => Some(PWID::Bits16),
192            _ => None,
193        }
194    }
195    ///External memory device width 8 bits
196    #[inline(always)]
197    pub fn is_bits8(&self) -> bool {
198        *self == PWID::Bits8
199    }
200    ///External memory device width 16 bits
201    #[inline(always)]
202    pub fn is_bits16(&self) -> bool {
203        *self == PWID::Bits16
204    }
205}
206///Field `PWID` writer - PWID
207pub type PWID_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PWID>;
208impl<'a, REG> PWID_W<'a, REG>
209where
210    REG: crate::Writable + crate::RegisterSpec,
211    REG::Ux: From<u8>,
212{
213    ///External memory device width 8 bits
214    #[inline(always)]
215    pub fn bits8(self) -> &'a mut crate::W<REG> {
216        self.variant(PWID::Bits8)
217    }
218    ///External memory device width 16 bits
219    #[inline(always)]
220    pub fn bits16(self) -> &'a mut crate::W<REG> {
221        self.variant(PWID::Bits16)
222    }
223}
224/**ECCEN
225
226Value on reset: 0*/
227#[cfg_attr(feature = "defmt", derive(defmt::Format))]
228#[derive(Clone, Copy, Debug, PartialEq, Eq)]
229pub enum ECCEN {
230    ///0: ECC logic is disabled and reset
231    Disabled = 0,
232    ///1: ECC logic is enabled
233    Enabled = 1,
234}
235impl From<ECCEN> for bool {
236    #[inline(always)]
237    fn from(variant: ECCEN) -> Self {
238        variant as u8 != 0
239    }
240}
241///Field `ECCEN` reader - ECCEN
242pub type ECCEN_R = crate::BitReader<ECCEN>;
243impl ECCEN_R {
244    ///Get enumerated values variant
245    #[inline(always)]
246    pub const fn variant(&self) -> ECCEN {
247        match self.bits {
248            false => ECCEN::Disabled,
249            true => ECCEN::Enabled,
250        }
251    }
252    ///ECC logic is disabled and reset
253    #[inline(always)]
254    pub fn is_disabled(&self) -> bool {
255        *self == ECCEN::Disabled
256    }
257    ///ECC logic is enabled
258    #[inline(always)]
259    pub fn is_enabled(&self) -> bool {
260        *self == ECCEN::Enabled
261    }
262}
263///Field `ECCEN` writer - ECCEN
264pub type ECCEN_W<'a, REG> = crate::BitWriter<'a, REG, ECCEN>;
265impl<'a, REG> ECCEN_W<'a, REG>
266where
267    REG: crate::Writable + crate::RegisterSpec,
268{
269    ///ECC logic is disabled and reset
270    #[inline(always)]
271    pub fn disabled(self) -> &'a mut crate::W<REG> {
272        self.variant(ECCEN::Disabled)
273    }
274    ///ECC logic is enabled
275    #[inline(always)]
276    pub fn enabled(self) -> &'a mut crate::W<REG> {
277        self.variant(ECCEN::Enabled)
278    }
279}
280///Field `TCLR` reader - TCLR
281pub type TCLR_R = crate::FieldReader;
282///Field `TCLR` writer - TCLR
283pub type TCLR_W<'a, REG> = crate::FieldWriter<'a, REG, 4, u8, crate::Safe>;
284///Field `TAR` reader - TAR
285pub type TAR_R = crate::FieldReader;
286///Field `TAR` writer - TAR
287pub type TAR_W<'a, REG> = crate::FieldWriter<'a, REG, 4, u8, crate::Safe>;
288/**ECCPS
289
290Value on reset: 0*/
291#[cfg_attr(feature = "defmt", derive(defmt::Format))]
292#[derive(Clone, Copy, Debug, PartialEq, Eq)]
293#[repr(u8)]
294pub enum ECCPS {
295    ///0: ECC page size 256 bytes
296    Bytes256 = 0,
297    ///1: ECC page size 512 bytes
298    Bytes512 = 1,
299    ///2: ECC page size 1024 bytes
300    Bytes1024 = 2,
301    ///3: ECC page size 2048 bytes
302    Bytes2048 = 3,
303    ///4: ECC page size 4096 bytes
304    Bytes4096 = 4,
305    ///5: ECC page size 8192 bytes
306    Bytes8192 = 5,
307}
308impl From<ECCPS> for u8 {
309    #[inline(always)]
310    fn from(variant: ECCPS) -> Self {
311        variant as _
312    }
313}
314impl crate::FieldSpec for ECCPS {
315    type Ux = u8;
316}
317impl crate::IsEnum for ECCPS {}
318///Field `ECCPS` reader - ECCPS
319pub type ECCPS_R = crate::FieldReader<ECCPS>;
320impl ECCPS_R {
321    ///Get enumerated values variant
322    #[inline(always)]
323    pub const fn variant(&self) -> Option<ECCPS> {
324        match self.bits {
325            0 => Some(ECCPS::Bytes256),
326            1 => Some(ECCPS::Bytes512),
327            2 => Some(ECCPS::Bytes1024),
328            3 => Some(ECCPS::Bytes2048),
329            4 => Some(ECCPS::Bytes4096),
330            5 => Some(ECCPS::Bytes8192),
331            _ => None,
332        }
333    }
334    ///ECC page size 256 bytes
335    #[inline(always)]
336    pub fn is_bytes256(&self) -> bool {
337        *self == ECCPS::Bytes256
338    }
339    ///ECC page size 512 bytes
340    #[inline(always)]
341    pub fn is_bytes512(&self) -> bool {
342        *self == ECCPS::Bytes512
343    }
344    ///ECC page size 1024 bytes
345    #[inline(always)]
346    pub fn is_bytes1024(&self) -> bool {
347        *self == ECCPS::Bytes1024
348    }
349    ///ECC page size 2048 bytes
350    #[inline(always)]
351    pub fn is_bytes2048(&self) -> bool {
352        *self == ECCPS::Bytes2048
353    }
354    ///ECC page size 4096 bytes
355    #[inline(always)]
356    pub fn is_bytes4096(&self) -> bool {
357        *self == ECCPS::Bytes4096
358    }
359    ///ECC page size 8192 bytes
360    #[inline(always)]
361    pub fn is_bytes8192(&self) -> bool {
362        *self == ECCPS::Bytes8192
363    }
364}
365///Field `ECCPS` writer - ECCPS
366pub type ECCPS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, ECCPS>;
367impl<'a, REG> ECCPS_W<'a, REG>
368where
369    REG: crate::Writable + crate::RegisterSpec,
370    REG::Ux: From<u8>,
371{
372    ///ECC page size 256 bytes
373    #[inline(always)]
374    pub fn bytes256(self) -> &'a mut crate::W<REG> {
375        self.variant(ECCPS::Bytes256)
376    }
377    ///ECC page size 512 bytes
378    #[inline(always)]
379    pub fn bytes512(self) -> &'a mut crate::W<REG> {
380        self.variant(ECCPS::Bytes512)
381    }
382    ///ECC page size 1024 bytes
383    #[inline(always)]
384    pub fn bytes1024(self) -> &'a mut crate::W<REG> {
385        self.variant(ECCPS::Bytes1024)
386    }
387    ///ECC page size 2048 bytes
388    #[inline(always)]
389    pub fn bytes2048(self) -> &'a mut crate::W<REG> {
390        self.variant(ECCPS::Bytes2048)
391    }
392    ///ECC page size 4096 bytes
393    #[inline(always)]
394    pub fn bytes4096(self) -> &'a mut crate::W<REG> {
395        self.variant(ECCPS::Bytes4096)
396    }
397    ///ECC page size 8192 bytes
398    #[inline(always)]
399    pub fn bytes8192(self) -> &'a mut crate::W<REG> {
400        self.variant(ECCPS::Bytes8192)
401    }
402}
403impl R {
404    ///Bit 1 - PWAITEN
405    #[inline(always)]
406    pub fn pwaiten(&self) -> PWAITEN_R {
407        PWAITEN_R::new(((self.bits >> 1) & 1) != 0)
408    }
409    ///Bit 2 - PBKEN
410    #[inline(always)]
411    pub fn pbken(&self) -> PBKEN_R {
412        PBKEN_R::new(((self.bits >> 2) & 1) != 0)
413    }
414    ///Bit 3 - PTYP
415    #[inline(always)]
416    pub fn ptyp(&self) -> PTYP_R {
417        PTYP_R::new(((self.bits >> 3) & 1) != 0)
418    }
419    ///Bits 4:5 - PWID
420    #[inline(always)]
421    pub fn pwid(&self) -> PWID_R {
422        PWID_R::new(((self.bits >> 4) & 3) as u8)
423    }
424    ///Bit 6 - ECCEN
425    #[inline(always)]
426    pub fn eccen(&self) -> ECCEN_R {
427        ECCEN_R::new(((self.bits >> 6) & 1) != 0)
428    }
429    ///Bits 9:12 - TCLR
430    #[inline(always)]
431    pub fn tclr(&self) -> TCLR_R {
432        TCLR_R::new(((self.bits >> 9) & 0x0f) as u8)
433    }
434    ///Bits 13:16 - TAR
435    #[inline(always)]
436    pub fn tar(&self) -> TAR_R {
437        TAR_R::new(((self.bits >> 13) & 0x0f) as u8)
438    }
439    ///Bits 17:19 - ECCPS
440    #[inline(always)]
441    pub fn eccps(&self) -> ECCPS_R {
442        ECCPS_R::new(((self.bits >> 17) & 7) as u8)
443    }
444}
445impl core::fmt::Debug for R {
446    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
447        f.debug_struct("PCR")
448            .field("eccps", &self.eccps())
449            .field("tar", &self.tar())
450            .field("tclr", &self.tclr())
451            .field("eccen", &self.eccen())
452            .field("pwid", &self.pwid())
453            .field("ptyp", &self.ptyp())
454            .field("pbken", &self.pbken())
455            .field("pwaiten", &self.pwaiten())
456            .finish()
457    }
458}
459impl W {
460    ///Bit 1 - PWAITEN
461    #[inline(always)]
462    pub fn pwaiten(&mut self) -> PWAITEN_W<PCRrs> {
463        PWAITEN_W::new(self, 1)
464    }
465    ///Bit 2 - PBKEN
466    #[inline(always)]
467    pub fn pbken(&mut self) -> PBKEN_W<PCRrs> {
468        PBKEN_W::new(self, 2)
469    }
470    ///Bit 3 - PTYP
471    #[inline(always)]
472    pub fn ptyp(&mut self) -> PTYP_W<PCRrs> {
473        PTYP_W::new(self, 3)
474    }
475    ///Bits 4:5 - PWID
476    #[inline(always)]
477    pub fn pwid(&mut self) -> PWID_W<PCRrs> {
478        PWID_W::new(self, 4)
479    }
480    ///Bit 6 - ECCEN
481    #[inline(always)]
482    pub fn eccen(&mut self) -> ECCEN_W<PCRrs> {
483        ECCEN_W::new(self, 6)
484    }
485    ///Bits 9:12 - TCLR
486    #[inline(always)]
487    pub fn tclr(&mut self) -> TCLR_W<PCRrs> {
488        TCLR_W::new(self, 9)
489    }
490    ///Bits 13:16 - TAR
491    #[inline(always)]
492    pub fn tar(&mut self) -> TAR_W<PCRrs> {
493        TAR_W::new(self, 13)
494    }
495    ///Bits 17:19 - ECCPS
496    #[inline(always)]
497    pub fn eccps(&mut self) -> ECCPS_W<PCRrs> {
498        ECCPS_W::new(self, 17)
499    }
500}
501/**PC Card/NAND Flash control register 3
502
503You can [`read`](crate::Reg::read) this register and get [`pcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
504
505See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L4x5.html#FMC:PCR)*/
506pub struct PCRrs;
507impl crate::RegisterSpec for PCRrs {
508    type Ux = u32;
509}
510///`read()` method returns [`pcr::R`](R) reader structure
511impl crate::Readable for PCRrs {}
512///`write(|w| ..)` method takes [`pcr::W`](W) writer structure
513impl crate::Writable for PCRrs {
514    type Safety = crate::Unsafe;
515}
516///`reset()` method sets PCR to value 0x18
517impl crate::Resettable for PCRrs {
518    const RESET_VALUE: u32 = 0x18;
519}
stm32l4/stm32l4x5/fmc/pcr.rs

stm32l4/stm32l4x5/fmc/
pcr.rs
