stm32l4/stm32l4x1/rcc/
csr.rs

1///Register `CSR` reader
2pub type R = crate::R<CSRrs>;
3///Register `CSR` writer
4pub type W = crate::W<CSRrs>;
5///Field `LSION` reader - LSI oscillator enable
6pub type LSION_R = crate::BitReader;
7///Field `LSION` writer - LSI oscillator enable
8pub type LSION_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `LSIRDY` reader - LSI oscillator ready
10pub type LSIRDY_R = crate::BitReader;
11///Field `MSISRANGE` reader - SI range after Standby mode
12pub type MSISRANGE_R = crate::FieldReader;
13///Field `MSISRANGE` writer - SI range after Standby mode
14pub type MSISRANGE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
15///Field `RMVF` reader - Remove reset flag
16pub type RMVF_R = crate::BitReader;
17///Field `RMVF` writer - Remove reset flag
18pub type RMVF_W<'a, REG> = crate::BitWriter<'a, REG>;
19///Field `FIREWALLRSTF` reader - Firewall reset flag
20pub type FIREWALLRSTF_R = crate::BitReader;
21///Field `OBLRSTF` reader - Option byte loader reset flag
22pub type OBLRSTF_R = crate::BitReader;
23///Field `PINRSTF` reader - Pin reset flag
24pub type PINRSTF_R = crate::BitReader;
25///Field `BORRSTF` reader - BOR flag
26pub type BORRSTF_R = crate::BitReader;
27///Field `SFTRSTF` reader - Software reset flag
28pub type SFTRSTF_R = crate::BitReader;
29///Field `IWDGRSTF` reader - Independent window watchdog reset flag
30pub type IWDGRSTF_R = crate::BitReader;
31///Field `WWDGRSTF` reader - Window watchdog reset flag
32pub type WWDGRSTF_R = crate::BitReader;
33///Field `LPWRSTF` reader - Low-power reset flag
34pub type LPWRSTF_R = crate::BitReader;
35impl R {
36    ///Bit 0 - LSI oscillator enable
37    #[inline(always)]
38    pub fn lsion(&self) -> LSION_R {
39        LSION_R::new((self.bits & 1) != 0)
40    }
41    ///Bit 1 - LSI oscillator ready
42    #[inline(always)]
43    pub fn lsirdy(&self) -> LSIRDY_R {
44        LSIRDY_R::new(((self.bits >> 1) & 1) != 0)
45    }
46    ///Bits 8:11 - SI range after Standby mode
47    #[inline(always)]
48    pub fn msisrange(&self) -> MSISRANGE_R {
49        MSISRANGE_R::new(((self.bits >> 8) & 0x0f) as u8)
50    }
51    ///Bit 23 - Remove reset flag
52    #[inline(always)]
53    pub fn rmvf(&self) -> RMVF_R {
54        RMVF_R::new(((self.bits >> 23) & 1) != 0)
55    }
56    ///Bit 24 - Firewall reset flag
57    #[inline(always)]
58    pub fn firewallrstf(&self) -> FIREWALLRSTF_R {
59        FIREWALLRSTF_R::new(((self.bits >> 24) & 1) != 0)
60    }
61    ///Bit 25 - Option byte loader reset flag
62    #[inline(always)]
63    pub fn oblrstf(&self) -> OBLRSTF_R {
64        OBLRSTF_R::new(((self.bits >> 25) & 1) != 0)
65    }
66    ///Bit 26 - Pin reset flag
67    #[inline(always)]
68    pub fn pinrstf(&self) -> PINRSTF_R {
69        PINRSTF_R::new(((self.bits >> 26) & 1) != 0)
70    }
71    ///Bit 27 - BOR flag
72    #[inline(always)]
73    pub fn borrstf(&self) -> BORRSTF_R {
74        BORRSTF_R::new(((self.bits >> 27) & 1) != 0)
75    }
76    ///Bit 28 - Software reset flag
77    #[inline(always)]
78    pub fn sftrstf(&self) -> SFTRSTF_R {
79        SFTRSTF_R::new(((self.bits >> 28) & 1) != 0)
80    }
81    ///Bit 29 - Independent window watchdog reset flag
82    #[inline(always)]
83    pub fn iwdgrstf(&self) -> IWDGRSTF_R {
84        IWDGRSTF_R::new(((self.bits >> 29) & 1) != 0)
85    }
86    ///Bit 30 - Window watchdog reset flag
87    #[inline(always)]
88    pub fn wwdgrstf(&self) -> WWDGRSTF_R {
89        WWDGRSTF_R::new(((self.bits >> 30) & 1) != 0)
90    }
91    ///Bit 31 - Low-power reset flag
92    #[inline(always)]
93    pub fn lpwrstf(&self) -> LPWRSTF_R {
94        LPWRSTF_R::new(((self.bits >> 31) & 1) != 0)
95    }
96}
97impl core::fmt::Debug for R {
98    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
99        f.debug_struct("CSR")
100            .field("lpwrstf", &self.lpwrstf())
101            .field("wwdgrstf", &self.wwdgrstf())
102            .field("iwdgrstf", &self.iwdgrstf())
103            .field("sftrstf", &self.sftrstf())
104            .field("borrstf", &self.borrstf())
105            .field("pinrstf", &self.pinrstf())
106            .field("oblrstf", &self.oblrstf())
107            .field("firewallrstf", &self.firewallrstf())
108            .field("rmvf", &self.rmvf())
109            .field("msisrange", &self.msisrange())
110            .field("lsirdy", &self.lsirdy())
111            .field("lsion", &self.lsion())
112            .finish()
113    }
114}
115impl W {
116    ///Bit 0 - LSI oscillator enable
117    #[inline(always)]
118    pub fn lsion(&mut self) -> LSION_W<CSRrs> {
119        LSION_W::new(self, 0)
120    }
121    ///Bits 8:11 - SI range after Standby mode
122    #[inline(always)]
123    pub fn msisrange(&mut self) -> MSISRANGE_W<CSRrs> {
124        MSISRANGE_W::new(self, 8)
125    }
126    ///Bit 23 - Remove reset flag
127    #[inline(always)]
128    pub fn rmvf(&mut self) -> RMVF_W<CSRrs> {
129        RMVF_W::new(self, 23)
130    }
131}
132/**CSR
133
134You can [`read`](crate::Reg::read) this register and get [`csr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
135
136See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L4x1.html#RCC:CSR)*/
137pub struct CSRrs;
138impl crate::RegisterSpec for CSRrs {
139    type Ux = u32;
140}
141///`read()` method returns [`csr::R`](R) reader structure
142impl crate::Readable for CSRrs {}
143///`write(|w| ..)` method takes [`csr::W`](W) writer structure
144impl crate::Writable for CSRrs {
145    type Safety = crate::Unsafe;
146}
147///`reset()` method sets CSR to value 0x0c00_0600
148impl crate::Resettable for CSRrs {
149    const RESET_VALUE: u32 = 0x0c00_0600;
150}
stm32l4/stm32l4x1/rcc/csr.rs

stm32l4/stm32l4x1/rcc/
csr.rs
