stm32l4/stm32l4x1/pwr/
cr1.rs

1///Register `CR1` reader
2pub type R = crate::R<CR1rs>;
3///Register `CR1` writer
4pub type W = crate::W<CR1rs>;
5///Field `LPMS` reader - Low-power mode selection
6pub type LPMS_R = crate::FieldReader;
7///Field `LPMS` writer - Low-power mode selection
8pub type LPMS_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9///Field `DBP` reader - Disable backup domain write protection
10pub type DBP_R = crate::BitReader;
11///Field `DBP` writer - Disable backup domain write protection
12pub type DBP_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `VOS` reader - Voltage scaling range selection
14pub type VOS_R = crate::FieldReader;
15///Field `VOS` writer - Voltage scaling range selection
16pub type VOS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
17///Field `LPR` reader - Low-power run
18pub type LPR_R = crate::BitReader;
19///Field `LPR` writer - Low-power run
20pub type LPR_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    ///Bits 0:2 - Low-power mode selection
23    #[inline(always)]
24    pub fn lpms(&self) -> LPMS_R {
25        LPMS_R::new((self.bits & 7) as u8)
26    }
27    ///Bit 8 - Disable backup domain write protection
28    #[inline(always)]
29    pub fn dbp(&self) -> DBP_R {
30        DBP_R::new(((self.bits >> 8) & 1) != 0)
31    }
32    ///Bits 9:10 - Voltage scaling range selection
33    #[inline(always)]
34    pub fn vos(&self) -> VOS_R {
35        VOS_R::new(((self.bits >> 9) & 3) as u8)
36    }
37    ///Bit 14 - Low-power run
38    #[inline(always)]
39    pub fn lpr(&self) -> LPR_R {
40        LPR_R::new(((self.bits >> 14) & 1) != 0)
41    }
42}
43impl core::fmt::Debug for R {
44    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
45        f.debug_struct("CR1")
46            .field("lpr", &self.lpr())
47            .field("vos", &self.vos())
48            .field("dbp", &self.dbp())
49            .field("lpms", &self.lpms())
50            .finish()
51    }
52}
53impl W {
54    ///Bits 0:2 - Low-power mode selection
55    #[inline(always)]
56    pub fn lpms(&mut self) -> LPMS_W<CR1rs> {
57        LPMS_W::new(self, 0)
58    }
59    ///Bit 8 - Disable backup domain write protection
60    #[inline(always)]
61    pub fn dbp(&mut self) -> DBP_W<CR1rs> {
62        DBP_W::new(self, 8)
63    }
64    ///Bits 9:10 - Voltage scaling range selection
65    #[inline(always)]
66    pub fn vos(&mut self) -> VOS_W<CR1rs> {
67        VOS_W::new(self, 9)
68    }
69    ///Bit 14 - Low-power run
70    #[inline(always)]
71    pub fn lpr(&mut self) -> LPR_W<CR1rs> {
72        LPR_W::new(self, 14)
73    }
74}
75/**Power control register 1
76
77You can [`read`](crate::Reg::read) this register and get [`cr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
78
79See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L4x1.html#PWR:CR1)*/
80pub struct CR1rs;
81impl crate::RegisterSpec for CR1rs {
82    type Ux = u32;
83}
84///`read()` method returns [`cr1::R`](R) reader structure
85impl crate::Readable for CR1rs {}
86///`write(|w| ..)` method takes [`cr1::W`](W) writer structure
87impl crate::Writable for CR1rs {
88    type Safety = crate::Unsafe;
89}
90///`reset()` method sets CR1 to value 0x0200
91impl crate::Resettable for CR1rs {
92    const RESET_VALUE: u32 = 0x0200;
93}
stm32l4/stm32l4x1/pwr/cr1.rs

stm32l4/stm32l4x1/pwr/
cr1.rs
