stm32l4/stm32l4x1/opamp/
opamp1_csr.rs

1///Register `OPAMP1_CSR` reader
2pub type R = crate::R<OPAMP1_CSRrs>;
3///Register `OPAMP1_CSR` writer
4pub type W = crate::W<OPAMP1_CSRrs>;
5/**Operational amplifier Enable
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum OPAEN {
11    ///0: OpAmp disabled
12    Disabled = 0,
13    ///1: OpAmp enabled
14    Enabled = 1,
15}
16impl From<OPAEN> for bool {
17    #[inline(always)]
18    fn from(variant: OPAEN) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `OPAEN` reader - Operational amplifier Enable
23pub type OPAEN_R = crate::BitReader<OPAEN>;
24impl OPAEN_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> OPAEN {
28        match self.bits {
29            false => OPAEN::Disabled,
30            true => OPAEN::Enabled,
31        }
32    }
33    ///OpAmp disabled
34    #[inline(always)]
35    pub fn is_disabled(&self) -> bool {
36        *self == OPAEN::Disabled
37    }
38    ///OpAmp enabled
39    #[inline(always)]
40    pub fn is_enabled(&self) -> bool {
41        *self == OPAEN::Enabled
42    }
43}
44///Field `OPAEN` writer - Operational amplifier Enable
45pub type OPAEN_W<'a, REG> = crate::BitWriter<'a, REG, OPAEN>;
46impl<'a, REG> OPAEN_W<'a, REG>
47where
48    REG: crate::Writable + crate::RegisterSpec,
49{
50    ///OpAmp disabled
51    #[inline(always)]
52    pub fn disabled(self) -> &'a mut crate::W<REG> {
53        self.variant(OPAEN::Disabled)
54    }
55    ///OpAmp enabled
56    #[inline(always)]
57    pub fn enabled(self) -> &'a mut crate::W<REG> {
58        self.variant(OPAEN::Enabled)
59    }
60}
61/**Operational amplifier Low Power Mode
62
63Value on reset: 0*/
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum OPALPM {
67    ///0: OpAmp in normal mode
68    Normal = 0,
69    ///1: OpAmp in low power mode
70    Low = 1,
71}
72impl From<OPALPM> for bool {
73    #[inline(always)]
74    fn from(variant: OPALPM) -> Self {
75        variant as u8 != 0
76    }
77}
78///Field `OPALPM` reader - Operational amplifier Low Power Mode
79pub type OPALPM_R = crate::BitReader<OPALPM>;
80impl OPALPM_R {
81    ///Get enumerated values variant
82    #[inline(always)]
83    pub const fn variant(&self) -> OPALPM {
84        match self.bits {
85            false => OPALPM::Normal,
86            true => OPALPM::Low,
87        }
88    }
89    ///OpAmp in normal mode
90    #[inline(always)]
91    pub fn is_normal(&self) -> bool {
92        *self == OPALPM::Normal
93    }
94    ///OpAmp in low power mode
95    #[inline(always)]
96    pub fn is_low(&self) -> bool {
97        *self == OPALPM::Low
98    }
99}
100///Field `OPALPM` writer - Operational amplifier Low Power Mode
101pub type OPALPM_W<'a, REG> = crate::BitWriter<'a, REG, OPALPM>;
102impl<'a, REG> OPALPM_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    ///OpAmp in normal mode
107    #[inline(always)]
108    pub fn normal(self) -> &'a mut crate::W<REG> {
109        self.variant(OPALPM::Normal)
110    }
111    ///OpAmp in low power mode
112    #[inline(always)]
113    pub fn low(self) -> &'a mut crate::W<REG> {
114        self.variant(OPALPM::Low)
115    }
116}
117/**Operational amplifier PGA mode
118
119Value on reset: 0*/
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122#[repr(u8)]
123pub enum OPAMODE {
124    ///0: internal PGA diabled
125    PgaDisabled = 0,
126    ///2: internal PGA enabled, gain programmed in PGA_GAIN
127    PgaEnabled = 2,
128    ///3: internal follower
129    Follower = 3,
130}
131impl From<OPAMODE> for u8 {
132    #[inline(always)]
133    fn from(variant: OPAMODE) -> Self {
134        variant as _
135    }
136}
137impl crate::FieldSpec for OPAMODE {
138    type Ux = u8;
139}
140impl crate::IsEnum for OPAMODE {}
141///Field `OPAMODE` reader - Operational amplifier PGA mode
142pub type OPAMODE_R = crate::FieldReader<OPAMODE>;
143impl OPAMODE_R {
144    ///Get enumerated values variant
145    #[inline(always)]
146    pub const fn variant(&self) -> Option<OPAMODE> {
147        match self.bits {
148            0 => Some(OPAMODE::PgaDisabled),
149            2 => Some(OPAMODE::PgaEnabled),
150            3 => Some(OPAMODE::Follower),
151            _ => None,
152        }
153    }
154    ///internal PGA diabled
155    #[inline(always)]
156    pub fn is_pga_disabled(&self) -> bool {
157        *self == OPAMODE::PgaDisabled
158    }
159    ///internal PGA enabled, gain programmed in PGA_GAIN
160    #[inline(always)]
161    pub fn is_pga_enabled(&self) -> bool {
162        *self == OPAMODE::PgaEnabled
163    }
164    ///internal follower
165    #[inline(always)]
166    pub fn is_follower(&self) -> bool {
167        *self == OPAMODE::Follower
168    }
169}
170///Field `OPAMODE` writer - Operational amplifier PGA mode
171pub type OPAMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, OPAMODE>;
172impl<'a, REG> OPAMODE_W<'a, REG>
173where
174    REG: crate::Writable + crate::RegisterSpec,
175    REG::Ux: From<u8>,
176{
177    ///internal PGA diabled
178    #[inline(always)]
179    pub fn pga_disabled(self) -> &'a mut crate::W<REG> {
180        self.variant(OPAMODE::PgaDisabled)
181    }
182    ///internal PGA enabled, gain programmed in PGA_GAIN
183    #[inline(always)]
184    pub fn pga_enabled(self) -> &'a mut crate::W<REG> {
185        self.variant(OPAMODE::PgaEnabled)
186    }
187    ///internal follower
188    #[inline(always)]
189    pub fn follower(self) -> &'a mut crate::W<REG> {
190        self.variant(OPAMODE::Follower)
191    }
192}
193/**Operational amplifier Programmable amplifier gain value
194
195Value on reset: 0*/
196#[cfg_attr(feature = "defmt", derive(defmt::Format))]
197#[derive(Clone, Copy, Debug, PartialEq, Eq)]
198#[repr(u8)]
199pub enum PGA_GAIN {
200    ///0: Gain 2
201    Gain2 = 0,
202    ///1: Gain 4
203    Gain4 = 1,
204    ///2: Gain 8
205    Gain8 = 2,
206    ///3: Gain 16
207    Gain16 = 3,
208}
209impl From<PGA_GAIN> for u8 {
210    #[inline(always)]
211    fn from(variant: PGA_GAIN) -> Self {
212        variant as _
213    }
214}
215impl crate::FieldSpec for PGA_GAIN {
216    type Ux = u8;
217}
218impl crate::IsEnum for PGA_GAIN {}
219///Field `PGA_GAIN` reader - Operational amplifier Programmable amplifier gain value
220pub type PGA_GAIN_R = crate::FieldReader<PGA_GAIN>;
221impl PGA_GAIN_R {
222    ///Get enumerated values variant
223    #[inline(always)]
224    pub const fn variant(&self) -> PGA_GAIN {
225        match self.bits {
226            0 => PGA_GAIN::Gain2,
227            1 => PGA_GAIN::Gain4,
228            2 => PGA_GAIN::Gain8,
229            3 => PGA_GAIN::Gain16,
230            _ => unreachable!(),
231        }
232    }
233    ///Gain 2
234    #[inline(always)]
235    pub fn is_gain2(&self) -> bool {
236        *self == PGA_GAIN::Gain2
237    }
238    ///Gain 4
239    #[inline(always)]
240    pub fn is_gain4(&self) -> bool {
241        *self == PGA_GAIN::Gain4
242    }
243    ///Gain 8
244    #[inline(always)]
245    pub fn is_gain8(&self) -> bool {
246        *self == PGA_GAIN::Gain8
247    }
248    ///Gain 16
249    #[inline(always)]
250    pub fn is_gain16(&self) -> bool {
251        *self == PGA_GAIN::Gain16
252    }
253}
254///Field `PGA_GAIN` writer - Operational amplifier Programmable amplifier gain value
255pub type PGA_GAIN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PGA_GAIN, crate::Safe>;
256impl<'a, REG> PGA_GAIN_W<'a, REG>
257where
258    REG: crate::Writable + crate::RegisterSpec,
259    REG::Ux: From<u8>,
260{
261    ///Gain 2
262    #[inline(always)]
263    pub fn gain2(self) -> &'a mut crate::W<REG> {
264        self.variant(PGA_GAIN::Gain2)
265    }
266    ///Gain 4
267    #[inline(always)]
268    pub fn gain4(self) -> &'a mut crate::W<REG> {
269        self.variant(PGA_GAIN::Gain4)
270    }
271    ///Gain 8
272    #[inline(always)]
273    pub fn gain8(self) -> &'a mut crate::W<REG> {
274        self.variant(PGA_GAIN::Gain8)
275    }
276    ///Gain 16
277    #[inline(always)]
278    pub fn gain16(self) -> &'a mut crate::W<REG> {
279        self.variant(PGA_GAIN::Gain16)
280    }
281}
282/**Inverting input selection
283
284Value on reset: 0*/
285#[cfg_attr(feature = "defmt", derive(defmt::Format))]
286#[derive(Clone, Copy, Debug, PartialEq, Eq)]
287#[repr(u8)]
288pub enum VM_SEL {
289    ///0: GPIO connectet to VINM
290    Gpio = 0,
291    ///1: Low leakage inputs connecte (only available in certen BGA cases
292    LowLeakage = 1,
293    ///2: OPAMP in PGA mode
294    PgaMode = 2,
295}
296impl From<VM_SEL> for u8 {
297    #[inline(always)]
298    fn from(variant: VM_SEL) -> Self {
299        variant as _
300    }
301}
302impl crate::FieldSpec for VM_SEL {
303    type Ux = u8;
304}
305impl crate::IsEnum for VM_SEL {}
306///Field `VM_SEL` reader - Inverting input selection
307pub type VM_SEL_R = crate::FieldReader<VM_SEL>;
308impl VM_SEL_R {
309    ///Get enumerated values variant
310    #[inline(always)]
311    pub const fn variant(&self) -> Option<VM_SEL> {
312        match self.bits {
313            0 => Some(VM_SEL::Gpio),
314            1 => Some(VM_SEL::LowLeakage),
315            2 => Some(VM_SEL::PgaMode),
316            _ => None,
317        }
318    }
319    ///GPIO connectet to VINM
320    #[inline(always)]
321    pub fn is_gpio(&self) -> bool {
322        *self == VM_SEL::Gpio
323    }
324    ///Low leakage inputs connecte (only available in certen BGA cases
325    #[inline(always)]
326    pub fn is_low_leakage(&self) -> bool {
327        *self == VM_SEL::LowLeakage
328    }
329    ///OPAMP in PGA mode
330    #[inline(always)]
331    pub fn is_pga_mode(&self) -> bool {
332        *self == VM_SEL::PgaMode
333    }
334}
335///Field `VM_SEL` writer - Inverting input selection
336pub type VM_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, VM_SEL>;
337impl<'a, REG> VM_SEL_W<'a, REG>
338where
339    REG: crate::Writable + crate::RegisterSpec,
340    REG::Ux: From<u8>,
341{
342    ///GPIO connectet to VINM
343    #[inline(always)]
344    pub fn gpio(self) -> &'a mut crate::W<REG> {
345        self.variant(VM_SEL::Gpio)
346    }
347    ///Low leakage inputs connecte (only available in certen BGA cases
348    #[inline(always)]
349    pub fn low_leakage(self) -> &'a mut crate::W<REG> {
350        self.variant(VM_SEL::LowLeakage)
351    }
352    ///OPAMP in PGA mode
353    #[inline(always)]
354    pub fn pga_mode(self) -> &'a mut crate::W<REG> {
355        self.variant(VM_SEL::PgaMode)
356    }
357}
358/**Non inverted input selection
359
360Value on reset: 0*/
361#[cfg_attr(feature = "defmt", derive(defmt::Format))]
362#[derive(Clone, Copy, Debug, PartialEq, Eq)]
363pub enum VP_SEL {
364    ///0: GPIO connectet to VINP
365    Gpio = 0,
366    ///1: DAC connected to VPINP
367    Dac = 1,
368}
369impl From<VP_SEL> for bool {
370    #[inline(always)]
371    fn from(variant: VP_SEL) -> Self {
372        variant as u8 != 0
373    }
374}
375///Field `VP_SEL` reader - Non inverted input selection
376pub type VP_SEL_R = crate::BitReader<VP_SEL>;
377impl VP_SEL_R {
378    ///Get enumerated values variant
379    #[inline(always)]
380    pub const fn variant(&self) -> VP_SEL {
381        match self.bits {
382            false => VP_SEL::Gpio,
383            true => VP_SEL::Dac,
384        }
385    }
386    ///GPIO connectet to VINP
387    #[inline(always)]
388    pub fn is_gpio(&self) -> bool {
389        *self == VP_SEL::Gpio
390    }
391    ///DAC connected to VPINP
392    #[inline(always)]
393    pub fn is_dac(&self) -> bool {
394        *self == VP_SEL::Dac
395    }
396}
397///Field `VP_SEL` writer - Non inverted input selection
398pub type VP_SEL_W<'a, REG> = crate::BitWriter<'a, REG, VP_SEL>;
399impl<'a, REG> VP_SEL_W<'a, REG>
400where
401    REG: crate::Writable + crate::RegisterSpec,
402{
403    ///GPIO connectet to VINP
404    #[inline(always)]
405    pub fn gpio(self) -> &'a mut crate::W<REG> {
406        self.variant(VP_SEL::Gpio)
407    }
408    ///DAC connected to VPINP
409    #[inline(always)]
410    pub fn dac(self) -> &'a mut crate::W<REG> {
411        self.variant(VP_SEL::Dac)
412    }
413}
414/**Calibration mode enabled
415
416Value on reset: 0*/
417#[cfg_attr(feature = "defmt", derive(defmt::Format))]
418#[derive(Clone, Copy, Debug, PartialEq, Eq)]
419pub enum CALON {
420    ///0: Normal mode
421    Disabled = 0,
422    ///1: Calibration mode
423    Enabled = 1,
424}
425impl From<CALON> for bool {
426    #[inline(always)]
427    fn from(variant: CALON) -> Self {
428        variant as u8 != 0
429    }
430}
431///Field `CALON` reader - Calibration mode enabled
432pub type CALON_R = crate::BitReader<CALON>;
433impl CALON_R {
434    ///Get enumerated values variant
435    #[inline(always)]
436    pub const fn variant(&self) -> CALON {
437        match self.bits {
438            false => CALON::Disabled,
439            true => CALON::Enabled,
440        }
441    }
442    ///Normal mode
443    #[inline(always)]
444    pub fn is_disabled(&self) -> bool {
445        *self == CALON::Disabled
446    }
447    ///Calibration mode
448    #[inline(always)]
449    pub fn is_enabled(&self) -> bool {
450        *self == CALON::Enabled
451    }
452}
453///Field `CALON` writer - Calibration mode enabled
454pub type CALON_W<'a, REG> = crate::BitWriter<'a, REG, CALON>;
455impl<'a, REG> CALON_W<'a, REG>
456where
457    REG: crate::Writable + crate::RegisterSpec,
458{
459    ///Normal mode
460    #[inline(always)]
461    pub fn disabled(self) -> &'a mut crate::W<REG> {
462        self.variant(CALON::Disabled)
463    }
464    ///Calibration mode
465    #[inline(always)]
466    pub fn enabled(self) -> &'a mut crate::W<REG> {
467        self.variant(CALON::Enabled)
468    }
469}
470/**Calibration selection
471
472Value on reset: 0*/
473#[cfg_attr(feature = "defmt", derive(defmt::Format))]
474#[derive(Clone, Copy, Debug, PartialEq, Eq)]
475pub enum CALSEL {
476    ///0: 0.2V applied to OPAMP inputs during calibration
477    Nmos = 0,
478    ///1: VDDA-0.2V applied to OPAMP inputs during calibration"
479    Pmos = 1,
480}
481impl From<CALSEL> for bool {
482    #[inline(always)]
483    fn from(variant: CALSEL) -> Self {
484        variant as u8 != 0
485    }
486}
487///Field `CALSEL` reader - Calibration selection
488pub type CALSEL_R = crate::BitReader<CALSEL>;
489impl CALSEL_R {
490    ///Get enumerated values variant
491    #[inline(always)]
492    pub const fn variant(&self) -> CALSEL {
493        match self.bits {
494            false => CALSEL::Nmos,
495            true => CALSEL::Pmos,
496        }
497    }
498    ///0.2V applied to OPAMP inputs during calibration
499    #[inline(always)]
500    pub fn is_nmos(&self) -> bool {
501        *self == CALSEL::Nmos
502    }
503    ///VDDA-0.2V applied to OPAMP inputs during calibration"
504    #[inline(always)]
505    pub fn is_pmos(&self) -> bool {
506        *self == CALSEL::Pmos
507    }
508}
509///Field `CALSEL` writer - Calibration selection
510pub type CALSEL_W<'a, REG> = crate::BitWriter<'a, REG, CALSEL>;
511impl<'a, REG> CALSEL_W<'a, REG>
512where
513    REG: crate::Writable + crate::RegisterSpec,
514{
515    ///0.2V applied to OPAMP inputs during calibration
516    #[inline(always)]
517    pub fn nmos(self) -> &'a mut crate::W<REG> {
518        self.variant(CALSEL::Nmos)
519    }
520    ///VDDA-0.2V applied to OPAMP inputs during calibration"
521    #[inline(always)]
522    pub fn pmos(self) -> &'a mut crate::W<REG> {
523        self.variant(CALSEL::Pmos)
524    }
525}
526/**allows to switch from AOP offset trimmed values to AOP offset
527
528Value on reset: 0*/
529#[cfg_attr(feature = "defmt", derive(defmt::Format))]
530#[derive(Clone, Copy, Debug, PartialEq, Eq)]
531pub enum USERTRIM {
532    ///0: Factory trim used
533    Factory = 0,
534    ///1: User trim used
535    User = 1,
536}
537impl From<USERTRIM> for bool {
538    #[inline(always)]
539    fn from(variant: USERTRIM) -> Self {
540        variant as u8 != 0
541    }
542}
543///Field `USERTRIM` reader - allows to switch from AOP offset trimmed values to AOP offset
544pub type USERTRIM_R = crate::BitReader<USERTRIM>;
545impl USERTRIM_R {
546    ///Get enumerated values variant
547    #[inline(always)]
548    pub const fn variant(&self) -> USERTRIM {
549        match self.bits {
550            false => USERTRIM::Factory,
551            true => USERTRIM::User,
552        }
553    }
554    ///Factory trim used
555    #[inline(always)]
556    pub fn is_factory(&self) -> bool {
557        *self == USERTRIM::Factory
558    }
559    ///User trim used
560    #[inline(always)]
561    pub fn is_user(&self) -> bool {
562        *self == USERTRIM::User
563    }
564}
565///Field `USERTRIM` writer - allows to switch from AOP offset trimmed values to AOP offset
566pub type USERTRIM_W<'a, REG> = crate::BitWriter<'a, REG, USERTRIM>;
567impl<'a, REG> USERTRIM_W<'a, REG>
568where
569    REG: crate::Writable + crate::RegisterSpec,
570{
571    ///Factory trim used
572    #[inline(always)]
573    pub fn factory(self) -> &'a mut crate::W<REG> {
574        self.variant(USERTRIM::Factory)
575    }
576    ///User trim used
577    #[inline(always)]
578    pub fn user(self) -> &'a mut crate::W<REG> {
579        self.variant(USERTRIM::User)
580    }
581}
582///Field `CALOUT` reader - Operational amplifier calibration output
583pub type CALOUT_R = crate::BitReader;
584///Field `CALOUT` writer - Operational amplifier calibration output
585pub type CALOUT_W<'a, REG> = crate::BitWriter<'a, REG>;
586/**Operational amplifier power supply range for stability
587
588Value on reset: 0*/
589#[cfg_attr(feature = "defmt", derive(defmt::Format))]
590#[derive(Clone, Copy, Debug, PartialEq, Eq)]
591pub enum OPA_RANGE {
592    ///0: low range (VDDA < 2.4V
593    Low = 0,
594    ///1: low range (VDDA >2.4V
595    High = 1,
596}
597impl From<OPA_RANGE> for bool {
598    #[inline(always)]
599    fn from(variant: OPA_RANGE) -> Self {
600        variant as u8 != 0
601    }
602}
603///Field `OPA_RANGE` reader - Operational amplifier power supply range for stability
604pub type OPA_RANGE_R = crate::BitReader<OPA_RANGE>;
605impl OPA_RANGE_R {
606    ///Get enumerated values variant
607    #[inline(always)]
608    pub const fn variant(&self) -> OPA_RANGE {
609        match self.bits {
610            false => OPA_RANGE::Low,
611            true => OPA_RANGE::High,
612        }
613    }
614    ///low range (VDDA < 2.4V
615    #[inline(always)]
616    pub fn is_low(&self) -> bool {
617        *self == OPA_RANGE::Low
618    }
619    ///low range (VDDA >2.4V
620    #[inline(always)]
621    pub fn is_high(&self) -> bool {
622        *self == OPA_RANGE::High
623    }
624}
625///Field `OPA_RANGE` writer - Operational amplifier power supply range for stability
626pub type OPA_RANGE_W<'a, REG> = crate::BitWriter<'a, REG, OPA_RANGE>;
627impl<'a, REG> OPA_RANGE_W<'a, REG>
628where
629    REG: crate::Writable + crate::RegisterSpec,
630{
631    ///low range (VDDA < 2.4V
632    #[inline(always)]
633    pub fn low(self) -> &'a mut crate::W<REG> {
634        self.variant(OPA_RANGE::Low)
635    }
636    ///low range (VDDA >2.4V
637    #[inline(always)]
638    pub fn high(self) -> &'a mut crate::W<REG> {
639        self.variant(OPA_RANGE::High)
640    }
641}
642impl R {
643    ///Bit 0 - Operational amplifier Enable
644    #[inline(always)]
645    pub fn opaen(&self) -> OPAEN_R {
646        OPAEN_R::new((self.bits & 1) != 0)
647    }
648    ///Bit 1 - Operational amplifier Low Power Mode
649    #[inline(always)]
650    pub fn opalpm(&self) -> OPALPM_R {
651        OPALPM_R::new(((self.bits >> 1) & 1) != 0)
652    }
653    ///Bits 2:3 - Operational amplifier PGA mode
654    #[inline(always)]
655    pub fn opamode(&self) -> OPAMODE_R {
656        OPAMODE_R::new(((self.bits >> 2) & 3) as u8)
657    }
658    ///Bits 4:5 - Operational amplifier Programmable amplifier gain value
659    #[inline(always)]
660    pub fn pga_gain(&self) -> PGA_GAIN_R {
661        PGA_GAIN_R::new(((self.bits >> 4) & 3) as u8)
662    }
663    ///Bits 8:9 - Inverting input selection
664    #[inline(always)]
665    pub fn vm_sel(&self) -> VM_SEL_R {
666        VM_SEL_R::new(((self.bits >> 8) & 3) as u8)
667    }
668    ///Bit 10 - Non inverted input selection
669    #[inline(always)]
670    pub fn vp_sel(&self) -> VP_SEL_R {
671        VP_SEL_R::new(((self.bits >> 10) & 1) != 0)
672    }
673    ///Bit 12 - Calibration mode enabled
674    #[inline(always)]
675    pub fn calon(&self) -> CALON_R {
676        CALON_R::new(((self.bits >> 12) & 1) != 0)
677    }
678    ///Bit 13 - Calibration selection
679    #[inline(always)]
680    pub fn calsel(&self) -> CALSEL_R {
681        CALSEL_R::new(((self.bits >> 13) & 1) != 0)
682    }
683    ///Bit 14 - allows to switch from AOP offset trimmed values to AOP offset
684    #[inline(always)]
685    pub fn usertrim(&self) -> USERTRIM_R {
686        USERTRIM_R::new(((self.bits >> 14) & 1) != 0)
687    }
688    ///Bit 15 - Operational amplifier calibration output
689    #[inline(always)]
690    pub fn calout(&self) -> CALOUT_R {
691        CALOUT_R::new(((self.bits >> 15) & 1) != 0)
692    }
693    ///Bit 31 - Operational amplifier power supply range for stability
694    #[inline(always)]
695    pub fn opa_range(&self) -> OPA_RANGE_R {
696        OPA_RANGE_R::new(((self.bits >> 31) & 1) != 0)
697    }
698}
699impl core::fmt::Debug for R {
700    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
701        f.debug_struct("OPAMP1_CSR")
702            .field("opaen", &self.opaen())
703            .field("opalpm", &self.opalpm())
704            .field("opamode", &self.opamode())
705            .field("pga_gain", &self.pga_gain())
706            .field("vm_sel", &self.vm_sel())
707            .field("vp_sel", &self.vp_sel())
708            .field("calon", &self.calon())
709            .field("calsel", &self.calsel())
710            .field("usertrim", &self.usertrim())
711            .field("calout", &self.calout())
712            .field("opa_range", &self.opa_range())
713            .finish()
714    }
715}
716impl W {
717    ///Bit 0 - Operational amplifier Enable
718    #[inline(always)]
719    pub fn opaen(&mut self) -> OPAEN_W<OPAMP1_CSRrs> {
720        OPAEN_W::new(self, 0)
721    }
722    ///Bit 1 - Operational amplifier Low Power Mode
723    #[inline(always)]
724    pub fn opalpm(&mut self) -> OPALPM_W<OPAMP1_CSRrs> {
725        OPALPM_W::new(self, 1)
726    }
727    ///Bits 2:3 - Operational amplifier PGA mode
728    #[inline(always)]
729    pub fn opamode(&mut self) -> OPAMODE_W<OPAMP1_CSRrs> {
730        OPAMODE_W::new(self, 2)
731    }
732    ///Bits 4:5 - Operational amplifier Programmable amplifier gain value
733    #[inline(always)]
734    pub fn pga_gain(&mut self) -> PGA_GAIN_W<OPAMP1_CSRrs> {
735        PGA_GAIN_W::new(self, 4)
736    }
737    ///Bits 8:9 - Inverting input selection
738    #[inline(always)]
739    pub fn vm_sel(&mut self) -> VM_SEL_W<OPAMP1_CSRrs> {
740        VM_SEL_W::new(self, 8)
741    }
742    ///Bit 10 - Non inverted input selection
743    #[inline(always)]
744    pub fn vp_sel(&mut self) -> VP_SEL_W<OPAMP1_CSRrs> {
745        VP_SEL_W::new(self, 10)
746    }
747    ///Bit 12 - Calibration mode enabled
748    #[inline(always)]
749    pub fn calon(&mut self) -> CALON_W<OPAMP1_CSRrs> {
750        CALON_W::new(self, 12)
751    }
752    ///Bit 13 - Calibration selection
753    #[inline(always)]
754    pub fn calsel(&mut self) -> CALSEL_W<OPAMP1_CSRrs> {
755        CALSEL_W::new(self, 13)
756    }
757    ///Bit 14 - allows to switch from AOP offset trimmed values to AOP offset
758    #[inline(always)]
759    pub fn usertrim(&mut self) -> USERTRIM_W<OPAMP1_CSRrs> {
760        USERTRIM_W::new(self, 14)
761    }
762    ///Bit 15 - Operational amplifier calibration output
763    #[inline(always)]
764    pub fn calout(&mut self) -> CALOUT_W<OPAMP1_CSRrs> {
765        CALOUT_W::new(self, 15)
766    }
767    ///Bit 31 - Operational amplifier power supply range for stability
768    #[inline(always)]
769    pub fn opa_range(&mut self) -> OPA_RANGE_W<OPAMP1_CSRrs> {
770        OPA_RANGE_W::new(self, 31)
771    }
772}
773/**OPAMP1 control/status register
774
775You can [`read`](crate::Reg::read) this register and get [`opamp1_csr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`opamp1_csr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
776
777See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L4x1.html#OPAMP:OPAMP1_CSR)*/
778pub struct OPAMP1_CSRrs;
779impl crate::RegisterSpec for OPAMP1_CSRrs {
780    type Ux = u32;
781}
782///`read()` method returns [`opamp1_csr::R`](R) reader structure
783impl crate::Readable for OPAMP1_CSRrs {}
784///`write(|w| ..)` method takes [`opamp1_csr::W`](W) writer structure
785impl crate::Writable for OPAMP1_CSRrs {
786    type Safety = crate::Unsafe;
787}
788///`reset()` method sets OPAMP1_CSR to value 0
789impl crate::Resettable for OPAMP1_CSRrs {}
stm32l4/stm32l4x1/opamp/opamp1_csr.rs

stm32l4/stm32l4x1/opamp/
opamp1_csr.rs
