stm32l4/stm32l4x1/lpuart1/
rqr.rs

1///Register `RQR` writer
2pub type W = crate::W<RQRrs>;
3/**Send break request
4
5Value on reset: 0*/
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum SBKRQ {
9    ///1: sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available
10    Break = 1,
11}
12impl From<SBKRQ> for bool {
13    #[inline(always)]
14    fn from(variant: SBKRQ) -> Self {
15        variant as u8 != 0
16    }
17}
18///Field `SBKRQ` writer - Send break request
19pub type SBKRQ_W<'a, REG> = crate::BitWriter<'a, REG, SBKRQ>;
20impl<'a, REG> SBKRQ_W<'a, REG>
21where
22    REG: crate::Writable + crate::RegisterSpec,
23{
24    ///sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available
25    #[inline(always)]
26    pub fn break_(self) -> &'a mut crate::W<REG> {
27        self.variant(SBKRQ::Break)
28    }
29}
30/**Mute mode request
31
32Value on reset: 0*/
33#[cfg_attr(feature = "defmt", derive(defmt::Format))]
34#[derive(Clone, Copy, Debug, PartialEq, Eq)]
35pub enum MMRQ {
36    ///1: Puts the USART in mute mode and sets the RWU flag
37    Mute = 1,
38}
39impl From<MMRQ> for bool {
40    #[inline(always)]
41    fn from(variant: MMRQ) -> Self {
42        variant as u8 != 0
43    }
44}
45///Field `MMRQ` writer - Mute mode request
46pub type MMRQ_W<'a, REG> = crate::BitWriter<'a, REG, MMRQ>;
47impl<'a, REG> MMRQ_W<'a, REG>
48where
49    REG: crate::Writable + crate::RegisterSpec,
50{
51    ///Puts the USART in mute mode and sets the RWU flag
52    #[inline(always)]
53    pub fn mute(self) -> &'a mut crate::W<REG> {
54        self.variant(MMRQ::Mute)
55    }
56}
57/**Receive data flush request
58
59Value on reset: 0*/
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum RXFRQ {
63    ///1: clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition
64    Discard = 1,
65}
66impl From<RXFRQ> for bool {
67    #[inline(always)]
68    fn from(variant: RXFRQ) -> Self {
69        variant as u8 != 0
70    }
71}
72///Field `RXFRQ` writer - Receive data flush request
73pub type RXFRQ_W<'a, REG> = crate::BitWriter<'a, REG, RXFRQ>;
74impl<'a, REG> RXFRQ_W<'a, REG>
75where
76    REG: crate::Writable + crate::RegisterSpec,
77{
78    ///clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition
79    #[inline(always)]
80    pub fn discard(self) -> &'a mut crate::W<REG> {
81        self.variant(RXFRQ::Discard)
82    }
83}
84impl core::fmt::Debug for crate::generic::Reg<RQRrs> {
85    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
86        write!(f, "(not readable)")
87    }
88}
89impl W {
90    ///Bit 1 - Send break request
91    #[inline(always)]
92    pub fn sbkrq(&mut self) -> SBKRQ_W<RQRrs> {
93        SBKRQ_W::new(self, 1)
94    }
95    ///Bit 2 - Mute mode request
96    #[inline(always)]
97    pub fn mmrq(&mut self) -> MMRQ_W<RQRrs> {
98        MMRQ_W::new(self, 2)
99    }
100    ///Bit 3 - Receive data flush request
101    #[inline(always)]
102    pub fn rxfrq(&mut self) -> RXFRQ_W<RQRrs> {
103        RXFRQ_W::new(self, 3)
104    }
105}
106/**Request register
107
108You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rqr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
109
110See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L4x1.html#LPUART1:RQR)*/
111pub struct RQRrs;
112impl crate::RegisterSpec for RQRrs {
113    type Ux = u32;
114}
115///`write(|w| ..)` method takes [`rqr::W`](W) writer structure
116impl crate::Writable for RQRrs {
117    type Safety = crate::Unsafe;
118}
119///`reset()` method sets RQR to value 0
120impl crate::Resettable for RQRrs {}
stm32l4/stm32l4x1/lpuart1/rqr.rs

stm32l4/stm32l4x1/lpuart1/
rqr.rs
