stm32l4/stm32l4x1/flash/
wrp1ar.rs

1///Register `WRP1AR` reader
2pub type R = crate::R<WRP1ARrs>;
3///Register `WRP1AR` writer
4pub type W = crate::W<WRP1ARrs>;
5///Field `WRP1A_STRT` reader - Bank 1 WRP first area tart offset
6pub type WRP1A_STRT_R = crate::FieldReader;
7///Field `WRP1A_STRT` writer - Bank 1 WRP first area tart offset
8pub type WRP1A_STRT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9///Field `WRP1A_END` reader - Bank 1 WRP first area A end offset
10pub type WRP1A_END_R = crate::FieldReader;
11///Field `WRP1A_END` writer - Bank 1 WRP first area A end offset
12pub type WRP1A_END_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13impl R {
14    ///Bits 0:7 - Bank 1 WRP first area tart offset
15    #[inline(always)]
16    pub fn wrp1a_strt(&self) -> WRP1A_STRT_R {
17        WRP1A_STRT_R::new((self.bits & 0xff) as u8)
18    }
19    ///Bits 16:23 - Bank 1 WRP first area A end offset
20    #[inline(always)]
21    pub fn wrp1a_end(&self) -> WRP1A_END_R {
22        WRP1A_END_R::new(((self.bits >> 16) & 0xff) as u8)
23    }
24}
25impl core::fmt::Debug for R {
26    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
27        f.debug_struct("WRP1AR")
28            .field("wrp1a_strt", &self.wrp1a_strt())
29            .field("wrp1a_end", &self.wrp1a_end())
30            .finish()
31    }
32}
33impl W {
34    ///Bits 0:7 - Bank 1 WRP first area tart offset
35    #[inline(always)]
36    pub fn wrp1a_strt(&mut self) -> WRP1A_STRT_W<WRP1ARrs> {
37        WRP1A_STRT_W::new(self, 0)
38    }
39    ///Bits 16:23 - Bank 1 WRP first area A end offset
40    #[inline(always)]
41    pub fn wrp1a_end(&mut self) -> WRP1A_END_W<WRP1ARrs> {
42        WRP1A_END_W::new(self, 16)
43    }
44}
45/**Flash Bank 1 WRP area A address register
46
47You can [`read`](crate::Reg::read) this register and get [`wrp1ar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wrp1ar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
48
49See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L4x1.html#FLASH:WRP1AR)*/
50pub struct WRP1ARrs;
51impl crate::RegisterSpec for WRP1ARrs {
52    type Ux = u32;
53}
54///`read()` method returns [`wrp1ar::R`](R) reader structure
55impl crate::Readable for WRP1ARrs {}
56///`write(|w| ..)` method takes [`wrp1ar::W`](W) writer structure
57impl crate::Writable for WRP1ARrs {
58    type Safety = crate::Unsafe;
59}
60///`reset()` method sets WRP1AR to value 0xff00_ff00
61impl crate::Resettable for WRP1ARrs {
62    const RESET_VALUE: u32 = 0xff00_ff00;
63}
stm32l4/stm32l4x1/flash/wrp1ar.rs

stm32l4/stm32l4x1/flash/
wrp1ar.rs
