stm32l4/stm32l4x1/flash/
sr.rs1pub type R = crate::R<SRrs>;
3pub type W = crate::W<SRrs>;
5pub type EOP_R = crate::BitReader;
7pub type EOP_W<'a, REG> = crate::BitWriter<'a, REG>;
9pub type OPERR_R = crate::BitReader;
11pub type OPERR_W<'a, REG> = crate::BitWriter<'a, REG>;
13pub type PROGERR_R = crate::BitReader;
15pub type PROGERR_W<'a, REG> = crate::BitWriter<'a, REG>;
17pub type WRPERR_R = crate::BitReader;
19pub type WRPERR_W<'a, REG> = crate::BitWriter<'a, REG>;
21pub type PGAERR_R = crate::BitReader;
23pub type PGAERR_W<'a, REG> = crate::BitWriter<'a, REG>;
25pub type SIZERR_R = crate::BitReader;
27pub type SIZERR_W<'a, REG> = crate::BitWriter<'a, REG>;
29pub type PGSERR_R = crate::BitReader;
31pub type PGSERR_W<'a, REG> = crate::BitWriter<'a, REG>;
33pub type MISERR_R = crate::BitReader;
35pub type MISERR_W<'a, REG> = crate::BitWriter<'a, REG>;
37pub type FASTERR_R = crate::BitReader;
39pub type FASTERR_W<'a, REG> = crate::BitWriter<'a, REG>;
41pub type RDERR_R = crate::BitReader;
43pub type RDERR_W<'a, REG> = crate::BitWriter<'a, REG>;
45pub type OPTVERR_R = crate::BitReader;
47pub type OPTVERR_W<'a, REG> = crate::BitWriter<'a, REG>;
49pub type BSY_R = crate::BitReader;
51impl R {
52 #[inline(always)]
54 pub fn eop(&self) -> EOP_R {
55 EOP_R::new((self.bits & 1) != 0)
56 }
57 #[inline(always)]
59 pub fn operr(&self) -> OPERR_R {
60 OPERR_R::new(((self.bits >> 1) & 1) != 0)
61 }
62 #[inline(always)]
64 pub fn progerr(&self) -> PROGERR_R {
65 PROGERR_R::new(((self.bits >> 3) & 1) != 0)
66 }
67 #[inline(always)]
69 pub fn wrperr(&self) -> WRPERR_R {
70 WRPERR_R::new(((self.bits >> 4) & 1) != 0)
71 }
72 #[inline(always)]
74 pub fn pgaerr(&self) -> PGAERR_R {
75 PGAERR_R::new(((self.bits >> 5) & 1) != 0)
76 }
77 #[inline(always)]
79 pub fn sizerr(&self) -> SIZERR_R {
80 SIZERR_R::new(((self.bits >> 6) & 1) != 0)
81 }
82 #[inline(always)]
84 pub fn pgserr(&self) -> PGSERR_R {
85 PGSERR_R::new(((self.bits >> 7) & 1) != 0)
86 }
87 #[inline(always)]
89 pub fn miserr(&self) -> MISERR_R {
90 MISERR_R::new(((self.bits >> 8) & 1) != 0)
91 }
92 #[inline(always)]
94 pub fn fasterr(&self) -> FASTERR_R {
95 FASTERR_R::new(((self.bits >> 9) & 1) != 0)
96 }
97 #[inline(always)]
99 pub fn rderr(&self) -> RDERR_R {
100 RDERR_R::new(((self.bits >> 14) & 1) != 0)
101 }
102 #[inline(always)]
104 pub fn optverr(&self) -> OPTVERR_R {
105 OPTVERR_R::new(((self.bits >> 15) & 1) != 0)
106 }
107 #[inline(always)]
109 pub fn bsy(&self) -> BSY_R {
110 BSY_R::new(((self.bits >> 16) & 1) != 0)
111 }
112}
113impl core::fmt::Debug for R {
114 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
115 f.debug_struct("SR")
116 .field("eop", &self.eop())
117 .field("operr", &self.operr())
118 .field("progerr", &self.progerr())
119 .field("wrperr", &self.wrperr())
120 .field("pgaerr", &self.pgaerr())
121 .field("sizerr", &self.sizerr())
122 .field("pgserr", &self.pgserr())
123 .field("miserr", &self.miserr())
124 .field("fasterr", &self.fasterr())
125 .field("rderr", &self.rderr())
126 .field("optverr", &self.optverr())
127 .field("bsy", &self.bsy())
128 .finish()
129 }
130}
131impl W {
132 #[inline(always)]
134 pub fn eop(&mut self) -> EOP_W<SRrs> {
135 EOP_W::new(self, 0)
136 }
137 #[inline(always)]
139 pub fn operr(&mut self) -> OPERR_W<SRrs> {
140 OPERR_W::new(self, 1)
141 }
142 #[inline(always)]
144 pub fn progerr(&mut self) -> PROGERR_W<SRrs> {
145 PROGERR_W::new(self, 3)
146 }
147 #[inline(always)]
149 pub fn wrperr(&mut self) -> WRPERR_W<SRrs> {
150 WRPERR_W::new(self, 4)
151 }
152 #[inline(always)]
154 pub fn pgaerr(&mut self) -> PGAERR_W<SRrs> {
155 PGAERR_W::new(self, 5)
156 }
157 #[inline(always)]
159 pub fn sizerr(&mut self) -> SIZERR_W<SRrs> {
160 SIZERR_W::new(self, 6)
161 }
162 #[inline(always)]
164 pub fn pgserr(&mut self) -> PGSERR_W<SRrs> {
165 PGSERR_W::new(self, 7)
166 }
167 #[inline(always)]
169 pub fn miserr(&mut self) -> MISERR_W<SRrs> {
170 MISERR_W::new(self, 8)
171 }
172 #[inline(always)]
174 pub fn fasterr(&mut self) -> FASTERR_W<SRrs> {
175 FASTERR_W::new(self, 9)
176 }
177 #[inline(always)]
179 pub fn rderr(&mut self) -> RDERR_W<SRrs> {
180 RDERR_W::new(self, 14)
181 }
182 #[inline(always)]
184 pub fn optverr(&mut self) -> OPTVERR_W<SRrs> {
185 OPTVERR_W::new(self, 15)
186 }
187}
188pub struct SRrs;
194impl crate::RegisterSpec for SRrs {
195 type Ux = u32;
196}
197impl crate::Readable for SRrs {}
199impl crate::Writable for SRrs {
201 type Safety = crate::Unsafe;
202}
203impl crate::Resettable for SRrs {}