stm32l4/stm32l4x1/can1/
rfr.rs

1///Register `RF%sR` reader
2pub type R = crate::R<RFRrs>;
3///Register `RF%sR` writer
4pub type W = crate::W<RFRrs>;
5///Field `FMP` reader - FMP0
6pub type FMP_R = crate::FieldReader;
7/**FULL0
8
9Value on reset: 0*/
10#[cfg_attr(feature = "defmt", derive(defmt::Format))]
11#[derive(Clone, Copy, Debug, PartialEq, Eq)]
12pub enum FULL0R {
13    ///0: FIFO x is not full
14    NotFull = 0,
15    ///1: FIFO x is full
16    Full = 1,
17}
18impl From<FULL0R> for bool {
19    #[inline(always)]
20    fn from(variant: FULL0R) -> Self {
21        variant as u8 != 0
22    }
23}
24///Field `FULL` reader - FULL0
25pub type FULL_R = crate::BitReader<FULL0R>;
26impl FULL_R {
27    ///Get enumerated values variant
28    #[inline(always)]
29    pub const fn variant(&self) -> FULL0R {
30        match self.bits {
31            false => FULL0R::NotFull,
32            true => FULL0R::Full,
33        }
34    }
35    ///FIFO x is not full
36    #[inline(always)]
37    pub fn is_not_full(&self) -> bool {
38        *self == FULL0R::NotFull
39    }
40    ///FIFO x is full
41    #[inline(always)]
42    pub fn is_full(&self) -> bool {
43        *self == FULL0R::Full
44    }
45}
46/**FULL0
47
48Value on reset: 0*/
49#[cfg_attr(feature = "defmt", derive(defmt::Format))]
50#[derive(Clone, Copy, Debug, PartialEq, Eq)]
51pub enum FULL0W {
52    ///1: Clear flag
53    Clear = 1,
54}
55impl From<FULL0W> for bool {
56    #[inline(always)]
57    fn from(variant: FULL0W) -> Self {
58        variant as u8 != 0
59    }
60}
61///Field `FULL` writer - FULL0
62pub type FULL_W<'a, REG> = crate::BitWriter<'a, REG, FULL0W>;
63impl<'a, REG> FULL_W<'a, REG>
64where
65    REG: crate::Writable + crate::RegisterSpec,
66{
67    ///Clear flag
68    #[inline(always)]
69    pub fn clear(self) -> &'a mut crate::W<REG> {
70        self.variant(FULL0W::Clear)
71    }
72}
73/**FOVR0
74
75Value on reset: 0*/
76#[cfg_attr(feature = "defmt", derive(defmt::Format))]
77#[derive(Clone, Copy, Debug, PartialEq, Eq)]
78pub enum FOVR0R {
79    ///0: No FIFO x overrun
80    NoOverrun = 0,
81    ///1: FIFO x overrun
82    Overrun = 1,
83}
84impl From<FOVR0R> for bool {
85    #[inline(always)]
86    fn from(variant: FOVR0R) -> Self {
87        variant as u8 != 0
88    }
89}
90///Field `FOVR` reader - FOVR0
91pub type FOVR_R = crate::BitReader<FOVR0R>;
92impl FOVR_R {
93    ///Get enumerated values variant
94    #[inline(always)]
95    pub const fn variant(&self) -> FOVR0R {
96        match self.bits {
97            false => FOVR0R::NoOverrun,
98            true => FOVR0R::Overrun,
99        }
100    }
101    ///No FIFO x overrun
102    #[inline(always)]
103    pub fn is_no_overrun(&self) -> bool {
104        *self == FOVR0R::NoOverrun
105    }
106    ///FIFO x overrun
107    #[inline(always)]
108    pub fn is_overrun(&self) -> bool {
109        *self == FOVR0R::Overrun
110    }
111}
112/**FOVR0
113
114Value on reset: 0*/
115#[cfg_attr(feature = "defmt", derive(defmt::Format))]
116#[derive(Clone, Copy, Debug, PartialEq, Eq)]
117pub enum FOVR0W {
118    ///1: Clear flag
119    Clear = 1,
120}
121impl From<FOVR0W> for bool {
122    #[inline(always)]
123    fn from(variant: FOVR0W) -> Self {
124        variant as u8 != 0
125    }
126}
127///Field `FOVR` writer - FOVR0
128pub type FOVR_W<'a, REG> = crate::BitWriter<'a, REG, FOVR0W>;
129impl<'a, REG> FOVR_W<'a, REG>
130where
131    REG: crate::Writable + crate::RegisterSpec,
132{
133    ///Clear flag
134    #[inline(always)]
135    pub fn clear(self) -> &'a mut crate::W<REG> {
136        self.variant(FOVR0W::Clear)
137    }
138}
139/**RFOM0
140
141Value on reset: 0*/
142#[cfg_attr(feature = "defmt", derive(defmt::Format))]
143#[derive(Clone, Copy, Debug, PartialEq, Eq)]
144pub enum RFOM0W {
145    ///1: Set by software to release the output mailbox of the FIFO
146    Release = 1,
147}
148impl From<RFOM0W> for bool {
149    #[inline(always)]
150    fn from(variant: RFOM0W) -> Self {
151        variant as u8 != 0
152    }
153}
154///Field `RFOM` reader - RFOM0
155pub type RFOM_R = crate::BitReader<RFOM0W>;
156impl RFOM_R {
157    ///Get enumerated values variant
158    #[inline(always)]
159    pub const fn variant(&self) -> Option<RFOM0W> {
160        match self.bits {
161            true => Some(RFOM0W::Release),
162            _ => None,
163        }
164    }
165    ///Set by software to release the output mailbox of the FIFO
166    #[inline(always)]
167    pub fn is_release(&self) -> bool {
168        *self == RFOM0W::Release
169    }
170}
171///Field `RFOM` writer - RFOM0
172pub type RFOM_W<'a, REG> = crate::BitWriter<'a, REG, RFOM0W>;
173impl<'a, REG> RFOM_W<'a, REG>
174where
175    REG: crate::Writable + crate::RegisterSpec,
176{
177    ///Set by software to release the output mailbox of the FIFO
178    #[inline(always)]
179    pub fn release(self) -> &'a mut crate::W<REG> {
180        self.variant(RFOM0W::Release)
181    }
182}
183impl R {
184    ///Bits 0:1 - FMP0
185    #[inline(always)]
186    pub fn fmp(&self) -> FMP_R {
187        FMP_R::new((self.bits & 3) as u8)
188    }
189    ///Bit 3 - FULL0
190    #[inline(always)]
191    pub fn full(&self) -> FULL_R {
192        FULL_R::new(((self.bits >> 3) & 1) != 0)
193    }
194    ///Bit 4 - FOVR0
195    #[inline(always)]
196    pub fn fovr(&self) -> FOVR_R {
197        FOVR_R::new(((self.bits >> 4) & 1) != 0)
198    }
199    ///Bit 5 - RFOM0
200    #[inline(always)]
201    pub fn rfom(&self) -> RFOM_R {
202        RFOM_R::new(((self.bits >> 5) & 1) != 0)
203    }
204}
205impl core::fmt::Debug for R {
206    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
207        f.debug_struct("RFR")
208            .field("rfom", &self.rfom())
209            .field("fovr", &self.fovr())
210            .field("full", &self.full())
211            .field("fmp", &self.fmp())
212            .finish()
213    }
214}
215impl W {
216    ///Bit 3 - FULL0
217    #[inline(always)]
218    pub fn full(&mut self) -> FULL_W<RFRrs> {
219        FULL_W::new(self, 3)
220    }
221    ///Bit 4 - FOVR0
222    #[inline(always)]
223    pub fn fovr(&mut self) -> FOVR_W<RFRrs> {
224        FOVR_W::new(self, 4)
225    }
226    ///Bit 5 - RFOM0
227    #[inline(always)]
228    pub fn rfom(&mut self) -> RFOM_W<RFRrs> {
229        RFOM_W::new(self, 5)
230    }
231}
232/**receive FIFO %s register
233
234You can [`read`](crate::Reg::read) this register and get [`rfr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rfr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
235
236See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L4x1.html#CAN1:RF[0]R)*/
237pub struct RFRrs;
238impl crate::RegisterSpec for RFRrs {
239    type Ux = u32;
240}
241///`read()` method returns [`rfr::R`](R) reader structure
242impl crate::Readable for RFRrs {}
243///`write(|w| ..)` method takes [`rfr::W`](W) writer structure
244impl crate::Writable for RFRrs {
245    type Safety = crate::Unsafe;
246}
247///`reset()` method sets RF%sR to value 0
248impl crate::Resettable for RFRrs {}
stm32l4/stm32l4x1/can1/rfr.rs

stm32l4/stm32l4x1/can1/
rfr.rs
