Struct stm32l151::sdio::mask::R
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pub struct R { /* fields omitted */ }
Value read from the register
Methods
impl R
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fn bits(&self) -> u32
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Value of the register as raw bits
fn ceataendie(&self) -> CEATAENDIER
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Bit 23 - CE-ATA command completion signal received interrupt enable
fn sdioitie(&self) -> SDIOITIER
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Bit 22 - SDIO mode interrupt received interrupt enable
fn rxdavlie(&self) -> RXDAVLIER
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Bit 21 - Data available in Rx FIFO interrupt enable
fn txdavlie(&self) -> TXDAVLIER
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Bit 20 - Data available in Tx FIFO interrupt enable
fn rxfifoeie(&self) -> RXFIFOEIER
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Bit 19 - Rx FIFO empty interrupt enable
fn txfifoeie(&self) -> TXFIFOEIER
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Bit 18 - Tx FIFO empty interrupt enable
fn rxfifofie(&self) -> RXFIFOFIER
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Bit 17 - Rx FIFO full interrupt enable
fn txfifofie(&self) -> TXFIFOFIER
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Bit 16 - Tx FIFO full interrupt enable
fn rxfifohfie(&self) -> RXFIFOHFIER
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Bit 15 - Rx FIFO half full interrupt enable
fn txfifoheie(&self) -> TXFIFOHEIER
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Bit 14 - Tx FIFO half empty interrupt enable
fn rxactie(&self) -> RXACTIER
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Bit 13 - Data receive acting interrupt enable
fn txactie(&self) -> TXACTIER
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Bit 12 - Data transmit acting interrupt enable
fn cmdactie(&self) -> CMDACTIER
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Bit 11 - Command acting interrupt enable
fn dbckendie(&self) -> DBCKENDIER
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Bit 10 - Data block end interrupt enable
fn stbiterrie(&self) -> STBITERRIER
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Bit 9 - Start bit error interrupt enable
fn dataendie(&self) -> DATAENDIER
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Bit 8 - Data end interrupt enable
fn cmdsentie(&self) -> CMDSENTIER
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Bit 7 - Command sent interrupt enable
fn cmdrendie(&self) -> CMDRENDIER
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Bit 6 - Command response received interrupt enable
fn rxoverrie(&self) -> RXOVERRIER
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Bit 5 - Rx FIFO overrun error interrupt enable
fn txunderrie(&self) -> TXUNDERRIER
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Bit 4 - Tx FIFO underrun error interrupt enable
fn dtimeoutie(&self) -> DTIMEOUTIER
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Bit 3 - Data timeout interrupt enable
fn ctimeoutie(&self) -> CTIMEOUTIER
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Bit 2 - Command timeout interrupt enable
fn dcrcfailie(&self) -> DCRCFAILIER
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Bit 1 - Data CRC fail interrupt enable
fn ccrcfailie(&self) -> CCRCFAILIER
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Bit 0 - Command CRC fail interrupt enable