[][src]Enum stm32l0xx_hal::stm32::lpuart1::cr2::RXINVW

pub enum RXINVW {
    STANDARD,
    INVERTED,
}

Values that can be written to the field RXINV

Variants

STANDARD

RX pin signal works using the standard logic levels

INVERTED

RX pin signal values are inverted

Trait Implementations

impl PartialEq<RXINVW> for RXINVW[src]

impl Debug for RXINVW[src]

impl Copy for RXINVW[src]

impl Clone for RXINVW[src]

Auto Trait Implementations

impl Unpin for RXINVW

impl Send for RXINVW

impl Sync for RXINVW

Blanket Implementations

impl<T> From<T> for T[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self