stm32l0/stm32l0x2/rtc/
or.rs

1///Register `OR` reader
2pub type R = crate::R<ORrs>;
3///Register `OR` writer
4pub type W = crate::W<ORrs>;
5///Field `RTC_ALARM_TYPE` reader - RTC_ALARM on PC13 output type
6pub type RTC_ALARM_TYPE_R = crate::BitReader;
7///Field `RTC_ALARM_TYPE` writer - RTC_ALARM on PC13 output type
8pub type RTC_ALARM_TYPE_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `RTC_OUT_RMP` reader - RTC_ALARM on PC13 output type
10pub type RTC_OUT_RMP_R = crate::BitReader;
11///Field `RTC_OUT_RMP` writer - RTC_ALARM on PC13 output type
12pub type RTC_OUT_RMP_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    ///Bit 0 - RTC_ALARM on PC13 output type
15    #[inline(always)]
16    pub fn rtc_alarm_type(&self) -> RTC_ALARM_TYPE_R {
17        RTC_ALARM_TYPE_R::new((self.bits & 1) != 0)
18    }
19    ///Bit 1 - RTC_ALARM on PC13 output type
20    #[inline(always)]
21    pub fn rtc_out_rmp(&self) -> RTC_OUT_RMP_R {
22        RTC_OUT_RMP_R::new(((self.bits >> 1) & 1) != 0)
23    }
24}
25impl core::fmt::Debug for R {
26    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
27        f.debug_struct("OR")
28            .field("rtc_out_rmp", &self.rtc_out_rmp())
29            .field("rtc_alarm_type", &self.rtc_alarm_type())
30            .finish()
31    }
32}
33impl W {
34    ///Bit 0 - RTC_ALARM on PC13 output type
35    #[inline(always)]
36    pub fn rtc_alarm_type(&mut self) -> RTC_ALARM_TYPE_W<ORrs> {
37        RTC_ALARM_TYPE_W::new(self, 0)
38    }
39    ///Bit 1 - RTC_ALARM on PC13 output type
40    #[inline(always)]
41    pub fn rtc_out_rmp(&mut self) -> RTC_OUT_RMP_W<ORrs> {
42        RTC_OUT_RMP_W::new(self, 1)
43    }
44}
45/**option register
46
47You can [`read`](crate::Reg::read) this register and get [`or::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`or::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
48
49See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L0x2.html#RTC:OR)*/
50pub struct ORrs;
51impl crate::RegisterSpec for ORrs {
52    type Ux = u32;
53}
54///`read()` method returns [`or::R`](R) reader structure
55impl crate::Readable for ORrs {}
56///`write(|w| ..)` method takes [`or::W`](W) writer structure
57impl crate::Writable for ORrs {
58    type Safety = crate::Unsafe;
59}
60///`reset()` method sets OR to value 0
61impl crate::Resettable for ORrs {}
stm32l0/stm32l0x2/rtc/or.rs

stm32l0/stm32l0x2/rtc/
or.rs
