stm32l0/stm32l0x1/i2c1/
icr.rs

1///Register `ICR` writer
2pub type W = crate::W<ICRrs>;
3/**Address Matched flag clear
4
5Value on reset: 0*/
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum ADDRCF {
9    ///1: Clears the ADDR flag in ISR register
10    Clear = 1,
11}
12impl From<ADDRCF> for bool {
13    #[inline(always)]
14    fn from(variant: ADDRCF) -> Self {
15        variant as u8 != 0
16    }
17}
18///Field `ADDRCF` writer - Address Matched flag clear
19pub type ADDRCF_W<'a, REG> = crate::BitWriter1C<'a, REG, ADDRCF>;
20impl<'a, REG> ADDRCF_W<'a, REG>
21where
22    REG: crate::Writable + crate::RegisterSpec,
23{
24    ///Clears the ADDR flag in ISR register
25    #[inline(always)]
26    pub fn clear(self) -> &'a mut crate::W<REG> {
27        self.variant(ADDRCF::Clear)
28    }
29}
30/**Not Acknowledge flag clear
31
32Value on reset: 0*/
33#[cfg_attr(feature = "defmt", derive(defmt::Format))]
34#[derive(Clone, Copy, Debug, PartialEq, Eq)]
35pub enum NACKCF {
36    ///1: Clears the NACK flag in ISR register
37    Clear = 1,
38}
39impl From<NACKCF> for bool {
40    #[inline(always)]
41    fn from(variant: NACKCF) -> Self {
42        variant as u8 != 0
43    }
44}
45///Field `NACKCF` writer - Not Acknowledge flag clear
46pub type NACKCF_W<'a, REG> = crate::BitWriter1C<'a, REG, NACKCF>;
47impl<'a, REG> NACKCF_W<'a, REG>
48where
49    REG: crate::Writable + crate::RegisterSpec,
50{
51    ///Clears the NACK flag in ISR register
52    #[inline(always)]
53    pub fn clear(self) -> &'a mut crate::W<REG> {
54        self.variant(NACKCF::Clear)
55    }
56}
57/**Stop detection flag clear
58
59Value on reset: 0*/
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum STOPCF {
63    ///1: Clears the STOP flag in ISR register
64    Clear = 1,
65}
66impl From<STOPCF> for bool {
67    #[inline(always)]
68    fn from(variant: STOPCF) -> Self {
69        variant as u8 != 0
70    }
71}
72///Field `STOPCF` writer - Stop detection flag clear
73pub type STOPCF_W<'a, REG> = crate::BitWriter1C<'a, REG, STOPCF>;
74impl<'a, REG> STOPCF_W<'a, REG>
75where
76    REG: crate::Writable + crate::RegisterSpec,
77{
78    ///Clears the STOP flag in ISR register
79    #[inline(always)]
80    pub fn clear(self) -> &'a mut crate::W<REG> {
81        self.variant(STOPCF::Clear)
82    }
83}
84/**Bus error flag clear
85
86Value on reset: 0*/
87#[cfg_attr(feature = "defmt", derive(defmt::Format))]
88#[derive(Clone, Copy, Debug, PartialEq, Eq)]
89pub enum BERRCF {
90    ///1: Clears the BERR flag in ISR register
91    Clear = 1,
92}
93impl From<BERRCF> for bool {
94    #[inline(always)]
95    fn from(variant: BERRCF) -> Self {
96        variant as u8 != 0
97    }
98}
99///Field `BERRCF` writer - Bus error flag clear
100pub type BERRCF_W<'a, REG> = crate::BitWriter1C<'a, REG, BERRCF>;
101impl<'a, REG> BERRCF_W<'a, REG>
102where
103    REG: crate::Writable + crate::RegisterSpec,
104{
105    ///Clears the BERR flag in ISR register
106    #[inline(always)]
107    pub fn clear(self) -> &'a mut crate::W<REG> {
108        self.variant(BERRCF::Clear)
109    }
110}
111/**Arbitration lost flag clear
112
113Value on reset: 0*/
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum ARLOCF {
117    ///1: Clears the ARLO flag in ISR register
118    Clear = 1,
119}
120impl From<ARLOCF> for bool {
121    #[inline(always)]
122    fn from(variant: ARLOCF) -> Self {
123        variant as u8 != 0
124    }
125}
126///Field `ARLOCF` writer - Arbitration lost flag clear
127pub type ARLOCF_W<'a, REG> = crate::BitWriter1C<'a, REG, ARLOCF>;
128impl<'a, REG> ARLOCF_W<'a, REG>
129where
130    REG: crate::Writable + crate::RegisterSpec,
131{
132    ///Clears the ARLO flag in ISR register
133    #[inline(always)]
134    pub fn clear(self) -> &'a mut crate::W<REG> {
135        self.variant(ARLOCF::Clear)
136    }
137}
138/**Overrun/Underrun flag clear
139
140Value on reset: 0*/
141#[cfg_attr(feature = "defmt", derive(defmt::Format))]
142#[derive(Clone, Copy, Debug, PartialEq, Eq)]
143pub enum OVRCF {
144    ///1: Clears the OVR flag in ISR register
145    Clear = 1,
146}
147impl From<OVRCF> for bool {
148    #[inline(always)]
149    fn from(variant: OVRCF) -> Self {
150        variant as u8 != 0
151    }
152}
153///Field `OVRCF` writer - Overrun/Underrun flag clear
154pub type OVRCF_W<'a, REG> = crate::BitWriter1C<'a, REG, OVRCF>;
155impl<'a, REG> OVRCF_W<'a, REG>
156where
157    REG: crate::Writable + crate::RegisterSpec,
158{
159    ///Clears the OVR flag in ISR register
160    #[inline(always)]
161    pub fn clear(self) -> &'a mut crate::W<REG> {
162        self.variant(OVRCF::Clear)
163    }
164}
165/**PEC Error flag clear
166
167Value on reset: 0*/
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum PECCF {
171    ///1: Clears the PEC flag in ISR register
172    Clear = 1,
173}
174impl From<PECCF> for bool {
175    #[inline(always)]
176    fn from(variant: PECCF) -> Self {
177        variant as u8 != 0
178    }
179}
180///Field `PECCF` writer - PEC Error flag clear
181pub type PECCF_W<'a, REG> = crate::BitWriter1C<'a, REG, PECCF>;
182impl<'a, REG> PECCF_W<'a, REG>
183where
184    REG: crate::Writable + crate::RegisterSpec,
185{
186    ///Clears the PEC flag in ISR register
187    #[inline(always)]
188    pub fn clear(self) -> &'a mut crate::W<REG> {
189        self.variant(PECCF::Clear)
190    }
191}
192/**Timeout detection flag clear
193
194Value on reset: 0*/
195#[cfg_attr(feature = "defmt", derive(defmt::Format))]
196#[derive(Clone, Copy, Debug, PartialEq, Eq)]
197pub enum TIMOUTCF {
198    ///1: Clears the TIMOUT flag in ISR register
199    Clear = 1,
200}
201impl From<TIMOUTCF> for bool {
202    #[inline(always)]
203    fn from(variant: TIMOUTCF) -> Self {
204        variant as u8 != 0
205    }
206}
207///Field `TIMOUTCF` writer - Timeout detection flag clear
208pub type TIMOUTCF_W<'a, REG> = crate::BitWriter1C<'a, REG, TIMOUTCF>;
209impl<'a, REG> TIMOUTCF_W<'a, REG>
210where
211    REG: crate::Writable + crate::RegisterSpec,
212{
213    ///Clears the TIMOUT flag in ISR register
214    #[inline(always)]
215    pub fn clear(self) -> &'a mut crate::W<REG> {
216        self.variant(TIMOUTCF::Clear)
217    }
218}
219/**Alert flag clear
220
221Value on reset: 0*/
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum ALERTCF {
225    ///1: Clears the ALERT flag in ISR register
226    Clear = 1,
227}
228impl From<ALERTCF> for bool {
229    #[inline(always)]
230    fn from(variant: ALERTCF) -> Self {
231        variant as u8 != 0
232    }
233}
234///Field `ALERTCF` writer - Alert flag clear
235pub type ALERTCF_W<'a, REG> = crate::BitWriter1C<'a, REG, ALERTCF>;
236impl<'a, REG> ALERTCF_W<'a, REG>
237where
238    REG: crate::Writable + crate::RegisterSpec,
239{
240    ///Clears the ALERT flag in ISR register
241    #[inline(always)]
242    pub fn clear(self) -> &'a mut crate::W<REG> {
243        self.variant(ALERTCF::Clear)
244    }
245}
246impl core::fmt::Debug for crate::generic::Reg<ICRrs> {
247    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
248        write!(f, "(not readable)")
249    }
250}
251impl W {
252    ///Bit 3 - Address Matched flag clear
253    #[inline(always)]
254    pub fn addrcf(&mut self) -> ADDRCF_W<ICRrs> {
255        ADDRCF_W::new(self, 3)
256    }
257    ///Bit 4 - Not Acknowledge flag clear
258    #[inline(always)]
259    pub fn nackcf(&mut self) -> NACKCF_W<ICRrs> {
260        NACKCF_W::new(self, 4)
261    }
262    ///Bit 5 - Stop detection flag clear
263    #[inline(always)]
264    pub fn stopcf(&mut self) -> STOPCF_W<ICRrs> {
265        STOPCF_W::new(self, 5)
266    }
267    ///Bit 8 - Bus error flag clear
268    #[inline(always)]
269    pub fn berrcf(&mut self) -> BERRCF_W<ICRrs> {
270        BERRCF_W::new(self, 8)
271    }
272    ///Bit 9 - Arbitration lost flag clear
273    #[inline(always)]
274    pub fn arlocf(&mut self) -> ARLOCF_W<ICRrs> {
275        ARLOCF_W::new(self, 9)
276    }
277    ///Bit 10 - Overrun/Underrun flag clear
278    #[inline(always)]
279    pub fn ovrcf(&mut self) -> OVRCF_W<ICRrs> {
280        OVRCF_W::new(self, 10)
281    }
282    ///Bit 11 - PEC Error flag clear
283    #[inline(always)]
284    pub fn peccf(&mut self) -> PECCF_W<ICRrs> {
285        PECCF_W::new(self, 11)
286    }
287    ///Bit 12 - Timeout detection flag clear
288    #[inline(always)]
289    pub fn timoutcf(&mut self) -> TIMOUTCF_W<ICRrs> {
290        TIMOUTCF_W::new(self, 12)
291    }
292    ///Bit 13 - Alert flag clear
293    #[inline(always)]
294    pub fn alertcf(&mut self) -> ALERTCF_W<ICRrs> {
295        ALERTCF_W::new(self, 13)
296    }
297}
298/**Interrupt clear register
299
300You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
301
302See register [structure](https://stm32-rs.github.io/stm32-rs/STM32L0x1.html#I2C1:ICR)*/
303pub struct ICRrs;
304impl crate::RegisterSpec for ICRrs {
305    type Ux = u32;
306}
307///`write(|w| ..)` method takes [`icr::W`](W) writer structure
308impl crate::Writable for ICRrs {
309    type Safety = crate::Unsafe;
310    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x3f38;
311}
312///`reset()` method sets ICR to value 0
313impl crate::Resettable for ICRrs {}
stm32l0/stm32l0x1/i2c1/icr.rs

stm32l0/stm32l0x1/i2c1/
icr.rs
