Struct stm32l0::W

pub struct W<U, REG> { /* fields omitted */ }

Register writer

Used as an argument to the closures in the write and modify methods of the register

Methods

impl<U, REG> W<U, REG>

pub unsafe fn bits(&mut self, bits: U) -> &mut Self

Writes raw bits to the register

impl W<u32, Reg<u32, _CR>>

pub fn dmaouten(&mut self) -> DMAOUTEN_W

Bit 12 - Enable DMA management of data output phase

pub fn dmainen(&mut self) -> DMAINEN_W

Bit 11 - Enable DMA management of data input phase

pub fn errie(&mut self) -> ERRIE_W

Bit 10 - Error interrupt enable

pub fn ccfie(&mut self) -> CCFIE_W

Bit 9 - CCF flag interrupt enable

pub fn errc(&mut self) -> ERRC_W

Bit 8 - Error clear

pub fn ccfc(&mut self) -> CCFC_W

Bit 7 - Computation Complete Flag Clear

pub fn chmod(&mut self) -> CHMOD_W

Bits 5:6 - AES chaining mode

pub fn mode(&mut self) -> MODE_W

Bits 3:4 - AES operating mode

pub fn datatype(&mut self) -> DATATYPE_W

Bits 1:2 - Data type selection (for data in and data out to/from the cryptographic block)

pub fn en(&mut self) -> EN_W

Bit 0 - AES enable

impl W<u32, Reg<u32, _DINR>>

pub fn din(&mut self) -> DIN_W

Bits 0:31 - Data Input Register.

impl W<u32, Reg<u32, _KEYR0>>

pub fn key0(&mut self) -> KEY0_W

Bits 0:31 - Data Output Register (LSB key [31:0])

impl W<u32, Reg<u32, _KEYR1>>

pub fn key1(&mut self) -> KEY1_W

Bits 0:31 - AES key register (key [63:32])

impl W<u32, Reg<u32, _KEYR2>>

pub fn key2(&mut self) -> KEY2_W

Bits 0:31 - AES key register (key [95:64])

impl W<u32, Reg<u32, _KEYR3>>

pub fn key3(&mut self) -> KEY3_W

Bits 0:31 - AES key register (MSB key [127:96])

impl W<u32, Reg<u32, _IVR0>>

pub fn iv0(&mut self) -> IV0_W

Bits 0:31 - initialization vector register (LSB IVR [31:0])

impl W<u32, Reg<u32, _IVR1>>

pub fn iv1(&mut self) -> IV1_W

Bits 0:31 - Initialization Vector Register (IVR [63:32])

impl W<u32, Reg<u32, _IVR2>>

pub fn iv2(&mut self) -> IV2_W

Bits 0:31 - Initialization Vector Register (IVR [95:64])

impl W<u32, Reg<u32, _IVR3>>

pub fn iv3(&mut self) -> IV3_W

Bits 0:31 - Initialization Vector Register (MSB IVR [127:96])

impl W<u32, Reg<u32, _CR>>

pub fn mem2mem(&mut self) -> MEM2MEM_W

Bit 14 - Memory to memory mode

pub fn pl(&mut self) -> PL_W

Bits 12:13 - Channel priority level

pub fn msize(&mut self) -> MSIZE_W

Bits 10:11 - Memory size

pub fn psize(&mut self) -> PSIZE_W

Bits 8:9 - Peripheral size

pub fn minc(&mut self) -> MINC_W

Bit 7 - Memory increment mode

pub fn pinc(&mut self) -> PINC_W

Bit 6 - Peripheral increment mode

pub fn circ(&mut self) -> CIRC_W

Bit 5 - Circular mode

pub fn dir(&mut self) -> DIR_W

Bit 4 - Data transfer direction

pub fn teie(&mut self) -> TEIE_W

Bit 3 - Transfer error interrupt enable

pub fn htie(&mut self) -> HTIE_W

Bit 2 - Half transfer interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 1 - Transfer complete interrupt enable

pub fn en(&mut self) -> EN_W

Bit 0 - Channel enable

impl W<u32, Reg<u32, _NDTR>>

pub fn ndt(&mut self) -> NDT_W

Bits 0:15 - Number of data to transfer

impl W<u32, Reg<u32, _PAR>>

pub fn pa(&mut self) -> PA_W

Bits 0:31 - Peripheral address

impl W<u32, Reg<u32, _MAR>>

pub fn ma(&mut self) -> MA_W

Bits 0:31 - Memory address

impl W<u32, Reg<u32, _IFCR>>

pub fn cteif7(&mut self) -> CTEIF7_W

Bit 27 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif7(&mut self) -> CHTIF7_W

Bit 26 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif7(&mut self) -> CTCIF7_W

Bit 25 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif7(&mut self) -> CGIF7_W

Bit 24 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif6(&mut self) -> CTEIF6_W

Bit 23 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif6(&mut self) -> CHTIF6_W

Bit 22 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif6(&mut self) -> CTCIF6_W

Bit 21 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif6(&mut self) -> CGIF6_W

Bit 20 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif5(&mut self) -> CTEIF5_W

Bit 19 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif5(&mut self) -> CHTIF5_W

Bit 18 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif5(&mut self) -> CTCIF5_W

Bit 17 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif5(&mut self) -> CGIF5_W

Bit 16 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif4(&mut self) -> CTEIF4_W

Bit 15 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif4(&mut self) -> CHTIF4_W

Bit 14 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif4(&mut self) -> CTCIF4_W

Bit 13 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif4(&mut self) -> CGIF4_W

Bit 12 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif3(&mut self) -> CTEIF3_W

Bit 11 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif3(&mut self) -> CHTIF3_W

Bit 10 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif3(&mut self) -> CTCIF3_W

Bit 9 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif3(&mut self) -> CGIF3_W

Bit 8 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif2(&mut self) -> CTEIF2_W

Bit 7 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif2(&mut self) -> CHTIF2_W

Bit 6 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif2(&mut self) -> CTCIF2_W

Bit 5 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif2(&mut self) -> CGIF2_W

Bit 4 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif1(&mut self) -> CTEIF1_W

Bit 3 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif1(&mut self) -> CHTIF1_W

Bit 2 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif1(&mut self) -> CTCIF1_W

Bit 1 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif1(&mut self) -> CGIF1_W

Bit 0 - Channel x global interrupt clear (x = 1 ..7)

impl W<u32, Reg<u32, _CSELR>>

pub fn c7s(&mut self) -> C7S_W

Bits 24:27 - DMA channel 7 selection

pub fn c6s(&mut self) -> C6S_W

Bits 20:23 - DMA channel 6 selection

pub fn c5s(&mut self) -> C5S_W

Bits 16:19 - DMA channel 5 selection

pub fn c4s(&mut self) -> C4S_W

Bits 12:15 - DMA channel 4 selection

pub fn c3s(&mut self) -> C3S_W

Bits 8:11 - DMA channel 3 selection

pub fn c2s(&mut self) -> C2S_W

Bits 4:7 - DMA channel 2 selection

pub fn c1s(&mut self) -> C1S_W

Bits 0:3 - DMA channel 1 selection

impl W<u32, Reg<u32, _DR>>

pub fn dr(&mut self) -> DR_W

Bits 0:31 - Data register bits

impl W<u32, Reg<u32, _IDR>>

pub fn idr(&mut self) -> IDR_W

Bits 0:7 - General-purpose 8-bit data register bits

impl W<u32, Reg<u32, _CR>>

pub fn rev_out(&mut self) -> REV_OUT_W

Bit 7 - Reverse output data

pub fn rev_in(&mut self) -> REV_IN_W

Bits 5:6 - Reverse input data

pub fn polysize(&mut self) -> POLYSIZE_W

Bits 3:4 - Polynomial size

pub fn reset(&mut self) -> RESET_W

Bit 0 - RESET bit

impl W<u32, Reg<u32, _INIT>>

pub fn crc_init(&mut self) -> CRC_INIT_W

Bits 0:31 - Programmable initial CRC value

impl W<u32, Reg<u32, _POL>>

pub fn pol(&mut self) -> POL_W

Bits 0:31 - Programmable polynomial

impl W<u32, Reg<u32, _MODER>>

pub fn mode0(&mut self) -> MODE0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

pub fn mode1(&mut self) -> MODE1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn mode2(&mut self) -> MODE2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn mode3(&mut self) -> MODE3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn mode4(&mut self) -> MODE4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn mode5(&mut self) -> MODE5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn mode6(&mut self) -> MODE6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn mode7(&mut self) -> MODE7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn mode8(&mut self) -> MODE8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn mode9(&mut self) -> MODE9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn mode10(&mut self) -> MODE10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn mode11(&mut self) -> MODE11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn mode12(&mut self) -> MODE12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn mode13(&mut self) -> MODE13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn mode14(&mut self) -> MODE14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn mode15(&mut self) -> MODE15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OTYPER>>

pub fn ot15(&mut self) -> OT15_W

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&mut self) -> OT14_W

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&mut self) -> OT13_W

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&mut self) -> OT12_W

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&mut self) -> OT11_W

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&mut self) -> OT10_W

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&mut self) -> OT9_W

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&mut self) -> OT8_W

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&mut self) -> OT7_W

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&mut self) -> OT6_W

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&mut self) -> OT5_W

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&mut self) -> OT4_W

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&mut self) -> OT3_W

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&mut self) -> OT2_W

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&mut self) -> OT1_W

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&mut self) -> OT0_W

Bit 0 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OSPEEDR>>

pub fn ospeed15(&mut self) -> OSPEED15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeed14(&mut self) -> OSPEED14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeed13(&mut self) -> OSPEED13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeed12(&mut self) -> OSPEED12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeed11(&mut self) -> OSPEED11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeed10(&mut self) -> OSPEED10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeed9(&mut self) -> OSPEED9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeed8(&mut self) -> OSPEED8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeed7(&mut self) -> OSPEED7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeed6(&mut self) -> OSPEED6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeed5(&mut self) -> OSPEED5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeed4(&mut self) -> OSPEED4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeed3(&mut self) -> OSPEED3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeed2(&mut self) -> OSPEED2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeed1(&mut self) -> OSPEED1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeed0(&mut self) -> OSPEED0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _PUPDR>>

pub fn pupd15(&mut self) -> PUPD15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupd14(&mut self) -> PUPD14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupd13(&mut self) -> PUPD13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupd12(&mut self) -> PUPD12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupd11(&mut self) -> PUPD11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupd10(&mut self) -> PUPD10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupd9(&mut self) -> PUPD9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupd8(&mut self) -> PUPD8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupd7(&mut self) -> PUPD7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupd6(&mut self) -> PUPD6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupd5(&mut self) -> PUPD5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupd4(&mut self) -> PUPD4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupd3(&mut self) -> PUPD3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupd2(&mut self) -> PUPD2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupd1(&mut self) -> PUPD1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupd0(&mut self) -> PUPD0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _ODR>>

pub fn od15(&mut self) -> OD15_W

Bit 15 - Port output data bit (y = 0..15)

pub fn od14(&mut self) -> OD14_W

Bit 14 - Port output data bit (y = 0..15)

pub fn od13(&mut self) -> OD13_W

Bit 13 - Port output data bit (y = 0..15)

pub fn od12(&mut self) -> OD12_W

Bit 12 - Port output data bit (y = 0..15)

pub fn od11(&mut self) -> OD11_W

Bit 11 - Port output data bit (y = 0..15)

pub fn od10(&mut self) -> OD10_W

Bit 10 - Port output data bit (y = 0..15)

pub fn od9(&mut self) -> OD9_W

Bit 9 - Port output data bit (y = 0..15)

pub fn od8(&mut self) -> OD8_W

Bit 8 - Port output data bit (y = 0..15)

pub fn od7(&mut self) -> OD7_W

Bit 7 - Port output data bit (y = 0..15)

pub fn od6(&mut self) -> OD6_W

Bit 6 - Port output data bit (y = 0..15)

pub fn od5(&mut self) -> OD5_W

Bit 5 - Port output data bit (y = 0..15)

pub fn od4(&mut self) -> OD4_W

Bit 4 - Port output data bit (y = 0..15)

pub fn od3(&mut self) -> OD3_W

Bit 3 - Port output data bit (y = 0..15)

pub fn od2(&mut self) -> OD2_W

Bit 2 - Port output data bit (y = 0..15)

pub fn od1(&mut self) -> OD1_W

Bit 1 - Port output data bit (y = 0..15)

pub fn od0(&mut self) -> OD0_W

Bit 0 - Port output data bit (y = 0..15)

impl W<u32, Reg<u32, _BSRR>>

pub fn br15(&mut self) -> BR15_W

Bit 31 - Port x reset bit y (y = 0..15)

pub fn br14(&mut self) -> BR14_W

Bit 30 - Port x reset bit y (y = 0..15)

pub fn br13(&mut self) -> BR13_W

Bit 29 - Port x reset bit y (y = 0..15)

pub fn br12(&mut self) -> BR12_W

Bit 28 - Port x reset bit y (y = 0..15)

pub fn br11(&mut self) -> BR11_W

Bit 27 - Port x reset bit y (y = 0..15)

pub fn br10(&mut self) -> BR10_W

Bit 26 - Port x reset bit y (y = 0..15)

pub fn br9(&mut self) -> BR9_W

Bit 25 - Port x reset bit y (y = 0..15)

pub fn br8(&mut self) -> BR8_W

Bit 24 - Port x reset bit y (y = 0..15)

pub fn br7(&mut self) -> BR7_W

Bit 23 - Port x reset bit y (y = 0..15)

pub fn br6(&mut self) -> BR6_W

Bit 22 - Port x reset bit y (y = 0..15)

pub fn br5(&mut self) -> BR5_W

Bit 21 - Port x reset bit y (y = 0..15)

pub fn br4(&mut self) -> BR4_W

Bit 20 - Port x reset bit y (y = 0..15)

pub fn br3(&mut self) -> BR3_W

Bit 19 - Port x reset bit y (y = 0..15)

pub fn br2(&mut self) -> BR2_W

Bit 18 - Port x reset bit y (y = 0..15)

pub fn br1(&mut self) -> BR1_W

Bit 17 - Port x reset bit y (y = 0..15)

pub fn br0(&mut self) -> BR0_W

Bit 16 - Port x reset bit y (y = 0..15)

pub fn bs15(&mut self) -> BS15_W

Bit 15 - Port x set bit y (y= 0..15)

pub fn bs14(&mut self) -> BS14_W

Bit 14 - Port x set bit y (y= 0..15)

pub fn bs13(&mut self) -> BS13_W

Bit 13 - Port x set bit y (y= 0..15)

pub fn bs12(&mut self) -> BS12_W

Bit 12 - Port x set bit y (y= 0..15)

pub fn bs11(&mut self) -> BS11_W

Bit 11 - Port x set bit y (y= 0..15)

pub fn bs10(&mut self) -> BS10_W

Bit 10 - Port x set bit y (y= 0..15)

pub fn bs9(&mut self) -> BS9_W

Bit 9 - Port x set bit y (y= 0..15)

pub fn bs8(&mut self) -> BS8_W

Bit 8 - Port x set bit y (y= 0..15)

pub fn bs7(&mut self) -> BS7_W

Bit 7 - Port x set bit y (y= 0..15)

pub fn bs6(&mut self) -> BS6_W

Bit 6 - Port x set bit y (y= 0..15)

pub fn bs5(&mut self) -> BS5_W

Bit 5 - Port x set bit y (y= 0..15)

pub fn bs4(&mut self) -> BS4_W

Bit 4 - Port x set bit y (y= 0..15)

pub fn bs3(&mut self) -> BS3_W

Bit 3 - Port x set bit y (y= 0..15)

pub fn bs2(&mut self) -> BS2_W

Bit 2 - Port x set bit y (y= 0..15)

pub fn bs1(&mut self) -> BS1_W

Bit 1 - Port x set bit y (y= 0..15)

pub fn bs0(&mut self) -> BS0_W

Bit 0 - Port x set bit y (y= 0..15)

impl W<u32, Reg<u32, _LCKR>>

pub fn lckk(&mut self) -> LCKK_W

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&mut self) -> LCK15_W

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&mut self) -> LCK14_W

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&mut self) -> LCK13_W

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&mut self) -> LCK12_W

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&mut self) -> LCK11_W

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&mut self) -> LCK10_W

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&mut self) -> LCK9_W

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&mut self) -> LCK8_W

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&mut self) -> LCK7_W

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&mut self) -> LCK6_W

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&mut self) -> LCK5_W

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&mut self) -> LCK4_W

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&mut self) -> LCK3_W

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&mut self) -> LCK2_W

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&mut self) -> LCK1_W

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&mut self) -> LCK0_W

Bit 0 - Port x lock bit y (y= 0..15)

impl W<u32, Reg<u32, _AFRL>>

pub fn afsel7(&mut self) -> AFSEL7_W

Bits 28:31 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel6(&mut self) -> AFSEL6_W

Bits 24:27 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel5(&mut self) -> AFSEL5_W

Bits 20:23 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel4(&mut self) -> AFSEL4_W

Bits 16:19 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel3(&mut self) -> AFSEL3_W

Bits 12:15 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel2(&mut self) -> AFSEL2_W

Bits 8:11 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel1(&mut self) -> AFSEL1_W

Bits 4:7 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel0(&mut self) -> AFSEL0_W

Bits 0:3 - Alternate function selection for port x pin y (y = 0..7)

impl W<u32, Reg<u32, _AFRH>>

pub fn afsel15(&mut self) -> AFSEL15_W

Bits 28:31 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel14(&mut self) -> AFSEL14_W

Bits 24:27 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel13(&mut self) -> AFSEL13_W

Bits 20:23 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel12(&mut self) -> AFSEL12_W

Bits 16:19 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel11(&mut self) -> AFSEL11_W

Bits 12:15 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel10(&mut self) -> AFSEL10_W

Bits 8:11 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel9(&mut self) -> AFSEL9_W

Bits 4:7 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel8(&mut self) -> AFSEL8_W

Bits 0:3 - Alternate function selection for port x pin y (y = 8..15)

impl W<u32, Reg<u32, _BRR>>

pub fn br15(&mut self) -> BR15_W

Bit 15 - Port x Reset bit y (y= 0 .. 15)

pub fn br14(&mut self) -> BR14_W

Bit 14 - Port x Reset bit y (y= 0 .. 15)

pub fn br13(&mut self) -> BR13_W

Bit 13 - Port x Reset bit y (y= 0 .. 15)

pub fn br12(&mut self) -> BR12_W

Bit 12 - Port x Reset bit y (y= 0 .. 15)

pub fn br11(&mut self) -> BR11_W

Bit 11 - Port x Reset bit y (y= 0 .. 15)

pub fn br10(&mut self) -> BR10_W

Bit 10 - Port x Reset bit y (y= 0 .. 15)

pub fn br9(&mut self) -> BR9_W

Bit 9 - Port x Reset bit y (y= 0 .. 15)

pub fn br8(&mut self) -> BR8_W

Bit 8 - Port x Reset bit y (y= 0 .. 15)

pub fn br7(&mut self) -> BR7_W

Bit 7 - Port x Reset bit y (y= 0 .. 15)

pub fn br6(&mut self) -> BR6_W

Bit 6 - Port x Reset bit y (y= 0 .. 15)

pub fn br5(&mut self) -> BR5_W

Bit 5 - Port x Reset bit y (y= 0 .. 15)

pub fn br4(&mut self) -> BR4_W

Bit 4 - Port x Reset bit y (y= 0 .. 15)

pub fn br3(&mut self) -> BR3_W

Bit 3 - Port x Reset bit y (y= 0 .. 15)

pub fn br2(&mut self) -> BR2_W

Bit 2 - Port x Reset bit y (y= 0 .. 15)

pub fn br1(&mut self) -> BR1_W

Bit 1 - Port x Reset bit y (y= 0 .. 15)

pub fn br0(&mut self) -> BR0_W

Bit 0 - Port x Reset bit y (y= 0 .. 15)

impl W<u32, Reg<u32, _MODER>>

pub fn mode15(&mut self) -> MODE15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn mode14(&mut self) -> MODE14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn mode13(&mut self) -> MODE13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn mode12(&mut self) -> MODE12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn mode11(&mut self) -> MODE11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn mode10(&mut self) -> MODE10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn mode9(&mut self) -> MODE9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn mode8(&mut self) -> MODE8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn mode7(&mut self) -> MODE7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn mode6(&mut self) -> MODE6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn mode5(&mut self) -> MODE5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn mode4(&mut self) -> MODE4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn mode3(&mut self) -> MODE3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn mode2(&mut self) -> MODE2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn mode1(&mut self) -> MODE1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn mode0(&mut self) -> MODE0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OTYPER>>

pub fn ot15(&mut self) -> OT15_W

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&mut self) -> OT14_W

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&mut self) -> OT13_W

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&mut self) -> OT12_W

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&mut self) -> OT11_W

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&mut self) -> OT10_W

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&mut self) -> OT9_W

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&mut self) -> OT8_W

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&mut self) -> OT7_W

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&mut self) -> OT6_W

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&mut self) -> OT5_W

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&mut self) -> OT4_W

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&mut self) -> OT3_W

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&mut self) -> OT2_W

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&mut self) -> OT1_W

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&mut self) -> OT0_W

Bit 0 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OSPEEDR>>

pub fn ospeed15(&mut self) -> OSPEED15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeed14(&mut self) -> OSPEED14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeed13(&mut self) -> OSPEED13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeed12(&mut self) -> OSPEED12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeed11(&mut self) -> OSPEED11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeed10(&mut self) -> OSPEED10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeed9(&mut self) -> OSPEED9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeed8(&mut self) -> OSPEED8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeed7(&mut self) -> OSPEED7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeed6(&mut self) -> OSPEED6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeed5(&mut self) -> OSPEED5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeed4(&mut self) -> OSPEED4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeed3(&mut self) -> OSPEED3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeed2(&mut self) -> OSPEED2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeed1(&mut self) -> OSPEED1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeed0(&mut self) -> OSPEED0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _PUPDR>>

pub fn pupd15(&mut self) -> PUPD15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupd14(&mut self) -> PUPD14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupd13(&mut self) -> PUPD13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupd12(&mut self) -> PUPD12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupd11(&mut self) -> PUPD11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupd10(&mut self) -> PUPD10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupd9(&mut self) -> PUPD9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupd8(&mut self) -> PUPD8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupd7(&mut self) -> PUPD7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupd6(&mut self) -> PUPD6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupd5(&mut self) -> PUPD5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupd4(&mut self) -> PUPD4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupd3(&mut self) -> PUPD3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupd2(&mut self) -> PUPD2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupd1(&mut self) -> PUPD1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupd0(&mut self) -> PUPD0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _ODR>>

pub fn od15(&mut self) -> OD15_W

Bit 15 - Port output data bit (y = 0..15)

pub fn od14(&mut self) -> OD14_W

Bit 14 - Port output data bit (y = 0..15)

pub fn od13(&mut self) -> OD13_W

Bit 13 - Port output data bit (y = 0..15)

pub fn od12(&mut self) -> OD12_W

Bit 12 - Port output data bit (y = 0..15)

pub fn od11(&mut self) -> OD11_W

Bit 11 - Port output data bit (y = 0..15)

pub fn od10(&mut self) -> OD10_W

Bit 10 - Port output data bit (y = 0..15)

pub fn od9(&mut self) -> OD9_W

Bit 9 - Port output data bit (y = 0..15)

pub fn od8(&mut self) -> OD8_W

Bit 8 - Port output data bit (y = 0..15)

pub fn od7(&mut self) -> OD7_W

Bit 7 - Port output data bit (y = 0..15)

pub fn od6(&mut self) -> OD6_W

Bit 6 - Port output data bit (y = 0..15)

pub fn od5(&mut self) -> OD5_W

Bit 5 - Port output data bit (y = 0..15)

pub fn od4(&mut self) -> OD4_W

Bit 4 - Port output data bit (y = 0..15)

pub fn od3(&mut self) -> OD3_W

Bit 3 - Port output data bit (y = 0..15)

pub fn od2(&mut self) -> OD2_W

Bit 2 - Port output data bit (y = 0..15)

pub fn od1(&mut self) -> OD1_W

Bit 1 - Port output data bit (y = 0..15)

pub fn od0(&mut self) -> OD0_W

Bit 0 - Port output data bit (y = 0..15)

impl W<u32, Reg<u32, _BSRR>>

pub fn br15(&mut self) -> BR15_W

Bit 31 - Port x reset bit y (y = 0..15)

pub fn br14(&mut self) -> BR14_W

Bit 30 - Port x reset bit y (y = 0..15)

pub fn br13(&mut self) -> BR13_W

Bit 29 - Port x reset bit y (y = 0..15)

pub fn br12(&mut self) -> BR12_W

Bit 28 - Port x reset bit y (y = 0..15)

pub fn br11(&mut self) -> BR11_W

Bit 27 - Port x reset bit y (y = 0..15)

pub fn br10(&mut self) -> BR10_W

Bit 26 - Port x reset bit y (y = 0..15)

pub fn br9(&mut self) -> BR9_W

Bit 25 - Port x reset bit y (y = 0..15)

pub fn br8(&mut self) -> BR8_W

Bit 24 - Port x reset bit y (y = 0..15)

pub fn br7(&mut self) -> BR7_W

Bit 23 - Port x reset bit y (y = 0..15)

pub fn br6(&mut self) -> BR6_W

Bit 22 - Port x reset bit y (y = 0..15)

pub fn br5(&mut self) -> BR5_W

Bit 21 - Port x reset bit y (y = 0..15)

pub fn br4(&mut self) -> BR4_W

Bit 20 - Port x reset bit y (y = 0..15)

pub fn br3(&mut self) -> BR3_W

Bit 19 - Port x reset bit y (y = 0..15)

pub fn br2(&mut self) -> BR2_W

Bit 18 - Port x reset bit y (y = 0..15)

pub fn br1(&mut self) -> BR1_W

Bit 17 - Port x reset bit y (y = 0..15)

pub fn br0(&mut self) -> BR0_W

Bit 16 - Port x reset bit y (y = 0..15)

pub fn bs15(&mut self) -> BS15_W

Bit 15 - Port x set bit y (y= 0..15)

pub fn bs14(&mut self) -> BS14_W

Bit 14 - Port x set bit y (y= 0..15)

pub fn bs13(&mut self) -> BS13_W

Bit 13 - Port x set bit y (y= 0..15)

pub fn bs12(&mut self) -> BS12_W

Bit 12 - Port x set bit y (y= 0..15)

pub fn bs11(&mut self) -> BS11_W

Bit 11 - Port x set bit y (y= 0..15)

pub fn bs10(&mut self) -> BS10_W

Bit 10 - Port x set bit y (y= 0..15)

pub fn bs9(&mut self) -> BS9_W

Bit 9 - Port x set bit y (y= 0..15)

pub fn bs8(&mut self) -> BS8_W

Bit 8 - Port x set bit y (y= 0..15)

pub fn bs7(&mut self) -> BS7_W

Bit 7 - Port x set bit y (y= 0..15)

pub fn bs6(&mut self) -> BS6_W

Bit 6 - Port x set bit y (y= 0..15)

pub fn bs5(&mut self) -> BS5_W

Bit 5 - Port x set bit y (y= 0..15)

pub fn bs4(&mut self) -> BS4_W

Bit 4 - Port x set bit y (y= 0..15)

pub fn bs3(&mut self) -> BS3_W

Bit 3 - Port x set bit y (y= 0..15)

pub fn bs2(&mut self) -> BS2_W

Bit 2 - Port x set bit y (y= 0..15)

pub fn bs1(&mut self) -> BS1_W

Bit 1 - Port x set bit y (y= 0..15)

pub fn bs0(&mut self) -> BS0_W

Bit 0 - Port x set bit y (y= 0..15)

impl W<u32, Reg<u32, _LCKR>>

pub fn lckk(&mut self) -> LCKK_W

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&mut self) -> LCK15_W

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&mut self) -> LCK14_W

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&mut self) -> LCK13_W

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&mut self) -> LCK12_W

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&mut self) -> LCK11_W

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&mut self) -> LCK10_W

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&mut self) -> LCK9_W

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&mut self) -> LCK8_W

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&mut self) -> LCK7_W

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&mut self) -> LCK6_W

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&mut self) -> LCK5_W

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&mut self) -> LCK4_W

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&mut self) -> LCK3_W

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&mut self) -> LCK2_W

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&mut self) -> LCK1_W

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&mut self) -> LCK0_W

Bit 0 - Port x lock bit y (y= 0..15)

impl W<u32, Reg<u32, _AFRL>>

pub fn afsel7(&mut self) -> AFSEL7_W

Bits 28:31 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel6(&mut self) -> AFSEL6_W

Bits 24:27 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel5(&mut self) -> AFSEL5_W

Bits 20:23 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel4(&mut self) -> AFSEL4_W

Bits 16:19 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel3(&mut self) -> AFSEL3_W

Bits 12:15 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel2(&mut self) -> AFSEL2_W

Bits 8:11 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel1(&mut self) -> AFSEL1_W

Bits 4:7 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel0(&mut self) -> AFSEL0_W

Bits 0:3 - Alternate function selection for port x pin y (y = 0..7)

impl W<u32, Reg<u32, _AFRH>>

pub fn afsel15(&mut self) -> AFSEL15_W

Bits 28:31 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel14(&mut self) -> AFSEL14_W

Bits 24:27 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel13(&mut self) -> AFSEL13_W

Bits 20:23 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel12(&mut self) -> AFSEL12_W

Bits 16:19 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel11(&mut self) -> AFSEL11_W

Bits 12:15 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel10(&mut self) -> AFSEL10_W

Bits 8:11 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel9(&mut self) -> AFSEL9_W

Bits 4:7 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel8(&mut self) -> AFSEL8_W

Bits 0:3 - Alternate function selection for port x pin y (y = 8..15)

impl W<u32, Reg<u32, _BRR>>

pub fn br15(&mut self) -> BR15_W

Bit 15 - Port x Reset bit y (y= 0 .. 15)

pub fn br14(&mut self) -> BR14_W

Bit 14 - Port x Reset bit y (y= 0 .. 15)

pub fn br13(&mut self) -> BR13_W

Bit 13 - Port x Reset bit y (y= 0 .. 15)

pub fn br12(&mut self) -> BR12_W

Bit 12 - Port x Reset bit y (y= 0 .. 15)

pub fn br11(&mut self) -> BR11_W

Bit 11 - Port x Reset bit y (y= 0 .. 15)

pub fn br10(&mut self) -> BR10_W

Bit 10 - Port x Reset bit y (y= 0 .. 15)

pub fn br9(&mut self) -> BR9_W

Bit 9 - Port x Reset bit y (y= 0 .. 15)

pub fn br8(&mut self) -> BR8_W

Bit 8 - Port x Reset bit y (y= 0 .. 15)

pub fn br7(&mut self) -> BR7_W

Bit 7 - Port x Reset bit y (y= 0 .. 15)

pub fn br6(&mut self) -> BR6_W

Bit 6 - Port x Reset bit y (y= 0 .. 15)

pub fn br5(&mut self) -> BR5_W

Bit 5 - Port x Reset bit y (y= 0 .. 15)

pub fn br4(&mut self) -> BR4_W

Bit 4 - Port x Reset bit y (y= 0 .. 15)

pub fn br3(&mut self) -> BR3_W

Bit 3 - Port x Reset bit y (y= 0 .. 15)

pub fn br2(&mut self) -> BR2_W

Bit 2 - Port x Reset bit y (y= 0 .. 15)

pub fn br1(&mut self) -> BR1_W

Bit 1 - Port x Reset bit y (y= 0 .. 15)

pub fn br0(&mut self) -> BR0_W

Bit 0 - Port x Reset bit y (y= 0 .. 15)

impl W<u32, Reg<u32, _ICR>>

pub fn downcf(&mut self) -> DOWNCF_W

Bit 6 - Direction change to down Clear Flag

pub fn upcf(&mut self) -> UPCF_W

Bit 5 - Direction change to UP Clear Flag

pub fn arrokcf(&mut self) -> ARROKCF_W

Bit 4 - Autoreload register update OK Clear Flag

pub fn cmpokcf(&mut self) -> CMPOKCF_W

Bit 3 - Compare register update OK Clear Flag

pub fn exttrigcf(&mut self) -> EXTTRIGCF_W

Bit 2 - External trigger valid edge Clear Flag

pub fn arrmcf(&mut self) -> ARRMCF_W

Bit 1 - Autoreload match Clear Flag

pub fn cmpmcf(&mut self) -> CMPMCF_W

Bit 0 - compare match Clear Flag

impl W<u32, Reg<u32, _IER>>

pub fn downie(&mut self) -> DOWNIE_W

Bit 6 - Direction change to down Interrupt Enable

pub fn upie(&mut self) -> UPIE_W

Bit 5 - Direction change to UP Interrupt Enable

pub fn arrokie(&mut self) -> ARROKIE_W

Bit 4 - Autoreload register update OK Interrupt Enable

pub fn cmpokie(&mut self) -> CMPOKIE_W

Bit 3 - Compare register update OK Interrupt Enable

pub fn exttrigie(&mut self) -> EXTTRIGIE_W

Bit 2 - External trigger valid edge Interrupt Enable

pub fn arrmie(&mut self) -> ARRMIE_W

Bit 1 - Autoreload match Interrupt Enable

pub fn cmpmie(&mut self) -> CMPMIE_W

Bit 0 - Compare match Interrupt Enable

impl W<u32, Reg<u32, _CFGR>>

pub fn enc(&mut self) -> ENC_W

Bit 24 - Encoder mode enable

pub fn countmode(&mut self) -> COUNTMODE_W

Bit 23 - counter mode enabled

pub fn preload(&mut self) -> PRELOAD_W

Bit 22 - Registers update mode

pub fn wavpol(&mut self) -> WAVPOL_W

Bit 21 - Waveform shape polarity

pub fn wave(&mut self) -> WAVE_W

Bit 20 - Waveform shape

pub fn timout(&mut self) -> TIMOUT_W

Bit 19 - Timeout enable

pub fn trigen(&mut self) -> TRIGEN_W

Bits 17:18 - Trigger enable and polarity

pub fn trigsel(&mut self) -> TRIGSEL_W

Bits 13:15 - Trigger selector

pub fn presc(&mut self) -> PRESC_W

Bits 9:11 - Clock prescaler

pub fn trgflt(&mut self) -> TRGFLT_W

Bits 6:7 - Configurable digital filter for trigger

pub fn ckflt(&mut self) -> CKFLT_W

Bits 3:4 - Configurable digital filter for external clock

pub fn ckpol(&mut self) -> CKPOL_W

Bits 1:2 - Clock Polarity

pub fn cksel(&mut self) -> CKSEL_W

Bit 0 - Clock selector

impl W<u32, Reg<u32, _CR>>

pub fn cntstrt(&mut self) -> CNTSTRT_W

Bit 2 - Timer start in continuous mode

pub fn sngstrt(&mut self) -> SNGSTRT_W

Bit 1 - LPTIM start in single mode

pub fn enable(&mut self) -> ENABLE_W

Bit 0 - LPTIM Enable

impl W<u32, Reg<u32, _CMP>>

pub fn cmp(&mut self) -> CMP_W

Bits 0:15 - Compare value.

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Auto reload value.

impl W<u32, Reg<u32, _TR>>

pub fn pm(&mut self) -> PM_W

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W

Bits 20:21 - Hour tens in BCD format

pub fn hu(&mut self) -> HU_W

Bits 16:19 - Hour units in BCD format

pub fn mnt(&mut self) -> MNT_W

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&mut self) -> MNU_W

Bits 8:11 - Minute units in BCD format

pub fn st(&mut self) -> ST_W

Bits 4:6 - Second tens in BCD format

pub fn su(&mut self) -> SU_W

Bits 0:3 - Second units in BCD format

impl W<u32, Reg<u32, _DR>>

pub fn yt(&mut self) -> YT_W

Bits 20:23 - Year tens in BCD format

pub fn yu(&mut self) -> YU_W

Bits 16:19 - Year units in BCD format

pub fn wdu(&mut self) -> WDU_W

Bits 13:15 - Week day units

pub fn mt(&mut self) -> MT_W

Bit 12 - Month tens in BCD format

pub fn mu(&mut self) -> MU_W

Bits 8:11 - Month units in BCD format

pub fn dt(&mut self) -> DT_W

Bits 4:5 - Date tens in BCD format

pub fn du(&mut self) -> DU_W

Bits 0:3 - Date units in BCD format

impl W<u32, Reg<u32, _CR>>

pub fn coe(&mut self) -> COE_W

Bit 23 - Calibration output enable

pub fn osel(&mut self) -> OSEL_W

Bits 21:22 - Output selection

pub fn pol(&mut self) -> POL_W

Bit 20 - Output polarity

pub fn cosel(&mut self) -> COSEL_W

Bit 19 - Calibration output selection

pub fn bkp(&mut self) -> BKP_W

Bit 18 - Backup

pub fn sub1h(&mut self) -> SUB1H_W

Bit 17 - Subtract 1 hour (winter time change)

pub fn add1h(&mut self) -> ADD1H_W

Bit 16 - Add 1 hour (summer time change)

pub fn tsie(&mut self) -> TSIE_W

Bit 15 - Time-stamp interrupt enable

pub fn wutie(&mut self) -> WUTIE_W

Bit 14 - Wakeup timer interrupt enable

pub fn alrbie(&mut self) -> ALRBIE_W

Bit 13 - Alarm B interrupt enable

pub fn alraie(&mut self) -> ALRAIE_W

Bit 12 - Alarm A interrupt enable

pub fn tse(&mut self) -> TSE_W

Bit 11 - timestamp enable

pub fn wute(&mut self) -> WUTE_W

Bit 10 - Wakeup timer enable

pub fn alrbe(&mut self) -> ALRBE_W

Bit 9 - Alarm B enable

pub fn alrae(&mut self) -> ALRAE_W

Bit 8 - Alarm A enable

pub fn fmt(&mut self) -> FMT_W

Bit 6 - Hour format

pub fn bypshad(&mut self) -> BYPSHAD_W

Bit 5 - Bypass the shadow registers

pub fn refckon(&mut self) -> REFCKON_W

Bit 4 - RTC_REFIN reference clock detection enable (50 or 60 Hz)

pub fn tsedge(&mut self) -> TSEDGE_W

Bit 3 - Time-stamp event active edge

pub fn wucksel(&mut self) -> WUCKSEL_W

Bits 0:2 - Wakeup clock selection

impl W<u32, Reg<u32, _ISR>>

pub fn tamp2f(&mut self) -> TAMP2F_W

Bit 14 - RTC_TAMP2 detection flag

pub fn tamp1f(&mut self) -> TAMP1F_W

Bit 13 - RTC_TAMP1 detection flag

pub fn tsovf(&mut self) -> TSOVF_W

Bit 12 - Time-stamp overflow flag

pub fn tsf(&mut self) -> TSF_W

Bit 11 - Time-stamp flag

pub fn wutf(&mut self) -> WUTF_W

Bit 10 - Wakeup timer flag

pub fn alrbf(&mut self) -> ALRBF_W

Bit 9 - Alarm B flag

pub fn alraf(&mut self) -> ALRAF_W

Bit 8 - Alarm A flag

pub fn init(&mut self) -> INIT_W

Bit 7 - Initialization mode

pub fn rsf(&mut self) -> RSF_W

Bit 5 - Registers synchronization flag

pub fn recalpf(&mut self) -> RECALPF_W

Bit 16 - Recalibration pending flag

pub fn tamp3f(&mut self) -> TAMP3F_W

Bit 15 - RTC_TAMP3 detection flag

impl W<u32, Reg<u32, _PRER>>

pub fn prediv_a(&mut self) -> PREDIV_A_W

Bits 16:22 - Asynchronous prescaler factor

pub fn prediv_s(&mut self) -> PREDIV_S_W

Bits 0:15 - Synchronous prescaler factor

impl W<u32, Reg<u32, _WUTR>>

pub fn wut(&mut self) -> WUT_W

Bits 0:15 - Wakeup auto-reload value bits

impl W<u32, Reg<u32, _ALRMAR>>

pub fn msk4(&mut self) -> MSK4_W

Bit 31 - Alarm A date mask

pub fn wdsel(&mut self) -> WDSEL_W

Bit 30 - Week day selection

pub fn dt(&mut self) -> DT_W

Bits 28:29 - Date tens in BCD format.

pub fn du(&mut self) -> DU_W

Bits 24:27 - Date units or day in BCD format.

pub fn msk3(&mut self) -> MSK3_W

Bit 23 - Alarm A hours mask

pub fn pm(&mut self) -> PM_W

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W

Bits 20:21 - Hour tens in BCD format.

pub fn hu(&mut self) -> HU_W

Bits 16:19 - Hour units in BCD format.

pub fn msk2(&mut self) -> MSK2_W

Bit 15 - Alarm A minutes mask

pub fn mnt(&mut self) -> MNT_W

Bits 12:14 - Minute tens in BCD format.

pub fn mnu(&mut self) -> MNU_W

Bits 8:11 - Minute units in BCD format.

pub fn msk1(&mut self) -> MSK1_W

Bit 7 - Alarm A seconds mask

pub fn st(&mut self) -> ST_W

Bits 4:6 - Second tens in BCD format.

pub fn su(&mut self) -> SU_W

Bits 0:3 - Second units in BCD format.

impl W<u32, Reg<u32, _ALRMBR>>

pub fn msk4(&mut self) -> MSK4_W

Bit 31 - Alarm B date mask

pub fn wdsel(&mut self) -> WDSEL_W

Bit 30 - Week day selection

pub fn dt(&mut self) -> DT_W

Bits 28:29 - Date tens in BCD format

pub fn du(&mut self) -> DU_W

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&mut self) -> MSK3_W

Bit 23 - Alarm B hours mask

pub fn pm(&mut self) -> PM_W

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W

Bits 20:21 - Hour tens in BCD format

pub fn hu(&mut self) -> HU_W

Bits 16:19 - Hour units in BCD format

pub fn msk2(&mut self) -> MSK2_W

Bit 15 - Alarm B minutes mask

pub fn mnt(&mut self) -> MNT_W

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&mut self) -> MNU_W

Bits 8:11 - Minute units in BCD format

pub fn msk1(&mut self) -> MSK1_W

Bit 7 - Alarm B seconds mask

pub fn st(&mut self) -> ST_W

Bits 4:6 - Second tens in BCD format

pub fn su(&mut self) -> SU_W

Bits 0:3 - Second units in BCD format

impl W<u32, Reg<u32, _WPR>>

pub fn key(&mut self) -> KEY_W

Bits 0:7 - Write protection key

impl W<u32, Reg<u32, _SHIFTR>>

pub fn add1s(&mut self) -> ADD1S_W

Bit 31 - Add one second

pub fn subfs(&mut self) -> SUBFS_W

Bits 0:14 - Subtract a fraction of a second

impl W<u32, Reg<u32, _CALR>>

pub fn calp(&mut self) -> CALP_W

Bit 15 - Increase frequency of RTC by 488.5 ppm

pub fn calw8(&mut self) -> CALW8_W

Bit 14 - Use an 8-second calibration cycle period

pub fn calw16(&mut self) -> CALW16_W

Bit 13 - Use a 16-second calibration cycle period

pub fn calm(&mut self) -> CALM_W

Bits 0:8 - Calibration minus

impl W<u32, Reg<u32, _TAMPCR>>

pub fn tamp2mf(&mut self) -> TAMP2MF_W

Bit 21 - Tamper 2 mask flag

pub fn tamp2noerase(&mut self) -> TAMP2NOERASE_W

Bit 20 - Tamper 2 no erase

pub fn tamp2ie(&mut self) -> TAMP2IE_W

Bit 19 - Tamper 2 interrupt enable

pub fn tamp1mf(&mut self) -> TAMP1MF_W

Bit 18 - Tamper 1 mask flag

pub fn tamp1noerase(&mut self) -> TAMP1NOERASE_W

Bit 17 - Tamper 1 no erase

pub fn tamp1ie(&mut self) -> TAMP1IE_W

Bit 16 - Tamper 1 interrupt enable

pub fn tamppudis(&mut self) -> TAMPPUDIS_W

Bit 15 - RTC_TAMPx pull-up disable

pub fn tampprch(&mut self) -> TAMPPRCH_W

Bits 13:14 - RTC_TAMPx precharge duration

pub fn tampflt(&mut self) -> TAMPFLT_W

Bits 11:12 - RTC_TAMPx filter count

pub fn tampfreq(&mut self) -> TAMPFREQ_W

Bits 8:10 - Tamper sampling frequency

pub fn tampts(&mut self) -> TAMPTS_W

Bit 7 - Activate timestamp on tamper detection event

pub fn tamp2trg(&mut self) -> TAMP2TRG_W

Bit 4 - Active level for RTC_TAMP2 input

pub fn tamp2e(&mut self) -> TAMP2E_W

Bit 3 - RTC_TAMP2 input detection enable

pub fn tampie(&mut self) -> TAMPIE_W

Bit 2 - Tamper interrupt enable

pub fn tamp1trg(&mut self) -> TAMP1TRG_W

Bit 1 - Active level for RTC_TAMP1 input

pub fn tamp1e(&mut self) -> TAMP1E_W

Bit 0 - RTC_TAMP1 input detection enable

pub fn tamp3mf(&mut self) -> TAMP3MF_W

Bit 24 - Tamper 3 mask flag

pub fn tamp3noerase(&mut self) -> TAMP3NOERASE_W

Bit 23 - Tamper 3 no erase

pub fn tamp3ie(&mut self) -> TAMP3IE_W

Bit 22 - Tamper 3 interrupt enable

pub fn tamp3trg(&mut self) -> TAMP3TRG_W

Bit 6 - Active level for RTC_TAMP3 input

pub fn tamp3e(&mut self) -> TAMP3E_W

Bit 5 - RTC_TAMP3 detection enable

impl W<u32, Reg<u32, _ALRMASSR>>

pub fn maskss(&mut self) -> MASKSS_W

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&mut self) -> SS_W

Bits 0:14 - Sub seconds value

impl W<u32, Reg<u32, _ALRMBSSR>>

pub fn maskss(&mut self) -> MASKSS_W

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&mut self) -> SS_W

Bits 0:14 - Sub seconds value

impl W<u32, Reg<u32, _OR>>

pub fn rtc_out_rmp(&mut self) -> RTC_OUT_RMP_W

Bit 1 - RTC_ALARM on PC13 output type

pub fn rtc_alarm_type(&mut self) -> RTC_ALARM_TYPE_W

Bit 0 - RTC_ALARM on PC13 output type

impl W<u32, Reg<u32, _BKPR>>

pub fn bkp(&mut self) -> BKP_W

Bits 0:31 - BKP

impl W<u32, Reg<u32, _CR1>>

pub fn m1(&mut self) -> M1_W

Bit 28 - Word length

pub fn eobie(&mut self) -> EOBIE_W

Bit 27 - End of Block interrupt enable

pub fn rtoie(&mut self) -> RTOIE_W

Bit 26 - Receiver timeout interrupt enable

pub fn over8(&mut self) -> OVER8_W

Bit 15 - Oversampling mode

pub fn cmie(&mut self) -> CMIE_W

Bit 14 - Character match interrupt enable

pub fn mme(&mut self) -> MME_W

Bit 13 - Mute mode enable

pub fn m0(&mut self) -> M0_W

Bit 12 - Word length

pub fn wake(&mut self) -> WAKE_W

Bit 11 - Receiver wakeup method

pub fn pce(&mut self) -> PCE_W

Bit 10 - Parity control enable

pub fn ps(&mut self) -> PS_W

Bit 9 - Parity selection

pub fn peie(&mut self) -> PEIE_W

Bit 8 - PE interrupt enable

pub fn txeie(&mut self) -> TXEIE_W

Bit 7 - interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W

Bit 5 - RXNE interrupt enable

pub fn idleie(&mut self) -> IDLEIE_W

Bit 4 - IDLE interrupt enable

pub fn te(&mut self) -> TE_W

Bit 3 - Transmitter enable

pub fn re(&mut self) -> RE_W

Bit 2 - Receiver enable

pub fn uesm(&mut self) -> UESM_W

Bit 1 - USART enable in Stop mode

pub fn ue(&mut self) -> UE_W

Bit 0 - USART enable

pub fn deat(&mut self) -> DEAT_W

Bits 21:25 - Driver Enable assertion time

pub fn dedt(&mut self) -> DEDT_W

Bits 16:20 - Driver Enable de-assertion time

impl W<u32, Reg<u32, _CR2>>

pub fn rtoen(&mut self) -> RTOEN_W

Bit 23 - Receiver timeout enable

pub fn abren(&mut self) -> ABREN_W

Bit 20 - Auto baud rate enable

pub fn msbfirst(&mut self) -> MSBFIRST_W

Bit 19 - Most significant bit first

pub fn datainv(&mut self) -> DATAINV_W

Bit 18 - Binary data inversion

pub fn txinv(&mut self) -> TXINV_W

Bit 17 - TX pin active level inversion

pub fn rxinv(&mut self) -> RXINV_W

Bit 16 - RX pin active level inversion

pub fn swap(&mut self) -> SWAP_W

Bit 15 - Swap TX/RX pins

pub fn linen(&mut self) -> LINEN_W

Bit 14 - LIN mode enable

pub fn stop(&mut self) -> STOP_W

Bits 12:13 - STOP bits

pub fn clken(&mut self) -> CLKEN_W

Bit 11 - Clock enable

pub fn cpol(&mut self) -> CPOL_W

Bit 10 - Clock polarity

pub fn cpha(&mut self) -> CPHA_W

Bit 9 - Clock phase

pub fn lbcl(&mut self) -> LBCL_W

Bit 8 - Last bit clock pulse

pub fn lbdie(&mut self) -> LBDIE_W

Bit 6 - LIN break detection interrupt enable

pub fn lbdl(&mut self) -> LBDL_W

Bit 5 - LIN break detection length

pub fn addm7(&mut self) -> ADDM7_W

Bit 4 - 7-bit Address Detection/4-bit Address Detection

pub fn add(&mut self) -> ADD_W

Bits 24:31 - Address of the USART node

pub fn abrmod(&mut self) -> ABRMOD_W

Bits 21:22 - Auto baud rate mode

impl W<u32, Reg<u32, _CR3>>

pub fn wufie(&mut self) -> WUFIE_W

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&mut self) -> WUS_W

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn scarcnt(&mut self) -> SCARCNT_W

Bits 17:19 - Smartcard auto-retry count

pub fn dep(&mut self) -> DEP_W

Bit 15 - Driver enable polarity selection

pub fn dem(&mut self) -> DEM_W

Bit 14 - Driver enable mode

pub fn ddre(&mut self) -> DDRE_W

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&mut self) -> OVRDIS_W

Bit 12 - Overrun Disable

pub fn onebit(&mut self) -> ONEBIT_W

Bit 11 - One sample bit method enable

pub fn ctsie(&mut self) -> CTSIE_W

Bit 10 - CTS interrupt enable

pub fn ctse(&mut self) -> CTSE_W

Bit 9 - CTS enable

pub fn rtse(&mut self) -> RTSE_W

Bit 8 - RTS enable

pub fn dmat(&mut self) -> DMAT_W

Bit 7 - DMA enable transmitter

pub fn dmar(&mut self) -> DMAR_W

Bit 6 - DMA enable receiver

pub fn scen(&mut self) -> SCEN_W

Bit 5 - Smartcard mode enable

pub fn nack(&mut self) -> NACK_W

Bit 4 - Smartcard NACK enable

pub fn hdsel(&mut self) -> HDSEL_W

Bit 3 - Half-duplex selection

pub fn irlp(&mut self) -> IRLP_W

Bit 2 - Ir low-power

pub fn iren(&mut self) -> IREN_W

Bit 1 - Ir mode enable

pub fn eie(&mut self) -> EIE_W

Bit 0 - Error interrupt enable

impl W<u32, Reg<u32, _BRR>>

pub fn brr(&mut self) -> BRR_W

Bits 0:15 - DIV_Mantissa

impl W<u32, Reg<u32, _GTPR>>

pub fn gt(&mut self) -> GT_W

Bits 8:15 - Guard time value

pub fn psc(&mut self) -> PSC_W

Bits 0:7 - Prescaler value

impl W<u32, Reg<u32, _RTOR>>

pub fn blen(&mut self) -> BLEN_W

Bits 24:31 - Block Length

pub fn rto(&mut self) -> RTO_W

Bits 0:23 - Receiver timeout value

impl W<u32, Reg<u32, _RQR>>

pub fn txfrq(&mut self) -> TXFRQ_W

Bit 4 - Transmit data flush request

pub fn rxfrq(&mut self) -> RXFRQ_W

Bit 3 - Receive data flush request

pub fn mmrq(&mut self) -> MMRQ_W

Bit 2 - Mute mode request

pub fn sbkrq(&mut self) -> SBKRQ_W

Bit 1 - Send break request

pub fn abrrq(&mut self) -> ABRRQ_W

Bit 0 - Auto baud rate request

impl W<u32, Reg<u32, _ICR>>

pub fn wucf(&mut self) -> WUCF_W

Bit 20 - Wakeup from Stop mode clear flag

pub fn cmcf(&mut self) -> CMCF_W

Bit 17 - Character match clear flag

pub fn eobcf(&mut self) -> EOBCF_W

Bit 12 - End of block clear flag

pub fn rtocf(&mut self) -> RTOCF_W

Bit 11 - Receiver timeout clear flag

pub fn ctscf(&mut self) -> CTSCF_W

Bit 9 - CTS clear flag

pub fn lbdcf(&mut self) -> LBDCF_W

Bit 8 - LIN break detection clear flag

pub fn tccf(&mut self) -> TCCF_W

Bit 6 - Transmission complete clear flag

pub fn idlecf(&mut self) -> IDLECF_W

Bit 4 - Idle line detected clear flag

pub fn orecf(&mut self) -> ORECF_W

Bit 3 - Overrun error clear flag

pub fn ncf(&mut self) -> NCF_W

Bit 2 - Noise detected clear flag

pub fn fecf(&mut self) -> FECF_W

Bit 1 - Framing error clear flag

pub fn pecf(&mut self) -> PECF_W

Bit 0 - Parity error clear flag

impl W<u32, Reg<u32, _TDR>>

pub fn tdr(&mut self) -> TDR_W

Bits 0:8 - Transmit data value

impl W<u32, Reg<u32, _KR>>

pub fn key(&mut self) -> KEY_W

Bits 0:15 - Key value (write only, read 0x0000)

impl W<u32, Reg<u32, _PR>>

pub fn pr(&mut self) -> PR_W

Bits 0:2 - Prescaler divider

impl W<u32, Reg<u32, _RLR>>

pub fn rl(&mut self) -> RL_W

Bits 0:11 - Watchdog counter reload value

impl W<u32, Reg<u32, _WINR>>

pub fn win(&mut self) -> WIN_W

Bits 0:11 - Watchdog counter window value

impl W<u32, Reg<u32, _CR>>

pub fn wdga(&mut self) -> WDGA_W

Bit 7 - Activation bit

pub fn t(&mut self) -> T_W

Bits 0:6 - 7-bit counter (MSB to LSB)

impl W<u32, Reg<u32, _CFR>>

pub fn ewi(&mut self) -> EWI_W

Bit 9 - Early wakeup interrupt

pub fn w(&mut self) -> W_W

Bits 0:6 - 7-bit window value

pub fn wdgtb(&mut self) -> WDGTB_W

Bits 7:8 - Timer base

impl W<u32, Reg<u32, _SR>>

pub fn ewif(&mut self) -> EWIF_W

Bit 0 - Early wakeup interrupt flag

impl W<u32, Reg<u32, _CSSA>>

pub fn add(&mut self) -> ADD_W

Bits 8:23 - code segment start address

impl W<u32, Reg<u32, _CSL>>

pub fn leng(&mut self) -> LENG_W

Bits 8:21 - code segment length

impl W<u32, Reg<u32, _NVDSSA>>

pub fn add(&mut self) -> ADD_W

Bits 8:23 - Non-volatile data segment start address

impl W<u32, Reg<u32, _NVDSL>>

pub fn leng(&mut self) -> LENG_W

Bits 8:21 - Non-volatile data segment length

impl W<u32, Reg<u32, _VDSSA>>

pub fn add(&mut self) -> ADD_W

Bits 6:15 - Volatile data segment start address

impl W<u32, Reg<u32, _VDSL>>

pub fn leng(&mut self) -> LENG_W

Bits 6:15 - Non-volatile data segment length

impl W<u32, Reg<u32, _CR>>

pub fn vde(&mut self) -> VDE_W

Bit 2 - Volatile data execution

pub fn vds(&mut self) -> VDS_W

Bit 1 - Volatile data shared

pub fn fpa(&mut self) -> FPA_W

Bit 0 - Firewall pre alarm

impl W<u32, Reg<u32, _CR>>

pub fn pllon(&mut self) -> PLLON_W

Bit 24 - PLL enable bit

pub fn rtcpre(&mut self) -> RTCPRE_W

Bits 20:21 - TC/LCD prescaler

pub fn csshseon(&mut self) -> CSSHSEON_W

Bit 19 - Clock security system on HSE enable bit

pub fn hsebyp(&mut self) -> HSEBYP_W

Bit 18 - HSE clock bypass bit

pub fn hseon(&mut self) -> HSEON_W

Bit 16 - HSE clock enable bit

pub fn msion(&mut self) -> MSION_W

Bit 8 - MSI clock enable bit

pub fn hsi16diven(&mut self) -> HSI16DIVEN_W

Bit 3 - HSI16DIVEN

pub fn hsi16rdyf(&mut self) -> HSI16RDYF_W

Bit 2 - Internal high-speed clock ready flag

pub fn hsi16on(&mut self) -> HSI16ON_W

Bit 0 - 16 MHz high-speed internal clock enable

pub fn hsi16outen(&mut self) -> HSI16OUTEN_W

Bit 5 - 16 MHz high-speed internal clock output enable

impl W<u32, Reg<u32, _ICSCR>>

pub fn msitrim(&mut self) -> MSITRIM_W

Bits 24:31 - MSI clock trimming

pub fn msirange(&mut self) -> MSIRANGE_W

Bits 13:15 - MSI clock ranges

pub fn hsi16trim(&mut self) -> HSI16TRIM_W

Bits 8:12 - High speed internal clock trimming

impl W<u32, Reg<u32, _CFGR>>

pub fn mcopre(&mut self) -> MCOPRE_W

Bits 28:30 - Microcontroller clock output prescaler

pub fn mcosel(&mut self) -> MCOSEL_W

Bits 24:26 - Microcontroller clock output selection

pub fn plldiv(&mut self) -> PLLDIV_W

Bits 22:23 - PLL output division

pub fn pllmul(&mut self) -> PLLMUL_W

Bits 18:21 - PLL multiplication factor

pub fn pllsrc(&mut self) -> PLLSRC_W

Bit 16 - PLL entry clock source

pub fn stopwuck(&mut self) -> STOPWUCK_W

Bit 15 - Wake-up from stop clock selection

pub fn ppre2(&mut self) -> PPRE2_W

Bits 11:13 - APB high-speed prescaler (APB2)

pub fn ppre1(&mut self) -> PPRE1_W

Bits 8:10 - APB low-speed prescaler (APB1)

pub fn hpre(&mut self) -> HPRE_W

Bits 4:7 - AHB prescaler

pub fn sw(&mut self) -> SW_W

Bits 0:1 - System clock switch

impl W<u32, Reg<u32, _IOPRSTR>>

pub fn iophrst(&mut self) -> IOPHRST_W

Bit 7 - I/O port H reset

pub fn iopdrst(&mut self) -> IOPDRST_W

Bit 3 - I/O port D reset

pub fn iopcrst(&mut self) -> IOPCRST_W

Bit 2 - I/O port A reset

pub fn iopbrst(&mut self) -> IOPBRST_W

Bit 1 - I/O port B reset

pub fn ioparst(&mut self) -> IOPARST_W

Bit 0 - I/O port A reset

pub fn ioperst(&mut self) -> IOPERST_W

Bit 4 - I/O port E reset

impl W<u32, Reg<u32, _AHBRSTR>>

pub fn cryprst(&mut self) -> CRYPRST_W

Bit 24 - Crypto module reset

pub fn crcrst(&mut self) -> CRCRST_W

Bit 12 - Test integration module reset

pub fn mifrst(&mut self) -> MIFRST_W

Bit 8 - Memory interface reset

pub fn dmarst(&mut self) -> DMARST_W

Bit 0 - DMA reset

impl W<u32, Reg<u32, _APB2RSTR>>

pub fn dbgrst(&mut self) -> DBGRST_W

Bit 22 - DBG reset

pub fn usart1rst(&mut self) -> USART1RST_W

Bit 14 - USART1 reset

pub fn spi1rst(&mut self) -> SPI1RST_W

Bit 12 - SPI 1 reset

pub fn adcrst(&mut self) -> ADCRST_W

Bit 9 - ADC interface reset

pub fn tim22rst(&mut self) -> TIM22RST_W

Bit 5 - TIM22 timer reset

pub fn tim21rst(&mut self) -> TIM21RST_W

Bit 2 - TIM21 timer reset

pub fn syscfgrst(&mut self) -> SYSCFGRST_W

Bit 0 - System configuration controller reset

impl W<u32, Reg<u32, _APB1RSTR>>

pub fn lptim1rst(&mut self) -> LPTIM1RST_W

Bit 31 - Low power timer reset

pub fn pwrrst(&mut self) -> PWRRST_W

Bit 28 - Power interface reset

pub fn i2c2rst(&mut self) -> I2C2RST_W

Bit 22 - I2C2 reset

pub fn i2c1rst(&mut self) -> I2C1RST_W

Bit 21 - I2C1 reset

pub fn lpuart1rst(&mut self) -> LPUART1RST_W

Bit 18 - LPUART1 reset

pub fn usart2rst(&mut self) -> USART2RST_W

Bit 17 - USART2 reset

pub fn spi2rst(&mut self) -> SPI2RST_W

Bit 14 - SPI2 reset

pub fn wwdgrst(&mut self) -> WWDGRST_W

Bit 11 - Window watchdog reset

pub fn tim6rst(&mut self) -> TIM6RST_W

Bit 4 - Timer 6 reset

pub fn tim2rst(&mut self) -> TIM2RST_W

Bit 0 - Timer 2 reset

pub fn tim3rst(&mut self) -> TIM3RST_W

Bit 1 - Timer 3 reset

pub fn tim7rst(&mut self) -> TIM7RST_W

Bit 5 - Timer 7 reset

pub fn usart4rst(&mut self) -> USART4RST_W

Bit 19 - USART4 reset

pub fn usart5rst(&mut self) -> USART5RST_W

Bit 20 - USART5 reset

pub fn crcrst(&mut self) -> CRCRST_W

Bit 27 - CRC reset

pub fn i2c3rst(&mut self) -> I2C3RST_W

Bit 30 - I2C3 reset

impl W<u32, Reg<u32, _IOPENR>>

pub fn iophen(&mut self) -> IOPHEN_W

Bit 7 - I/O port H clock enable bit

pub fn iopden(&mut self) -> IOPDEN_W

Bit 3 - I/O port D clock enable bit

pub fn iopcen(&mut self) -> IOPCEN_W

Bit 2 - IO port A clock enable bit

pub fn iopben(&mut self) -> IOPBEN_W

Bit 1 - IO port B clock enable bit

pub fn iopaen(&mut self) -> IOPAEN_W

Bit 0 - IO port A clock enable bit

pub fn iopeen(&mut self) -> IOPEEN_W

Bit 4 - IO port E clock enable bit

impl W<u32, Reg<u32, _AHBENR>>

pub fn crypen(&mut self) -> CRYPEN_W

Bit 24 - Crypto clock enable bit

pub fn crcen(&mut self) -> CRCEN_W

Bit 12 - CRC clock enable bit

pub fn mifen(&mut self) -> MIFEN_W

Bit 8 - NVM interface clock enable bit

pub fn dmaen(&mut self) -> DMAEN_W

Bit 0 - DMA clock enable bit

impl W<u32, Reg<u32, _APB2ENR>>

pub fn dbgen(&mut self) -> DBGEN_W

Bit 22 - DBG clock enable bit

pub fn usart1en(&mut self) -> USART1EN_W

Bit 14 - USART1 clock enable bit

pub fn spi1en(&mut self) -> SPI1EN_W

Bit 12 - SPI1 clock enable bit

pub fn adcen(&mut self) -> ADCEN_W

Bit 9 - ADC clock enable bit

pub fn fwen(&mut self) -> FWEN_W

Bit 7 - Firewall clock enable bit

pub fn tim22en(&mut self) -> TIM22EN_W

Bit 5 - TIM22 timer clock enable bit

pub fn tim21en(&mut self) -> TIM21EN_W

Bit 2 - TIM21 timer clock enable bit

pub fn syscfgen(&mut self) -> SYSCFGEN_W

Bit 0 - System configuration controller clock enable bit

impl W<u32, Reg<u32, _APB1ENR>>

pub fn lptim1en(&mut self) -> LPTIM1EN_W

Bit 31 - Low power timer clock enable bit

pub fn pwren(&mut self) -> PWREN_W

Bit 28 - Power interface clock enable bit

pub fn i2c2en(&mut self) -> I2C2EN_W

Bit 22 - I2C2 clock enable bit

pub fn i2c1en(&mut self) -> I2C1EN_W

Bit 21 - I2C1 clock enable bit

pub fn lpuart1en(&mut self) -> LPUART1EN_W

Bit 18 - LPUART1 clock enable bit

pub fn usart2en(&mut self) -> USART2EN_W

Bit 17 - UART2 clock enable bit

pub fn spi2en(&mut self) -> SPI2EN_W

Bit 14 - SPI2 clock enable bit

pub fn wwdgen(&mut self) -> WWDGEN_W

Bit 11 - Window watchdog clock enable bit

pub fn tim6en(&mut self) -> TIM6EN_W

Bit 4 - Timer 6 clock enable bit

pub fn tim2en(&mut self) -> TIM2EN_W

Bit 0 - Timer2 clock enable bit

pub fn tim3en(&mut self) -> TIM3EN_W

Bit 1 - Timer 3 clock enbale bit

pub fn tim7en(&mut self) -> TIM7EN_W

Bit 5 - Timer 7 clock enable bit

pub fn usart4en(&mut self) -> USART4EN_W

Bit 19 - USART4 clock enable bit

pub fn usart5en(&mut self) -> USART5EN_W

Bit 20 - USART5 clock enable bit

pub fn i2c3en(&mut self) -> I2C3EN_W

Bit 30 - I2C3 clock enable bit

impl W<u32, Reg<u32, _IOPSMEN>>

pub fn iophsmen(&mut self) -> IOPHSMEN_W

Bit 7 - Port H clock enable during Sleep mode bit

pub fn iopdsmen(&mut self) -> IOPDSMEN_W

Bit 3 - Port D clock enable during Sleep mode bit

pub fn iopcsmen(&mut self) -> IOPCSMEN_W

Bit 2 - Port C clock enable during Sleep mode bit

pub fn iopbsmen(&mut self) -> IOPBSMEN_W

Bit 1 - Port B clock enable during Sleep mode bit

pub fn iopasmen(&mut self) -> IOPASMEN_W

Bit 0 - Port A clock enable during Sleep mode bit

pub fn iopesmen(&mut self) -> IOPESMEN_W

Bit 4 - Port E clock enable during Sleep mode bit

impl W<u32, Reg<u32, _AHBSMENR>>

pub fn crypsmen(&mut self) -> CRYPSMEN_W

Bit 24 - Crypto clock enable during sleep mode bit

pub fn crcsmen(&mut self) -> CRCSMEN_W

Bit 12 - CRC clock enable during sleep mode bit

pub fn sramsmen(&mut self) -> SRAMSMEN_W

Bit 9 - SRAM interface clock enable during sleep mode bit

pub fn mifsmen(&mut self) -> MIFSMEN_W

Bit 8 - NVM interface clock enable during sleep mode bit

pub fn dmasmen(&mut self) -> DMASMEN_W

Bit 0 - DMA clock enable during sleep mode bit

impl W<u32, Reg<u32, _APB2SMENR>>

pub fn dbgsmen(&mut self) -> DBGSMEN_W

Bit 22 - DBG clock enable during sleep mode bit

pub fn usart1smen(&mut self) -> USART1SMEN_W

Bit 14 - USART1 clock enable during sleep mode bit

pub fn spi1smen(&mut self) -> SPI1SMEN_W

Bit 12 - SPI1 clock enable during sleep mode bit

pub fn adcsmen(&mut self) -> ADCSMEN_W

Bit 9 - ADC clock enable during sleep mode bit

pub fn tim22smen(&mut self) -> TIM22SMEN_W

Bit 5 - TIM22 timer clock enable during sleep mode bit

pub fn tim21smen(&mut self) -> TIM21SMEN_W

Bit 2 - TIM21 timer clock enable during sleep mode bit

pub fn syscfgsmen(&mut self) -> SYSCFGSMEN_W

Bit 0 - System configuration controller clock enable during sleep mode bit

impl W<u32, Reg<u32, _APB1SMENR>>

pub fn lptim1smen(&mut self) -> LPTIM1SMEN_W

Bit 31 - Low power timer clock enable during sleep mode bit

pub fn pwrsmen(&mut self) -> PWRSMEN_W

Bit 28 - Power interface clock enable during sleep mode bit

pub fn crssmen(&mut self) -> CRSSMEN_W

Bit 27 - Clock recovery system clock enable during sleep mode bit

pub fn i2c2smen(&mut self) -> I2C2SMEN_W

Bit 22 - I2C2 clock enable during sleep mode bit

pub fn i2c1smen(&mut self) -> I2C1SMEN_W

Bit 21 - I2C1 clock enable during sleep mode bit

pub fn lpuart1smen(&mut self) -> LPUART1SMEN_W

Bit 18 - LPUART1 clock enable during sleep mode bit

pub fn usart2smen(&mut self) -> USART2SMEN_W

Bit 17 - UART2 clock enable during sleep mode bit

pub fn spi2smen(&mut self) -> SPI2SMEN_W

Bit 14 - SPI2 clock enable during sleep mode bit

pub fn wwdgsmen(&mut self) -> WWDGSMEN_W

Bit 11 - Window watchdog clock enable during sleep mode bit

pub fn tim6smen(&mut self) -> TIM6SMEN_W

Bit 4 - Timer 6 clock enable during sleep mode bit

pub fn tim2smen(&mut self) -> TIM2SMEN_W

Bit 0 - Timer2 clock enable during sleep mode bit

pub fn tim3smen(&mut self) -> TIM3SMEN_W

Bit 1 - Timer 3 clock enable during sleep mode bit

pub fn tim7smen(&mut self) -> TIM7SMEN_W

Bit 5 - Timer 7 clock enable during sleep mode bit

pub fn usart4smen(&mut self) -> USART4SMEN_W

Bit 19 - USART4 clock enabe during sleep mode bit

pub fn usart5smen(&mut self) -> USART5SMEN_W

Bit 20 - USART5 clock enable during sleep mode bit

pub fn i2c3smen(&mut self) -> I2C3SMEN_W

Bit 30 - I2C3 clock enable during sleep mode bit

impl W<u32, Reg<u32, _CCIPR>>

pub fn lptim1sel(&mut self) -> LPTIM1SEL_W

Bits 18:19 - Low Power Timer clock source selection bits

pub fn i2c3sel(&mut self) -> I2C3SEL_W

Bits 16:17 - I2C3 clock source selection bits

pub fn i2c1sel(&mut self) -> I2C1SEL_W

Bits 12:13 - I2C1 clock source selection bits

pub fn lpuart1sel(&mut self) -> LPUART1SEL_W

Bits 10:11 - LPUART1 clock source selection bits

pub fn usart2sel(&mut self) -> USART2SEL_W

Bits 2:3 - USART2 clock source selection bits

pub fn usart1sel(&mut self) -> USART1SEL_W

Bits 0:1 - USART1 clock source selection bits

impl W<u32, Reg<u32, _CSR>>

pub fn lpwrrstf(&mut self) -> LPWRRSTF_W

Bit 31 - Low-power reset flag

pub fn wwdgrstf(&mut self) -> WWDGRSTF_W

Bit 30 - Window watchdog reset flag

pub fn iwdgrstf(&mut self) -> IWDGRSTF_W

Bit 29 - Independent watchdog reset flag

pub fn sftrstf(&mut self) -> SFTRSTF_W

Bit 28 - Software reset flag

pub fn porrstf(&mut self) -> PORRSTF_W

Bit 27 - POR/PDR reset flag

pub fn pinrstf(&mut self) -> PINRSTF_W

Bit 26 - PIN reset flag

pub fn oblrstf(&mut self) -> OBLRSTF_W

Bit 25 - OBLRSTF

pub fn fwrstf(&mut self) -> FWRSTF_W

Bit 24 - Firewall reset flag

pub fn rtcrst(&mut self) -> RTCRST_W

Bit 19 - RTC software reset bit

pub fn rtcen(&mut self) -> RTCEN_W

Bit 18 - RTC clock enable bit

pub fn rtcsel(&mut self) -> RTCSEL_W

Bits 16:17 - RTC and LCD clock source selection bits

pub fn csslsed(&mut self) -> CSSLSED_W

Bit 14 - CSS on LSE failure detection flag

pub fn csslseon(&mut self) -> CSSLSEON_W

Bit 13 - CSSLSEON

pub fn lsedrv(&mut self) -> LSEDRV_W

Bits 11:12 - LSEDRV

pub fn lsebyp(&mut self) -> LSEBYP_W

Bit 10 - External low-speed oscillator bypass bit

pub fn lseon(&mut self) -> LSEON_W

Bit 8 - External low-speed oscillator enable bit

pub fn lsion(&mut self) -> LSION_W

Bit 0 - Internal low-speed oscillator enable

pub fn rmvf(&mut self) -> RMVF_W

Bit 23 - Remove reset flag

impl W<u32, Reg<u32, _CFGR1>>

pub fn mem_mode(&mut self) -> MEM_MODE_W

Bits 0:1 - Memory mapping selection bits

pub fn ufb(&mut self) -> UFB_W

Bit 3 - User bank swapping

impl W<u32, Reg<u32, _CFGR2>>

pub fn i2c2_fmp(&mut self) -> I2C2_FMP_W

Bit 13 - I2C2 Fm+ drive capability enable bit

pub fn i2c1_fmp(&mut self) -> I2C1_FMP_W

Bit 12 - I2C1 Fm+ drive capability enable bit

pub fn i2c_pb9_fmp(&mut self) -> I2C_PB9_FMP_W

Bit 11 - Fm+ drive capability on PB9 enable bit

pub fn i2c_pb8_fmp(&mut self) -> I2C_PB8_FMP_W

Bit 10 - Fm+ drive capability on PB8 enable bit

pub fn i2c_pb7_fmp(&mut self) -> I2C_PB7_FMP_W

Bit 9 - Fm+ drive capability on PB7 enable bit

pub fn i2c_pb6_fmp(&mut self) -> I2C_PB6_FMP_W

Bit 8 - Fm+ drive capability on PB6 enable bit

pub fn i2c3_fmp(&mut self) -> I2C3_FMP_W

Bit 14 - I2C3 Fm+ drive capability enable bit

pub fn fwdis(&mut self) -> FWDIS_W

Bit 0 - Firewall disable bit

impl W<u32, Reg<u32, _EXTICR1>>

pub fn exti3(&mut self) -> EXTI3_W

Bits 12:15 - EXTI x configuration (x = 0 to 3)

pub fn exti2(&mut self) -> EXTI2_W

Bits 8:11 - EXTI x configuration (x = 0 to 3)

pub fn exti1(&mut self) -> EXTI1_W

Bits 4:7 - EXTI x configuration (x = 0 to 3)

pub fn exti0(&mut self) -> EXTI0_W

Bits 0:3 - EXTI x configuration (x = 0 to 3)

impl W<u32, Reg<u32, _EXTICR2>>

pub fn exti7(&mut self) -> EXTI7_W

Bits 12:15 - EXTI x configuration (x = 4 to 7)

pub fn exti6(&mut self) -> EXTI6_W

Bits 8:11 - EXTI x configuration (x = 4 to 7)

pub fn exti5(&mut self) -> EXTI5_W

Bits 4:7 - EXTI x configuration (x = 4 to 7)

pub fn exti4(&mut self) -> EXTI4_W

Bits 0:3 - EXTI x configuration (x = 4 to 7)

impl W<u32, Reg<u32, _EXTICR3>>

pub fn exti11(&mut self) -> EXTI11_W

Bits 12:15 - EXTI x configuration (x = 8 to 11)

pub fn exti10(&mut self) -> EXTI10_W

Bits 8:11 - EXTI10

pub fn exti9(&mut self) -> EXTI9_W

Bits 4:7 - EXTI x configuration (x = 8 to 11)

pub fn exti8(&mut self) -> EXTI8_W

Bits 0:3 - EXTI x configuration (x = 8 to 11)

impl W<u32, Reg<u32, _EXTICR4>>

pub fn exti15(&mut self) -> EXTI15_W

Bits 12:15 - EXTI x configuration (x = 12 to 15)

pub fn exti14(&mut self) -> EXTI14_W

Bits 8:11 - EXTI14

pub fn exti13(&mut self) -> EXTI13_W

Bits 4:7 - EXTI13

pub fn exti12(&mut self) -> EXTI12_W

Bits 0:3 - EXTI12

impl W<u32, Reg<u32, _CFGR3>>

pub fn enbuf_sensor_adc(&mut self) -> ENBUF_SENSOR_ADC_W

Bit 9 - Sensor reference for ADC enable bit

pub fn sel_vref_out(&mut self) -> SEL_VREF_OUT_W

Bits 4:5 - BGAP_ADC connection bit

pub fn ref_lock(&mut self) -> REF_LOCK_W

Bit 31 - SYSCFG_CFGR3 lock bit

pub fn enbuf_vrefint_comp2(&mut self) -> ENBUF_VREFINT_COMP2_W

Bit 12 - VREFINT reference for COMP2 scaler enable bit

pub fn enbuf_vrefint_adc(&mut self) -> ENBUF_VREFINT_ADC_W

Bit 8 - VREFINT reference for ADC enable bit

pub fn en_vrefint(&mut self) -> EN_VREFINT_W

Bit 0 - VREFINT enable and scaler control for COMP2 enable bit

impl W<u32, Reg<u32, _COMP1_CSR>>

pub fn comp1en(&mut self) -> COMP1EN_W

Bit 0 - Comparator 1 enable bit

pub fn comp1innsel(&mut self) -> COMP1INNSEL_W

Bits 4:5 - Comparator 1 Input Minus connection configuration bit

pub fn comp1wm(&mut self) -> COMP1WM_W

Bit 8 - Comparator 1 window mode selection bit

pub fn comp1lptimin1(&mut self) -> COMP1LPTIMIN1_W

Bit 12 - Comparator 1 LPTIM input propagation bit

pub fn comp1polarity(&mut self) -> COMP1POLARITY_W

Bit 15 - Comparator 1 polarity selection bit

pub fn comp1value(&mut self) -> COMP1VALUE_W

Bit 30 - Comparator 1 output status bit

pub fn comp1lock(&mut self) -> COMP1LOCK_W

Bit 31 - COMP1_CSR register lock bit

impl W<u32, Reg<u32, _COMP2_CSR>>

pub fn comp2en(&mut self) -> COMP2EN_W

Bit 0 - Comparator 2 enable bit

pub fn comp2speed(&mut self) -> COMP2SPEED_W

Bit 3 - Comparator 2 power mode selection bit

pub fn comp2innsel(&mut self) -> COMP2INNSEL_W

Bits 4:6 - Comparator 2 Input Minus connection configuration bit

pub fn comp2inpsel(&mut self) -> COMP2INPSEL_W

Bits 8:10 - Comparator 2 Input Plus connection configuration bit

pub fn comp2lptimin2(&mut self) -> COMP2LPTIMIN2_W

Bit 12 - Comparator 2 LPTIM input 2 propagation bit

pub fn comp2lptimin1(&mut self) -> COMP2LPTIMIN1_W

Bit 13 - Comparator 2 LPTIM input 1 propagation bit

pub fn comp2polarity(&mut self) -> COMP2POLARITY_W

Bit 15 - Comparator 2 polarity selection bit

pub fn comp2value(&mut self) -> COMP2VALUE_W

Bit 30 - Comparator 2 output status bit

pub fn comp2lock(&mut self) -> COMP2LOCK_W

Bit 31 - COMP2_CSR register lock bit

impl W<u32, Reg<u32, _CR1>>

pub fn bidimode(&mut self) -> BIDIMODE_W

Bit 15 - Bidirectional data mode enable

pub fn bidioe(&mut self) -> BIDIOE_W

Bit 14 - Output enable in bidirectional mode

pub fn crcen(&mut self) -> CRCEN_W

Bit 13 - Hardware CRC calculation enable

pub fn crcnext(&mut self) -> CRCNEXT_W

Bit 12 - CRC transfer next

pub fn dff(&mut self) -> DFF_W

Bit 11 - Data frame format

pub fn rxonly(&mut self) -> RXONLY_W

Bit 10 - Receive only

pub fn ssm(&mut self) -> SSM_W

Bit 9 - Software slave management

pub fn ssi(&mut self) -> SSI_W

Bit 8 - Internal slave select

pub fn lsbfirst(&mut self) -> LSBFIRST_W

Bit 7 - Frame format

pub fn spe(&mut self) -> SPE_W

Bit 6 - SPI enable

pub fn br(&mut self) -> BR_W

Bits 3:5 - Baud rate control

pub fn mstr(&mut self) -> MSTR_W

Bit 2 - Master selection

pub fn cpol(&mut self) -> CPOL_W

Bit 1 - Clock polarity

pub fn cpha(&mut self) -> CPHA_W

Bit 0 - Clock phase

impl W<u32, Reg<u32, _CR2>>

pub fn rxdmaen(&mut self) -> RXDMAEN_W

Bit 0 - Rx buffer DMA enable

pub fn txdmaen(&mut self) -> TXDMAEN_W

Bit 1 - Tx buffer DMA enable

pub fn ssoe(&mut self) -> SSOE_W

Bit 2 - SS output enable

pub fn frf(&mut self) -> FRF_W

Bit 4 - Frame format

pub fn errie(&mut self) -> ERRIE_W

Bit 5 - Error interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W

Bit 6 - RX buffer not empty interrupt enable

pub fn txeie(&mut self) -> TXEIE_W

Bit 7 - Tx buffer empty interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn crcerr(&mut self) -> CRCERR_W

Bit 4 - CRC error flag

impl W<u32, Reg<u32, _DR>>

pub fn dr(&mut self) -> DR_W

Bits 0:15 - Data register

impl W<u32, Reg<u32, _CRCPR>>

pub fn crcpoly(&mut self) -> CRCPOLY_W

Bits 0:15 - CRC polynomial register

impl W<u32, Reg<u32, _I2SCFGR>>

pub fn i2smod(&mut self) -> I2SMOD_W

Bit 11 - I2S mode selection

pub fn i2se(&mut self) -> I2SE_W

Bit 10 - I2S Enable

pub fn i2scfg(&mut self) -> I2SCFG_W

Bits 8:9 - I2S configuration mode

pub fn pcmsync(&mut self) -> PCMSYNC_W

Bit 7 - PCM frame synchronization

pub fn i2sstd(&mut self) -> I2SSTD_W

Bits 4:5 - I2S standard selection

pub fn ckpol(&mut self) -> CKPOL_W

Bit 3 - Steady state clock polarity

pub fn datlen(&mut self) -> DATLEN_W

Bits 1:2 - Data length to be transferred

pub fn chlen(&mut self) -> CHLEN_W

Bit 0 - Channel length (number of bits per audio channel)

impl W<u32, Reg<u32, _I2SPR>>

pub fn mckoe(&mut self) -> MCKOE_W

Bit 9 - Master clock output enable

pub fn odd(&mut self) -> ODD_W

Bit 8 - Odd factor for the prescaler

pub fn i2sdiv(&mut self) -> I2SDIV_W

Bits 0:7 - I2S Linear prescaler

impl W<u32, Reg<u32, _CR1>>

pub fn pe(&mut self) -> PE_W

Bit 0 - Peripheral enable

pub fn txie(&mut self) -> TXIE_W

Bit 1 - TX Interrupt enable

pub fn rxie(&mut self) -> RXIE_W

Bit 2 - RX Interrupt enable

pub fn addrie(&mut self) -> ADDRIE_W

Bit 3 - Address match interrupt enable (slave only)

pub fn nackie(&mut self) -> NACKIE_W

Bit 4 - Not acknowledge received interrupt enable

pub fn stopie(&mut self) -> STOPIE_W

Bit 5 - STOP detection Interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 6 - Transfer Complete interrupt enable

pub fn errie(&mut self) -> ERRIE_W

Bit 7 - Error interrupts enable

pub fn dnf(&mut self) -> DNF_W

Bits 8:11 - Digital noise filter

pub fn anfoff(&mut self) -> ANFOFF_W

Bit 12 - Analog noise filter OFF

pub fn txdmaen(&mut self) -> TXDMAEN_W

Bit 14 - DMA transmission requests enable

pub fn rxdmaen(&mut self) -> RXDMAEN_W

Bit 15 - DMA reception requests enable

pub fn sbc(&mut self) -> SBC_W

Bit 16 - Slave byte control

pub fn nostretch(&mut self) -> NOSTRETCH_W

Bit 17 - Clock stretching disable

pub fn wupen(&mut self) -> WUPEN_W

Bit 18 - Wakeup from STOP enable

pub fn gcen(&mut self) -> GCEN_W

Bit 19 - General call enable

pub fn smbhen(&mut self) -> SMBHEN_W

Bit 20 - SMBus Host address enable

pub fn smbden(&mut self) -> SMBDEN_W

Bit 21 - SMBus Device Default address enable

pub fn alerten(&mut self) -> ALERTEN_W

Bit 22 - SMBUS alert enable

pub fn pecen(&mut self) -> PECEN_W

Bit 23 - PEC enable

impl W<u32, Reg<u32, _CR2>>

pub fn pecbyte(&mut self) -> PECBYTE_W

Bit 26 - Packet error checking byte

pub fn autoend(&mut self) -> AUTOEND_W

Bit 25 - Automatic end mode (master mode)

pub fn reload(&mut self) -> RELOAD_W

Bit 24 - NBYTES reload mode

pub fn nbytes(&mut self) -> NBYTES_W

Bits 16:23 - Number of bytes

pub fn nack(&mut self) -> NACK_W

Bit 15 - NACK generation (slave mode)

pub fn stop(&mut self) -> STOP_W

Bit 14 - Stop generation (master mode)

pub fn start(&mut self) -> START_W

Bit 13 - Start generation

pub fn head10r(&mut self) -> HEAD10R_W

Bit 12 - 10-bit address header only read direction (master receiver mode)

pub fn add10(&mut self) -> ADD10_W

Bit 11 - 10-bit addressing mode (master mode)

pub fn rd_wrn(&mut self) -> RD_WRN_W

Bit 10 - Transfer direction (master mode)

pub fn sadd(&mut self) -> SADD_W

Bits 0:9 - Slave address bit (master mode)

impl W<u32, Reg<u32, _OAR1>>

pub fn oa1(&mut self) -> OA1_W

Bits 0:9 - Interface address

pub fn oa1mode(&mut self) -> OA1MODE_W

Bit 10 - Own Address 1 10-bit mode

pub fn oa1en(&mut self) -> OA1EN_W

Bit 15 - Own Address 1 enable

impl W<u32, Reg<u32, _OAR2>>

pub fn oa2(&mut self) -> OA2_W

Bits 1:7 - Interface address

pub fn oa2msk(&mut self) -> OA2MSK_W

Bits 8:10 - Own Address 2 masks

pub fn oa2en(&mut self) -> OA2EN_W

Bit 15 - Own Address 2 enable

impl W<u32, Reg<u32, _TIMINGR>>

pub fn scll(&mut self) -> SCLL_W

Bits 0:7 - SCL low period (master mode)

pub fn sclh(&mut self) -> SCLH_W

Bits 8:15 - SCL high period (master mode)

pub fn sdadel(&mut self) -> SDADEL_W

Bits 16:19 - Data hold time

pub fn scldel(&mut self) -> SCLDEL_W

Bits 20:23 - Data setup time

pub fn presc(&mut self) -> PRESC_W

Bits 28:31 - Timing prescaler

impl W<u32, Reg<u32, _TIMEOUTR>>

pub fn timeouta(&mut self) -> TIMEOUTA_W

Bits 0:11 - Bus timeout A

pub fn tidle(&mut self) -> TIDLE_W

Bit 12 - Idle clock timeout detection

pub fn timouten(&mut self) -> TIMOUTEN_W

Bit 15 - Clock timeout enable

pub fn timeoutb(&mut self) -> TIMEOUTB_W

Bits 16:27 - Bus timeout B

pub fn texten(&mut self) -> TEXTEN_W

Bit 31 - Extended clock timeout enable

impl W<u32, Reg<u32, _ISR>>

pub fn txis(&mut self) -> TXIS_W

Bit 1 - Transmit interrupt status (transmitters)

pub fn txe(&mut self) -> TXE_W

Bit 0 - Transmit data register empty (transmitters)

impl W<u32, Reg<u32, _ICR>>

pub fn alertcf(&mut self) -> ALERTCF_W

Bit 13 - Alert flag clear

pub fn timoutcf(&mut self) -> TIMOUTCF_W

Bit 12 - Timeout detection flag clear

pub fn peccf(&mut self) -> PECCF_W

Bit 11 - PEC Error flag clear

pub fn ovrcf(&mut self) -> OVRCF_W

Bit 10 - Overrun/Underrun flag clear

pub fn arlocf(&mut self) -> ARLOCF_W

Bit 9 - Arbitration lost flag clear

pub fn berrcf(&mut self) -> BERRCF_W

Bit 8 - Bus error flag clear

pub fn stopcf(&mut self) -> STOPCF_W

Bit 5 - Stop detection flag clear

pub fn nackcf(&mut self) -> NACKCF_W

Bit 4 - Not Acknowledge flag clear

pub fn addrcf(&mut self) -> ADDRCF_W

Bit 3 - Address Matched flag clear

impl W<u32, Reg<u32, _TXDR>>

pub fn txdata(&mut self) -> TXDATA_W

Bits 0:7 - 8-bit transmit data

impl W<u32, Reg<u32, _CR>>

pub fn lpds(&mut self) -> LPDS_W

Bit 16 - Regulator in Low-power deepsleep mode

pub fn pdds(&mut self) -> PDDS_W

Bit 1 - Power down deepsleep

pub fn cwuf(&mut self) -> CWUF_W

Bit 2 - Clear wakeup flag

pub fn csbf(&mut self) -> CSBF_W

Bit 3 - Clear standby flag

pub fn pvde(&mut self) -> PVDE_W

Bit 4 - Power voltage detector enable

pub fn pls(&mut self) -> PLS_W

Bits 5:7 - PVD level selection

pub fn dbp(&mut self) -> DBP_W

Bit 8 - Disable backup domain write protection

pub fn ulp(&mut self) -> ULP_W

Bit 9 - Ultra-low-power mode

pub fn fwu(&mut self) -> FWU_W

Bit 10 - Fast wakeup

pub fn vos(&mut self) -> VOS_W

Bits 11:12 - Voltage scaling range selection

pub fn ds_ee_koff(&mut self) -> DS_EE_KOFF_W

Bit 13 - Deep sleep mode with Flash memory kept off

pub fn lprun(&mut self) -> LPRUN_W

Bit 14 - Low power run mode

pub fn lpsdsr(&mut self) -> LPSDSR_W

Bit 0 - Low-power deepsleep/Sleep/Low-power run

impl W<u32, Reg<u32, _CSR>>

pub fn ewup2(&mut self) -> EWUP2_W

Bit 9 - Enable WKUP pin 2

pub fn ewup1(&mut self) -> EWUP1_W

Bit 8 - Enable WKUP pin 1

pub fn ewup3(&mut self) -> EWUP3_W

Bit 10 - Enable WKUP pin 3

impl W<u32, Reg<u32, _ACR>>

pub fn latency(&mut self) -> LATENCY_W

Bit 0 - Latency

pub fn prften(&mut self) -> PRFTEN_W

Bit 1 - Prefetch enable

pub fn sleep_pd(&mut self) -> SLEEP_PD_W

Bit 3 - Flash mode during Sleep

pub fn run_pd(&mut self) -> RUN_PD_W

Bit 4 - Flash mode during Run

pub fn disab_buf(&mut self) -> DISAB_BUF_W

Bit 5 - Disable Buffer

pub fn pre_read(&mut self) -> PRE_READ_W

Bit 6 - Pre-read data address

impl W<u32, Reg<u32, _PECR>>

pub fn pelock(&mut self) -> PELOCK_W

Bit 0 - FLASH_PECR and data EEPROM lock

pub fn prglock(&mut self) -> PRGLOCK_W

Bit 1 - Program memory lock

pub fn optlock(&mut self) -> OPTLOCK_W

Bit 2 - Option bytes block lock

pub fn prog(&mut self) -> PROG_W

Bit 3 - Program memory selection

pub fn data(&mut self) -> DATA_W

Bit 4 - Data EEPROM selection

pub fn fix(&mut self) -> FIX_W

Bit 8 - Fixed time data write for Byte, Half Word and Word programming

pub fn erase(&mut self) -> ERASE_W

Bit 9 - Page or Double Word erase mode

pub fn fprg(&mut self) -> FPRG_W

Bit 10 - Half Page/Double Word programming mode

pub fn parallelbank(&mut self) -> PARALLELBANK_W

Bit 15 - Parallel bank mode

pub fn eopie(&mut self) -> EOPIE_W

Bit 16 - End of programming interrupt enable

pub fn errie(&mut self) -> ERRIE_W

Bit 17 - Error interrupt enable

pub fn obl_launch(&mut self) -> OBL_LAUNCH_W

Bit 18 - Launch the option byte loading

impl W<u32, Reg<u32, _PDKEYR>>

pub fn pdkeyr(&mut self) -> PDKEYR_W

Bits 0:31 - RUN_PD in FLASH_ACR key

impl W<u32, Reg<u32, _PEKEYR>>

pub fn pekeyr(&mut self) -> PEKEYR_W

Bits 0:31 - FLASH_PEC and data EEPROM key

impl W<u32, Reg<u32, _PRGKEYR>>

pub fn prgkeyr(&mut self) -> PRGKEYR_W

Bits 0:31 - Program memory key

impl W<u32, Reg<u32, _OPTKEYR>>

pub fn optkeyr(&mut self) -> OPTKEYR_W

Bits 0:31 - Option byte key

impl W<u32, Reg<u32, _SR>>

pub fn eop(&mut self) -> EOP_W

Bit 1 - End of operation

pub fn wrperr(&mut self) -> WRPERR_W

Bit 8 - Write protected error

pub fn pgaerr(&mut self) -> PGAERR_W

Bit 9 - Programming alignment error

pub fn sizerr(&mut self) -> SIZERR_W

Bit 10 - Size error

pub fn optverr(&mut self) -> OPTVERR_W

Bit 11 - Option validity error

pub fn rderr(&mut self) -> RDERR_W

Bit 14 - RDERR

pub fn notzeroerr(&mut self) -> NOTZEROERR_W

Bit 16 - NOTZEROERR

pub fn fwwerr(&mut self) -> FWWERR_W

Bit 17 - FWWERR

impl W<u32, Reg<u32, _IMR>>

pub fn im0(&mut self) -> IM0_W

Bit 0 - Interrupt Mask on line 0

pub fn im1(&mut self) -> IM1_W

Bit 1 - Interrupt Mask on line 1

pub fn im2(&mut self) -> IM2_W

Bit 2 - Interrupt Mask on line 2

pub fn im3(&mut self) -> IM3_W

Bit 3 - Interrupt Mask on line 3

pub fn im4(&mut self) -> IM4_W

Bit 4 - Interrupt Mask on line 4

pub fn im5(&mut self) -> IM5_W

Bit 5 - Interrupt Mask on line 5

pub fn im6(&mut self) -> IM6_W

Bit 6 - Interrupt Mask on line 6

pub fn im7(&mut self) -> IM7_W

Bit 7 - Interrupt Mask on line 7

pub fn im8(&mut self) -> IM8_W

Bit 8 - Interrupt Mask on line 8

pub fn im9(&mut self) -> IM9_W

Bit 9 - Interrupt Mask on line 9

pub fn im10(&mut self) -> IM10_W

Bit 10 - Interrupt Mask on line 10

pub fn im11(&mut self) -> IM11_W

Bit 11 - Interrupt Mask on line 11

pub fn im12(&mut self) -> IM12_W

Bit 12 - Interrupt Mask on line 12

pub fn im13(&mut self) -> IM13_W

Bit 13 - Interrupt Mask on line 13

pub fn im14(&mut self) -> IM14_W

Bit 14 - Interrupt Mask on line 14

pub fn im15(&mut self) -> IM15_W

Bit 15 - Interrupt Mask on line 15

pub fn im16(&mut self) -> IM16_W

Bit 16 - Interrupt Mask on line 16

pub fn im17(&mut self) -> IM17_W

Bit 17 - Interrupt Mask on line 17

pub fn im18(&mut self) -> IM18_W

Bit 18 - Interrupt Mask on line 18

pub fn im19(&mut self) -> IM19_W

Bit 19 - Interrupt Mask on line 19

pub fn im20(&mut self) -> IM20_W

Bit 20 - Interrupt Mask on line 20

pub fn im21(&mut self) -> IM21_W

Bit 21 - Interrupt Mask on line 21

pub fn im22(&mut self) -> IM22_W

Bit 22 - Interrupt Mask on line 22

pub fn im23(&mut self) -> IM23_W

Bit 23 - Interrupt Mask on line 23

pub fn im24(&mut self) -> IM24_W

Bit 24 - Interrupt Mask on line 24

pub fn im25(&mut self) -> IM25_W

Bit 25 - Interrupt Mask on line 25

pub fn im26(&mut self) -> IM26_W

Bit 26 - Interrupt Mask on line 27

pub fn im28(&mut self) -> IM28_W

Bit 28 - Interrupt Mask on line 27

pub fn im29(&mut self) -> IM29_W

Bit 29 - Interrupt Mask on line 27

impl W<u32, Reg<u32, _EMR>>

pub fn em0(&mut self) -> EM0_W

Bit 0 - Event Mask on line 0

pub fn em1(&mut self) -> EM1_W

Bit 1 - Event Mask on line 1

pub fn em2(&mut self) -> EM2_W

Bit 2 - Event Mask on line 2

pub fn em3(&mut self) -> EM3_W

Bit 3 - Event Mask on line 3

pub fn em4(&mut self) -> EM4_W

Bit 4 - Event Mask on line 4

pub fn em5(&mut self) -> EM5_W

Bit 5 - Event Mask on line 5

pub fn em6(&mut self) -> EM6_W

Bit 6 - Event Mask on line 6

pub fn em7(&mut self) -> EM7_W

Bit 7 - Event Mask on line 7

pub fn em8(&mut self) -> EM8_W

Bit 8 - Event Mask on line 8

pub fn em9(&mut self) -> EM9_W

Bit 9 - Event Mask on line 9

pub fn em10(&mut self) -> EM10_W

Bit 10 - Event Mask on line 10

pub fn em11(&mut self) -> EM11_W

Bit 11 - Event Mask on line 11

pub fn em12(&mut self) -> EM12_W

Bit 12 - Event Mask on line 12

pub fn em13(&mut self) -> EM13_W

Bit 13 - Event Mask on line 13

pub fn em14(&mut self) -> EM14_W

Bit 14 - Event Mask on line 14

pub fn em15(&mut self) -> EM15_W

Bit 15 - Event Mask on line 15

pub fn em16(&mut self) -> EM16_W

Bit 16 - Event Mask on line 16

pub fn em17(&mut self) -> EM17_W

Bit 17 - Event Mask on line 17

pub fn em18(&mut self) -> EM18_W

Bit 18 - Event Mask on line 18

pub fn em19(&mut self) -> EM19_W

Bit 19 - Event Mask on line 19

pub fn em20(&mut self) -> EM20_W

Bit 20 - Event Mask on line 20

pub fn em21(&mut self) -> EM21_W

Bit 21 - Event Mask on line 21

pub fn em22(&mut self) -> EM22_W

Bit 22 - Event Mask on line 22

pub fn em23(&mut self) -> EM23_W

Bit 23 - Event Mask on line 23

pub fn em24(&mut self) -> EM24_W

Bit 24 - Event Mask on line 24

pub fn em25(&mut self) -> EM25_W

Bit 25 - Event Mask on line 25

pub fn em26(&mut self) -> EM26_W

Bit 26 - Event Mask on line 26

pub fn em28(&mut self) -> EM28_W

Bit 28 - Event Mask on line 28

pub fn em29(&mut self) -> EM29_W

Bit 29 - Event Mask on line 29

impl W<u32, Reg<u32, _RTSR>>

pub fn rt0(&mut self) -> RT0_W

Bit 0 - Rising trigger event configuration of line 0

pub fn rt1(&mut self) -> RT1_W

Bit 1 - Rising trigger event configuration of line 1

pub fn rt2(&mut self) -> RT2_W

Bit 2 - Rising trigger event configuration of line 2

pub fn rt3(&mut self) -> RT3_W

Bit 3 - Rising trigger event configuration of line 3

pub fn rt4(&mut self) -> RT4_W

Bit 4 - Rising trigger event configuration of line 4

pub fn rt5(&mut self) -> RT5_W

Bit 5 - Rising trigger event configuration of line 5

pub fn rt6(&mut self) -> RT6_W

Bit 6 - Rising trigger event configuration of line 6

pub fn rt7(&mut self) -> RT7_W

Bit 7 - Rising trigger event configuration of line 7

pub fn rt8(&mut self) -> RT8_W

Bit 8 - Rising trigger event configuration of line 8

pub fn rt9(&mut self) -> RT9_W

Bit 9 - Rising trigger event configuration of line 9

pub fn rt10(&mut self) -> RT10_W

Bit 10 - Rising trigger event configuration of line 10

pub fn rt11(&mut self) -> RT11_W

Bit 11 - Rising trigger event configuration of line 11

pub fn rt12(&mut self) -> RT12_W

Bit 12 - Rising trigger event configuration of line 12

pub fn rt13(&mut self) -> RT13_W

Bit 13 - Rising trigger event configuration of line 13

pub fn rt14(&mut self) -> RT14_W

Bit 14 - Rising trigger event configuration of line 14

pub fn rt15(&mut self) -> RT15_W

Bit 15 - Rising trigger event configuration of line 15

pub fn rt16(&mut self) -> RT16_W

Bit 16 - Rising trigger event configuration of line 16

pub fn rt17(&mut self) -> RT17_W

Bit 17 - Rising trigger event configuration of line 17

pub fn rt19(&mut self) -> RT19_W

Bit 19 - Rising trigger event configuration of line 19

pub fn rt20(&mut self) -> RT20_W

Bit 20 - Rising trigger event configuration of line 20

pub fn rt21(&mut self) -> RT21_W

Bit 21 - Rising trigger event configuration of line 21

pub fn rt22(&mut self) -> RT22_W

Bit 22 - Rising trigger event configuration of line 22

impl W<u32, Reg<u32, _FTSR>>

pub fn ft0(&mut self) -> FT0_W

Bit 0 - Falling trigger event configuration of line 0

pub fn ft1(&mut self) -> FT1_W

Bit 1 - Falling trigger event configuration of line 1

pub fn ft2(&mut self) -> FT2_W

Bit 2 - Falling trigger event configuration of line 2

pub fn ft3(&mut self) -> FT3_W

Bit 3 - Falling trigger event configuration of line 3

pub fn ft4(&mut self) -> FT4_W

Bit 4 - Falling trigger event configuration of line 4

pub fn ft5(&mut self) -> FT5_W

Bit 5 - Falling trigger event configuration of line 5

pub fn ft6(&mut self) -> FT6_W

Bit 6 - Falling trigger event configuration of line 6

pub fn ft7(&mut self) -> FT7_W

Bit 7 - Falling trigger event configuration of line 7

pub fn ft8(&mut self) -> FT8_W

Bit 8 - Falling trigger event configuration of line 8

pub fn ft9(&mut self) -> FT9_W

Bit 9 - Falling trigger event configuration of line 9

pub fn ft10(&mut self) -> FT10_W

Bit 10 - Falling trigger event configuration of line 10

pub fn ft11(&mut self) -> FT11_W

Bit 11 - Falling trigger event configuration of line 11

pub fn ft12(&mut self) -> FT12_W

Bit 12 - Falling trigger event configuration of line 12

pub fn ft13(&mut self) -> FT13_W

Bit 13 - Falling trigger event configuration of line 13

pub fn ft14(&mut self) -> FT14_W

Bit 14 - Falling trigger event configuration of line 14

pub fn ft15(&mut self) -> FT15_W

Bit 15 - Falling trigger event configuration of line 15

pub fn ft16(&mut self) -> FT16_W

Bit 16 - Falling trigger event configuration of line 16

pub fn ft17(&mut self) -> FT17_W

Bit 17 - Falling trigger event configuration of line 17

pub fn ft19(&mut self) -> FT19_W

Bit 19 - Falling trigger event configuration of line 19

pub fn ft20(&mut self) -> FT20_W

Bit 20 - Falling trigger event configuration of line 20

pub fn ft21(&mut self) -> FT21_W

Bit 21 - Falling trigger event configuration of line 21

pub fn ft22(&mut self) -> FT22_W

Bit 22 - Falling trigger event configuration of line 22

impl W<u32, Reg<u32, _SWIER>>

pub fn swi0(&mut self) -> SWI0_W

Bit 0 - Software Interrupt on line 0

pub fn swi1(&mut self) -> SWI1_W

Bit 1 - Software Interrupt on line 1

pub fn swi2(&mut self) -> SWI2_W

Bit 2 - Software Interrupt on line 2

pub fn swi3(&mut self) -> SWI3_W

Bit 3 - Software Interrupt on line 3

pub fn swi4(&mut self) -> SWI4_W

Bit 4 - Software Interrupt on line 4

pub fn swi5(&mut self) -> SWI5_W

Bit 5 - Software Interrupt on line 5

pub fn swi6(&mut self) -> SWI6_W

Bit 6 - Software Interrupt on line 6

pub fn swi7(&mut self) -> SWI7_W

Bit 7 - Software Interrupt on line 7

pub fn swi8(&mut self) -> SWI8_W

Bit 8 - Software Interrupt on line 8

pub fn swi9(&mut self) -> SWI9_W

Bit 9 - Software Interrupt on line 9

pub fn swi10(&mut self) -> SWI10_W

Bit 10 - Software Interrupt on line 10

pub fn swi11(&mut self) -> SWI11_W

Bit 11 - Software Interrupt on line 11

pub fn swi12(&mut self) -> SWI12_W

Bit 12 - Software Interrupt on line 12

pub fn swi13(&mut self) -> SWI13_W

Bit 13 - Software Interrupt on line 13

pub fn swi14(&mut self) -> SWI14_W

Bit 14 - Software Interrupt on line 14

pub fn swi15(&mut self) -> SWI15_W

Bit 15 - Software Interrupt on line 15

pub fn swi16(&mut self) -> SWI16_W

Bit 16 - Software Interrupt on line 16

pub fn swi17(&mut self) -> SWI17_W

Bit 17 - Software Interrupt on line 17

pub fn swi19(&mut self) -> SWI19_W

Bit 19 - Software Interrupt on line 19

pub fn swi20(&mut self) -> SWI20_W

Bit 20 - Software Interrupt on line 20

pub fn swi21(&mut self) -> SWI21_W

Bit 21 - Software Interrupt on line 21

pub fn swi22(&mut self) -> SWI22_W

Bit 22 - Software Interrupt on line 22

impl W<u32, Reg<u32, _PR>>

pub fn pif0(&mut self) -> PIF0_W

Bit 0 - Pending bit 0

pub fn pif1(&mut self) -> PIF1_W

Bit 1 - Pending bit 1

pub fn pif2(&mut self) -> PIF2_W

Bit 2 - Pending bit 2

pub fn pif3(&mut self) -> PIF3_W

Bit 3 - Pending bit 3

pub fn pif4(&mut self) -> PIF4_W

Bit 4 - Pending bit 4

pub fn pif5(&mut self) -> PIF5_W

Bit 5 - Pending bit 5

pub fn pif6(&mut self) -> PIF6_W

Bit 6 - Pending bit 6

pub fn pif7(&mut self) -> PIF7_W

Bit 7 - Pending bit 7

pub fn pif8(&mut self) -> PIF8_W

Bit 8 - Pending bit 8

pub fn pif9(&mut self) -> PIF9_W

Bit 9 - Pending bit 9

pub fn pif10(&mut self) -> PIF10_W

Bit 10 - Pending bit 10

pub fn pif11(&mut self) -> PIF11_W

Bit 11 - Pending bit 11

pub fn pif12(&mut self) -> PIF12_W

Bit 12 - Pending bit 12

pub fn pif13(&mut self) -> PIF13_W

Bit 13 - Pending bit 13

pub fn pif14(&mut self) -> PIF14_W

Bit 14 - Pending bit 14

pub fn pif15(&mut self) -> PIF15_W

Bit 15 - Pending bit 15

pub fn pif16(&mut self) -> PIF16_W

Bit 16 - Pending bit 16

pub fn pif17(&mut self) -> PIF17_W

Bit 17 - Pending bit 17

pub fn pif19(&mut self) -> PIF19_W

Bit 19 - Pending bit 19

pub fn pif20(&mut self) -> PIF20_W

Bit 20 - Pending bit 20

pub fn pif21(&mut self) -> PIF21_W

Bit 21 - Pending bit 21

pub fn pif22(&mut self) -> PIF22_W

Bit 22 - Pending bit 22

impl W<u32, Reg<u32, _ISR>>

pub fn adrdy(&mut self) -> ADRDY_W

Bit 0 - ADC ready

pub fn eosmp(&mut self) -> EOSMP_W

Bit 1 - End of sampling flag

pub fn eoc(&mut self) -> EOC_W

Bit 2 - End of conversion flag

pub fn eos(&mut self) -> EOS_W

Bit 3 - End of sequence flag

pub fn ovr(&mut self) -> OVR_W

Bit 4 - ADC overrun

pub fn awd(&mut self) -> AWD_W

Bit 7 - Analog watchdog flag

pub fn eocal(&mut self) -> EOCAL_W

Bit 11 - End Of Calibration flag

impl W<u32, Reg<u32, _IER>>

pub fn adrdyie(&mut self) -> ADRDYIE_W

Bit 0 - ADC ready interrupt enable

pub fn eosmpie(&mut self) -> EOSMPIE_W

Bit 1 - End of sampling flag interrupt enable

pub fn eocie(&mut self) -> EOCIE_W

Bit 2 - End of conversion interrupt enable

pub fn eosie(&mut self) -> EOSIE_W

Bit 3 - End of conversion sequence interrupt enable

pub fn ovrie(&mut self) -> OVRIE_W

Bit 4 - Overrun interrupt enable

pub fn awdie(&mut self) -> AWDIE_W

Bit 7 - Analog watchdog interrupt enable

pub fn eocalie(&mut self) -> EOCALIE_W

Bit 11 - End of calibration interrupt enable

impl W<u32, Reg<u32, _CR>>

pub fn aden(&mut self) -> ADEN_W

Bit 0 - ADC enable command

pub fn addis(&mut self) -> ADDIS_W

Bit 1 - ADC disable command

pub fn adstart(&mut self) -> ADSTART_W

Bit 2 - ADC start conversion command

pub fn adstp(&mut self) -> ADSTP_W

Bit 4 - ADC stop conversion command

pub fn advregen(&mut self) -> ADVREGEN_W

Bit 28 - ADC Voltage Regulator Enable

pub fn adcal(&mut self) -> ADCAL_W

Bit 31 - ADC calibration

impl W<u32, Reg<u32, _CFGR1>>

pub fn awdch(&mut self) -> AWDCH_W

Bits 26:30 - Analog watchdog channel selection

pub fn awden(&mut self) -> AWDEN_W

Bit 23 - Analog watchdog enable

pub fn awdsgl(&mut self) -> AWDSGL_W

Bit 22 - Enable the watchdog on a single channel or on all channels

pub fn discen(&mut self) -> DISCEN_W

Bit 16 - Discontinuous mode

pub fn autoff(&mut self) -> AUTOFF_W

Bit 15 - Auto-off mode

pub fn wait(&mut self) -> WAIT_W

Bit 14 - Auto-delayed conversion mode

pub fn cont(&mut self) -> CONT_W

Bit 13 - Single / continuous conversion mode

pub fn ovrmod(&mut self) -> OVRMOD_W

Bit 12 - Overrun management mode

pub fn exten(&mut self) -> EXTEN_W

Bits 10:11 - External trigger enable and polarity selection

pub fn extsel(&mut self) -> EXTSEL_W

Bits 6:8 - External trigger selection

pub fn align(&mut self) -> ALIGN_W

Bit 5 - Data alignment

pub fn res(&mut self) -> RES_W

Bits 3:4 - Data resolution

pub fn scandir(&mut self) -> SCANDIR_W

Bit 2 - Scan sequence direction

pub fn dmacfg(&mut self) -> DMACFG_W

Bit 1 - Direct memery access configuration

pub fn dmaen(&mut self) -> DMAEN_W

Bit 0 - Direct memory access enable

impl W<u32, Reg<u32, _CFGR2>>

pub fn ovse(&mut self) -> OVSE_W

Bit 0 - Oversampler Enable

pub fn ovsr(&mut self) -> OVSR_W

Bits 2:4 - Oversampling ratio

pub fn ovss(&mut self) -> OVSS_W

Bits 5:8 - Oversampling shift

pub fn tovs(&mut self) -> TOVS_W

Bit 9 - Triggered Oversampling

pub fn ckmode(&mut self) -> CKMODE_W

Bits 30:31 - ADC clock mode

impl W<u32, Reg<u32, _SMPR>>

pub fn smp(&mut self) -> SMP_W

Bits 0:2 - Sampling time selection

impl W<u32, Reg<u32, _TR>>

pub fn ht(&mut self) -> HT_W

Bits 16:27 - Analog watchdog higher threshold

pub fn lt(&mut self) -> LT_W

Bits 0:11 - Analog watchdog lower threshold

impl W<u32, Reg<u32, _CHSELR>>

pub fn chsel18(&mut self) -> CHSEL18_W

Bit 18 - Channel-x selection

pub fn chsel17(&mut self) -> CHSEL17_W

Bit 17 - Channel-x selection

pub fn chsel16(&mut self) -> CHSEL16_W

Bit 16 - Channel-x selection

pub fn chsel15(&mut self) -> CHSEL15_W

Bit 15 - Channel-x selection

pub fn chsel14(&mut self) -> CHSEL14_W

Bit 14 - Channel-x selection

pub fn chsel13(&mut self) -> CHSEL13_W

Bit 13 - Channel-x selection

pub fn chsel12(&mut self) -> CHSEL12_W

Bit 12 - Channel-x selection

pub fn chsel11(&mut self) -> CHSEL11_W

Bit 11 - Channel-x selection

pub fn chsel10(&mut self) -> CHSEL10_W

Bit 10 - Channel-x selection

pub fn chsel9(&mut self) -> CHSEL9_W

Bit 9 - Channel-x selection

pub fn chsel8(&mut self) -> CHSEL8_W

Bit 8 - Channel-x selection

pub fn chsel7(&mut self) -> CHSEL7_W

Bit 7 - Channel-x selection

pub fn chsel6(&mut self) -> CHSEL6_W

Bit 6 - Channel-x selection

pub fn chsel5(&mut self) -> CHSEL5_W

Bit 5 - Channel-x selection

pub fn chsel4(&mut self) -> CHSEL4_W

Bit 4 - Channel-x selection

pub fn chsel3(&mut self) -> CHSEL3_W

Bit 3 - Channel-x selection

pub fn chsel2(&mut self) -> CHSEL2_W

Bit 2 - Channel-x selection

pub fn chsel1(&mut self) -> CHSEL1_W

Bit 1 - Channel-x selection

pub fn chsel0(&mut self) -> CHSEL0_W

Bit 0 - Channel-x selection

impl W<u32, Reg<u32, _CALFACT>>

pub fn calfact(&mut self) -> CALFACT_W

Bits 0:6 - Calibration factor

impl W<u32, Reg<u32, _CCR>>

pub fn presc(&mut self) -> PRESC_W

Bits 18:21 - ADC prescaler

pub fn vrefen(&mut self) -> VREFEN_W

Bit 22 - VREFINT enable

pub fn tsen(&mut self) -> TSEN_W

Bit 23 - Temperature sensor enable

pub fn vlcden(&mut self) -> VLCDEN_W

Bit 24 - VLCD enable

pub fn lfmen(&mut self) -> LFMEN_W

Bit 25 - Low Frequency Mode enable

impl W<u32, Reg<u32, _CR>>

pub fn dbg_stop(&mut self) -> DBG_STOP_W

Bit 1 - Debug Stop Mode

pub fn dbg_standby(&mut self) -> DBG_STANDBY_W

Bit 2 - Debug Standby Mode

pub fn dbg_sleep(&mut self) -> DBG_SLEEP_W

Bit 0 - Debug Sleep Mode

impl W<u32, Reg<u32, _APB1_FZ>>

pub fn dbg_timer2_stop(&mut self) -> DBG_TIMER2_STOP_W

Bit 0 - Debug Timer 2 stopped when Core is halted

pub fn dbg_timer6_stop(&mut self) -> DBG_TIMER6_STOP_W

Bit 4 - Debug Timer 6 stopped when Core is halted

pub fn dbg_rtc_stop(&mut self) -> DBG_RTC_STOP_W

Bit 10 - Debug RTC stopped when Core is halted

pub fn dbg_wwdg_stop(&mut self) -> DBG_WWDG_STOP_W

Bit 11 - Debug Window Wachdog stopped when Core is halted

pub fn dbg_iwdg_stop(&mut self) -> DBG_IWDG_STOP_W

Bit 12 - Debug Independent Wachdog stopped when Core is halted

pub fn dbg_i2c1_stop(&mut self) -> DBG_I2C1_STOP_W

Bit 21 - I2C1 SMBUS timeout mode stopped when core is halted

pub fn dbg_i2c2_stop(&mut self) -> DBG_I2C2_STOP_W

Bit 22 - I2C2 SMBUS timeout mode stopped when core is halted

pub fn dbg_lptimer_stop(&mut self) -> DBG_LPTIMER_STOP_W

Bit 31 - LPTIM1 counter stopped when core is halted

impl W<u32, Reg<u32, _APB2_FZ>>

pub fn dbg_timer21_stop(&mut self) -> DBG_TIMER21_STOP_W

Bit 2 - Debug Timer 21 stopped when Core is halted

pub fn dbg_timer22_sto(&mut self) -> DBG_TIMER22_STO_W

Bit 6 - Debug Timer 22 stopped when Core is halted

impl W<u32, Reg<u32, _CR1>>

pub fn ckd(&mut self) -> CKD_W

Bits 8:9 - Clock division

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn cms(&mut self) -> CMS_W

Bits 5:6 - Center-aligned mode selection

pub fn dir(&mut self) -> DIR_W

Bit 4 - Direction

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

impl W<u32, Reg<u32, _CR2>>

pub fn ti1s(&mut self) -> TI1S_W

Bit 7 - TI1 selection

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

pub fn ccds(&mut self) -> CCDS_W

Bit 3 - Capture/compare DMA selection

impl W<u32, Reg<u32, _SMCR>>

pub fn etp(&mut self) -> ETP_W

Bit 15 - External trigger polarity

pub fn ece(&mut self) -> ECE_W

Bit 14 - External clock enable

pub fn etps(&mut self) -> ETPS_W

Bits 12:13 - External trigger prescaler

pub fn etf(&mut self) -> ETF_W

Bits 8:11 - External trigger filter

pub fn msm(&mut self) -> MSM_W

Bit 7 - Master/Slave mode

pub fn ts(&mut self) -> TS_W

Bits 4:6 - Trigger selection

pub fn sms(&mut self) -> SMS_W

Bits 0:2 - Slave mode selection

impl W<u32, Reg<u32, _DIER>>

pub fn tde(&mut self) -> TDE_W

Bit 14 - Trigger DMA request enable

pub fn cc4de(&mut self) -> CC4DE_W

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&mut self) -> CC3DE_W

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&mut self) -> CC2DE_W

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&mut self) -> CC1DE_W

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&mut self) -> UDE_W

Bit 8 - Update DMA request enable

pub fn tie(&mut self) -> TIE_W

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&mut self) -> CC4IE_W

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&mut self) -> CC3IE_W

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn cc4of(&mut self) -> CC4OF_W

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&mut self) -> CC3OF_W

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&mut self) -> CC2OF_W

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W

Bit 6 - Trigger interrupt flag

pub fn cc4if(&mut self) -> CC4IF_W

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&mut self) -> CC3IF_W

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn tg(&mut self) -> TG_W

Bit 6 - Trigger generation

pub fn cc4g(&mut self) -> CC4G_W

Bit 4 - Capture/compare 4 generation

pub fn cc3g(&mut self) -> CC3G_W

Bit 3 - Capture/compare 3 generation

pub fn cc2g(&mut self) -> CC2G_W

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>

pub fn oc2ce(&mut self) -> OC2CE_W

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&mut self) -> OC2M_W

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&mut self) -> OC1CE_W

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&mut self) -> OC1M_W

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>

pub fn ic2f(&mut self) -> IC2F_W

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR2_OUTPUT>>

pub fn oc4ce(&mut self) -> OC4CE_W

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&mut self) -> OC4M_W

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&mut self) -> OC4PE_W

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&mut self) -> OC4FE_W

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&mut self) -> CC4S_W

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&mut self) -> OC3CE_W

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&mut self) -> OC3M_W

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&mut self) -> OC3PE_W

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&mut self) -> OC3FE_W

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&mut self) -> CC3S_W

Bits 0:1 - Capture/Compare 3 selection

impl W<u32, Reg<u32, _CCMR2_INPUT>>

pub fn ic4f(&mut self) -> IC4F_W

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&mut self) -> IC4PSC_W

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&mut self) -> CC4S_W

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&mut self) -> IC3F_W

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&mut self) -> IC3PSC_W

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&mut self) -> CC3S_W

Bits 0:1 - Capture/Compare 3 selection

impl W<u32, Reg<u32, _CCER>>

pub fn cc4np(&mut self) -> CC4NP_W

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc4p(&mut self) -> CC4P_W

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&mut self) -> CC4E_W

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&mut self) -> CC3NP_W

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3p(&mut self) -> CC3P_W

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&mut self) -> CC3E_W

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&mut self) -> CC2NP_W

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _DCR>>

pub fn dbl(&mut self) -> DBL_W

Bits 8:12 - DMA burst length

pub fn dba(&mut self) -> DBA_W

Bits 0:4 - DMA base address

impl W<u32, Reg<u32, _DMAR>>

pub fn dmab(&mut self) -> DMAB_W

Bits 0:15 - DMA register for burst accesses

impl W<u32, Reg<u32, _OR>>

pub fn etr_rmp(&mut self) -> ETR_RMP_W

Bits 0:2 - Timer2 ETR remap

pub fn ti4_rmp(&mut self) -> TI4_RMP_W

Bits 3:4 - Internal trigger

impl W<u16, Reg<u16, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - Low counter value

impl W<u16, Reg<u16, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Low Auto-reload value

impl W<u16, Reg<u16, _CCR>>

pub fn ccr(&mut self) -> CCR_W

Bits 0:15 - Low Capture/Compare 1 value

impl W<u32, Reg<u32, _CR1>>

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

impl W<u32, Reg<u32, _CR2>>

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

impl W<u32, Reg<u32, _DIER>>

pub fn ude(&mut self) -> UDE_W

Bit 8 - Update DMA request enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - Low counter value

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Low Auto-reload value

impl W<u32, Reg<u32, _CR1>>

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn dir(&mut self) -> DIR_W

Bit 4 - Direction

pub fn cms(&mut self) -> CMS_W

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn ckd(&mut self) -> CKD_W

Bits 8:9 - Clock division

impl W<u32, Reg<u32, _CR2>>

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

impl W<u32, Reg<u32, _SMCR>>

pub fn sms(&mut self) -> SMS_W

Bits 0:2 - Slave mode selection

pub fn ts(&mut self) -> TS_W

Bits 4:6 - Trigger selection

pub fn msm(&mut self) -> MSM_W

Bit 7 - Master/Slave mode

pub fn etf(&mut self) -> ETF_W

Bits 8:11 - External trigger filter

pub fn etps(&mut self) -> ETPS_W

Bits 12:13 - External trigger prescaler

pub fn ece(&mut self) -> ECE_W

Bit 14 - External clock enable

pub fn etp(&mut self) -> ETP_W

Bit 15 - External trigger polarity

impl W<u32, Reg<u32, _DIER>>

pub fn tie(&mut self) -> TIE_W

Bit 6 - Trigger interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn cc2of(&mut self) -> CC2OF_W

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W

Bit 6 - Trigger interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn tg(&mut self) -> TG_W

Bit 6 - Trigger generation

pub fn cc2g(&mut self) -> CC2G_W

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>

pub fn oc2m(&mut self) -> OC2M_W

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1m(&mut self) -> OC1M_W

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>

pub fn ic2f(&mut self) -> IC2F_W

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCER>>

pub fn cc2np(&mut self) -> CC2NP_W

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - counter value

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Auto-reload value

impl W<u32, Reg<u32, _CCR>>

pub fn ccr(&mut self) -> CCR_W

Bits 0:15 - Capture/Compare 1 value

impl W<u32, Reg<u32, _OR>>

pub fn etr_rmp(&mut self) -> ETR_RMP_W

Bits 0:1 - Timer21 ETR remap

pub fn ti1_rmp(&mut self) -> TI1_RMP_W

Bits 2:4 - Timer21 TI1

pub fn ti2_rmp(&mut self) -> TI2_RMP_W

Bit 5 - Timer21 TI2

impl W<u32, Reg<u32, _CR1>>

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn dir(&mut self) -> DIR_W

Bit 4 - Direction

pub fn cms(&mut self) -> CMS_W

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn ckd(&mut self) -> CKD_W

Bits 8:9 - Clock division

impl W<u32, Reg<u32, _CR2>>

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

impl W<u32, Reg<u32, _SMCR>>

pub fn sms(&mut self) -> SMS_W

Bits 0:2 - Slave mode selection

pub fn ts(&mut self) -> TS_W

Bits 4:6 - Trigger selection

pub fn msm(&mut self) -> MSM_W

Bit 7 - Master/Slave mode

pub fn etf(&mut self) -> ETF_W

Bits 8:11 - External trigger filter

pub fn etps(&mut self) -> ETPS_W

Bits 12:13 - External trigger prescaler

pub fn ece(&mut self) -> ECE_W

Bit 14 - External clock enable

pub fn etp(&mut self) -> ETP_W

Bit 15 - External trigger polarity

impl W<u32, Reg<u32, _DIER>>

pub fn tie(&mut self) -> TIE_W

Bit 6 - Trigger interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn cc2of(&mut self) -> CC2OF_W

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W

Bit 6 - Trigger interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn tg(&mut self) -> TG_W

Bit 6 - Trigger generation

pub fn cc2g(&mut self) -> CC2G_W

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>

pub fn oc2m(&mut self) -> OC2M_W

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1m(&mut self) -> OC1M_W

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>

pub fn ic2f(&mut self) -> IC2F_W

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCER>>

pub fn cc2np(&mut self) -> CC2NP_W

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - counter value

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Auto-reload value

impl W<u32, Reg<u32, _CCR>>

pub fn ccr(&mut self) -> CCR_W

Bits 0:15 - Capture/Compare 1 value

impl W<u32, Reg<u32, _OR>>

pub fn etr_rmp(&mut self) -> ETR_RMP_W

Bits 0:1 - Timer22 ETR remap

pub fn ti1_rmp(&mut self) -> TI1_RMP_W

Bits 2:3 - Timer22 TI1

impl W<u32, Reg<u32, _CR1>>

pub fn m1(&mut self) -> M1_W

Bit 28 - Word length

pub fn cmie(&mut self) -> CMIE_W

Bit 14 - Character match interrupt enable

pub fn mme(&mut self) -> MME_W

Bit 13 - Mute mode enable

pub fn m0(&mut self) -> M0_W

Bit 12 - Word length

pub fn wake(&mut self) -> WAKE_W

Bit 11 - Receiver wakeup method

pub fn pce(&mut self) -> PCE_W

Bit 10 - Parity control enable

pub fn ps(&mut self) -> PS_W

Bit 9 - Parity selection

pub fn peie(&mut self) -> PEIE_W

Bit 8 - PE interrupt enable

pub fn txeie(&mut self) -> TXEIE_W

Bit 7 - interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W

Bit 5 - RXNE interrupt enable

pub fn idleie(&mut self) -> IDLEIE_W

Bit 4 - IDLE interrupt enable

pub fn te(&mut self) -> TE_W

Bit 3 - Transmitter enable

pub fn re(&mut self) -> RE_W

Bit 2 - Receiver enable

pub fn uesm(&mut self) -> UESM_W

Bit 1 - USART enable in Stop mode

pub fn ue(&mut self) -> UE_W

Bit 0 - USART enable

pub fn deat(&mut self) -> DEAT_W

Bits 21:25 - Driver Enable assertion time

pub fn dedt(&mut self) -> DEDT_W

Bits 16:20 - Driver Enable de-assertion time

impl W<u32, Reg<u32, _CR2>>

pub fn msbfirst(&mut self) -> MSBFIRST_W

Bit 19 - Most significant bit first

pub fn datainv(&mut self) -> DATAINV_W

Bit 18 - Binary data inversion

pub fn txinv(&mut self) -> TXINV_W

Bit 17 - TX pin active level inversion

pub fn rxinv(&mut self) -> RXINV_W

Bit 16 - RX pin active level inversion

pub fn swap(&mut self) -> SWAP_W

Bit 15 - Swap TX/RX pins

pub fn stop(&mut self) -> STOP_W

Bits 12:13 - STOP bits

pub fn clken(&mut self) -> CLKEN_W

Bit 11 - Clock enable

pub fn addm7(&mut self) -> ADDM7_W

Bit 4 - 7-bit Address Detection/4-bit Address Detection

pub fn add(&mut self) -> ADD_W

Bits 24:31 - Address of the USART node

impl W<u32, Reg<u32, _CR3>>

pub fn wufie(&mut self) -> WUFIE_W

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&mut self) -> WUS_W

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn dep(&mut self) -> DEP_W

Bit 15 - Driver enable polarity selection

pub fn dem(&mut self) -> DEM_W

Bit 14 - Driver enable mode

pub fn ddre(&mut self) -> DDRE_W

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&mut self) -> OVRDIS_W

Bit 12 - Overrun Disable

pub fn ctsie(&mut self) -> CTSIE_W

Bit 10 - CTS interrupt enable

pub fn ctse(&mut self) -> CTSE_W

Bit 9 - CTS enable

pub fn rtse(&mut self) -> RTSE_W

Bit 8 - RTS enable

pub fn dmat(&mut self) -> DMAT_W

Bit 7 - DMA enable transmitter

pub fn dmar(&mut self) -> DMAR_W

Bit 6 - DMA enable receiver

pub fn hdsel(&mut self) -> HDSEL_W

Bit 3 - Half-duplex selection

pub fn eie(&mut self) -> EIE_W

Bit 0 - Error interrupt enable

impl W<u32, Reg<u32, _BRR>>

pub fn brr(&mut self) -> BRR_W

Bits 0:19 - BRR

impl W<u32, Reg<u32, _RQR>>

pub fn rxfrq(&mut self) -> RXFRQ_W

Bit 3 - Receive data flush request

pub fn mmrq(&mut self) -> MMRQ_W

Bit 2 - Mute mode request

pub fn sbkrq(&mut self) -> SBKRQ_W

Bit 1 - Send break request

impl W<u32, Reg<u32, _ICR>>

pub fn wucf(&mut self) -> WUCF_W

Bit 20 - Wakeup from Stop mode clear flag

pub fn cmcf(&mut self) -> CMCF_W

Bit 17 - Character match clear flag

pub fn ctscf(&mut self) -> CTSCF_W

Bit 9 - CTS clear flag

pub fn tccf(&mut self) -> TCCF_W

Bit 6 - Transmission complete clear flag

pub fn idlecf(&mut self) -> IDLECF_W

Bit 4 - Idle line detected clear flag

pub fn orecf(&mut self) -> ORECF_W

Bit 3 - Overrun error clear flag

pub fn ncf(&mut self) -> NCF_W

Bit 2 - Noise detected clear flag

pub fn fecf(&mut self) -> FECF_W

Bit 1 - Framing error clear flag

pub fn pecf(&mut self) -> PECF_W

Bit 0 - Parity error clear flag

impl W<u32, Reg<u32, _TDR>>

pub fn tdr(&mut self) -> TDR_W

Bits 0:8 - Transmit data value

impl W<u32, Reg<u32, _CR>>

pub fn dmaouten(&mut self) -> DMAOUTEN_W

Bit 12 - Enable DMA management of data output phase

pub fn dmainen(&mut self) -> DMAINEN_W

Bit 11 - Enable DMA management of data input phase

pub fn errie(&mut self) -> ERRIE_W

Bit 10 - Error interrupt enable

pub fn ccfie(&mut self) -> CCFIE_W

Bit 9 - CCF flag interrupt enable

pub fn errc(&mut self) -> ERRC_W

Bit 8 - Error clear

pub fn ccfc(&mut self) -> CCFC_W

Bit 7 - Computation Complete Flag Clear

pub fn chmod(&mut self) -> CHMOD_W

Bits 5:6 - AES chaining mode

pub fn mode(&mut self) -> MODE_W

Bits 3:4 - AES operating mode

pub fn datatype(&mut self) -> DATATYPE_W

Bits 1:2 - Data type selection (for data in and data out to/from the cryptographic block)

pub fn en(&mut self) -> EN_W

Bit 0 - AES enable

impl W<u32, Reg<u32, _DINR>>

pub fn din(&mut self) -> DIN_W

Bits 0:31 - Data Input Register.

impl W<u32, Reg<u32, _KEYR0>>

pub fn key0(&mut self) -> KEY0_W

Bits 0:31 - Data Output Register (LSB key [31:0])

impl W<u32, Reg<u32, _KEYR1>>

pub fn key1(&mut self) -> KEY1_W

Bits 0:31 - AES key register (key [63:32])

impl W<u32, Reg<u32, _KEYR2>>

pub fn key2(&mut self) -> KEY2_W

Bits 0:31 - AES key register (key [95:64])

impl W<u32, Reg<u32, _KEYR3>>

pub fn key3(&mut self) -> KEY3_W

Bits 0:31 - AES key register (MSB key [127:96])

impl W<u32, Reg<u32, _IVR0>>

pub fn iv0(&mut self) -> IV0_W

Bits 0:31 - initialization vector register (LSB IVR [31:0])

impl W<u32, Reg<u32, _IVR1>>

pub fn iv1(&mut self) -> IV1_W

Bits 0:31 - Initialization Vector Register (IVR [63:32])

impl W<u32, Reg<u32, _IVR2>>

pub fn iv2(&mut self) -> IV2_W

Bits 0:31 - Initialization Vector Register (IVR [95:64])

impl W<u32, Reg<u32, _IVR3>>

pub fn iv3(&mut self) -> IV3_W

Bits 0:31 - Initialization Vector Register (MSB IVR [127:96])

impl W<u32, Reg<u32, _CR>>

pub fn dmaudrie1(&mut self) -> DMAUDRIE1_W

Bit 13 - DAC channel1 DMA Underrun Interrupt enable

pub fn dmaen1(&mut self) -> DMAEN1_W

Bit 12 - DAC channel1 DMA enable

pub fn mamp1(&mut self) -> MAMP1_W

Bits 8:11 - DAC channel1 mask/amplitude selector

pub fn wave1(&mut self) -> WAVE1_W

Bits 6:7 - DAC channel1 noise/triangle wave generation enable

pub fn tsel1(&mut self) -> TSEL1_W

Bits 3:5 - DAC channel1 trigger selection

pub fn ten1(&mut self) -> TEN1_W

Bit 2 - DAC channel1 trigger enable

pub fn boff1(&mut self) -> BOFF1_W

Bit 1 - DAC channel1 output buffer disable

pub fn en1(&mut self) -> EN1_W

Bit 0 - DAC channel1 enable

impl W<u32, Reg<u32, _SWTRIGR>>

pub fn swtrig1(&mut self) -> SWTRIG1_W

Bit 0 - DAC channel1 software trigger

impl W<u32, Reg<u32, _DHR12R1>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 0:11 - DAC channel1 12-bit right-aligned data

impl W<u32, Reg<u32, _DHR12L1>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 4:15 - DAC channel1 12-bit left-aligned data

impl W<u32, Reg<u32, _DHR8R1>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 0:7 - DAC channel1 8-bit right-aligned data

impl W<u32, Reg<u32, _SR>>

pub fn dmaudr1(&mut self) -> DMAUDR1_W

Bit 13 - DAC channel1 DMA underrun flag

impl W<u32, Reg<u32, _DHR12R2>>

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 0:11 - DAC channel2 12-bit right-aligned data

impl W<u32, Reg<u32, _DHR12L2>>

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 4:15 - DAC channel2 12-bit left-aligned data

impl W<u32, Reg<u32, _DHR8R2>>

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 0:7 - DAC channel2 8-bit right-aligned data

impl W<u32, Reg<u32, _DHR12RD>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 0:11 - DAC channel1 12-bit right-aligned data

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 16:27 - DAC channel2 12-bit right-aligned data

impl W<u32, Reg<u32, _DHR12LD>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 4:15 - DAC channel1 12-bit left-aligned data

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 20:31 - DAC channel2 12-bit left-aligned data

impl W<u32, Reg<u32, _DHR8RD>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 0:7 - DAC channel1 8-bit right-aligned data

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 8:15 - DAC channel2 8-bit right-aligned data

impl W<u32, Reg<u32, _CR>>

pub fn mem2mem(&mut self) -> MEM2MEM_W

Bit 14 - Memory to memory mode

pub fn pl(&mut self) -> PL_W

Bits 12:13 - Channel priority level

pub fn msize(&mut self) -> MSIZE_W

Bits 10:11 - Memory size

pub fn psize(&mut self) -> PSIZE_W

Bits 8:9 - Peripheral size

pub fn minc(&mut self) -> MINC_W

Bit 7 - Memory increment mode

pub fn pinc(&mut self) -> PINC_W

Bit 6 - Peripheral increment mode

pub fn circ(&mut self) -> CIRC_W

Bit 5 - Circular mode

pub fn dir(&mut self) -> DIR_W

Bit 4 - Data transfer direction

pub fn teie(&mut self) -> TEIE_W

Bit 3 - Transfer error interrupt enable

pub fn htie(&mut self) -> HTIE_W

Bit 2 - Half transfer interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 1 - Transfer complete interrupt enable

pub fn en(&mut self) -> EN_W

Bit 0 - Channel enable

impl W<u32, Reg<u32, _NDTR>>

pub fn ndt(&mut self) -> NDT_W

Bits 0:15 - Number of data to transfer

impl W<u32, Reg<u32, _PAR>>

pub fn pa(&mut self) -> PA_W

Bits 0:31 - Peripheral address

impl W<u32, Reg<u32, _MAR>>

pub fn ma(&mut self) -> MA_W

Bits 0:31 - Memory address

impl W<u32, Reg<u32, _IFCR>>

pub fn cteif7(&mut self) -> CTEIF7_W

Bit 27 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif7(&mut self) -> CHTIF7_W

Bit 26 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif7(&mut self) -> CTCIF7_W

Bit 25 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif7(&mut self) -> CGIF7_W

Bit 24 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif6(&mut self) -> CTEIF6_W

Bit 23 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif6(&mut self) -> CHTIF6_W

Bit 22 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif6(&mut self) -> CTCIF6_W

Bit 21 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif6(&mut self) -> CGIF6_W

Bit 20 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif5(&mut self) -> CTEIF5_W

Bit 19 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif5(&mut self) -> CHTIF5_W

Bit 18 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif5(&mut self) -> CTCIF5_W

Bit 17 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif5(&mut self) -> CGIF5_W

Bit 16 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif4(&mut self) -> CTEIF4_W

Bit 15 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif4(&mut self) -> CHTIF4_W

Bit 14 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif4(&mut self) -> CTCIF4_W

Bit 13 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif4(&mut self) -> CGIF4_W

Bit 12 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif3(&mut self) -> CTEIF3_W

Bit 11 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif3(&mut self) -> CHTIF3_W

Bit 10 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif3(&mut self) -> CTCIF3_W

Bit 9 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif3(&mut self) -> CGIF3_W

Bit 8 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif2(&mut self) -> CTEIF2_W

Bit 7 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif2(&mut self) -> CHTIF2_W

Bit 6 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif2(&mut self) -> CTCIF2_W

Bit 5 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif2(&mut self) -> CGIF2_W

Bit 4 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif1(&mut self) -> CTEIF1_W

Bit 3 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif1(&mut self) -> CHTIF1_W

Bit 2 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif1(&mut self) -> CTCIF1_W

Bit 1 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif1(&mut self) -> CGIF1_W

Bit 0 - Channel x global interrupt clear (x = 1 ..7)

impl W<u32, Reg<u32, _CSELR>>

pub fn c7s(&mut self) -> C7S_W

Bits 24:27 - DMA channel 7 selection

pub fn c6s(&mut self) -> C6S_W

Bits 20:23 - DMA channel 6 selection

pub fn c5s(&mut self) -> C5S_W

Bits 16:19 - DMA channel 5 selection

pub fn c4s(&mut self) -> C4S_W

Bits 12:15 - DMA channel 4 selection

pub fn c3s(&mut self) -> C3S_W

Bits 8:11 - DMA channel 3 selection

pub fn c2s(&mut self) -> C2S_W

Bits 4:7 - DMA channel 2 selection

pub fn c1s(&mut self) -> C1S_W

Bits 0:3 - DMA channel 1 selection

impl W<u32, Reg<u32, _DR>>

pub fn dr(&mut self) -> DR_W

Bits 0:31 - Data register bits

impl W<u32, Reg<u32, _IDR>>

pub fn idr(&mut self) -> IDR_W

Bits 0:7 - General-purpose 8-bit data register bits

impl W<u32, Reg<u32, _CR>>

pub fn rev_out(&mut self) -> REV_OUT_W

Bit 7 - Reverse output data

pub fn rev_in(&mut self) -> REV_IN_W

Bits 5:6 - Reverse input data

pub fn polysize(&mut self) -> POLYSIZE_W

Bits 3:4 - Polynomial size

pub fn reset(&mut self) -> RESET_W

Bit 0 - RESET bit

impl W<u32, Reg<u32, _INIT>>

pub fn crc_init(&mut self) -> CRC_INIT_W

Bits 0:31 - Programmable initial CRC value

impl W<u32, Reg<u32, _POL>>

pub fn pol(&mut self) -> POL_W

Bits 0:31 - Programmable polynomial

impl W<u32, Reg<u32, _MODER>>

pub fn mode0(&mut self) -> MODE0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

pub fn mode1(&mut self) -> MODE1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn mode2(&mut self) -> MODE2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn mode3(&mut self) -> MODE3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn mode4(&mut self) -> MODE4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn mode5(&mut self) -> MODE5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn mode6(&mut self) -> MODE6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn mode7(&mut self) -> MODE7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn mode8(&mut self) -> MODE8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn mode9(&mut self) -> MODE9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn mode10(&mut self) -> MODE10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn mode11(&mut self) -> MODE11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn mode12(&mut self) -> MODE12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn mode13(&mut self) -> MODE13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn mode14(&mut self) -> MODE14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn mode15(&mut self) -> MODE15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OTYPER>>

pub fn ot15(&mut self) -> OT15_W

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&mut self) -> OT14_W

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&mut self) -> OT13_W

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&mut self) -> OT12_W

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&mut self) -> OT11_W

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&mut self) -> OT10_W

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&mut self) -> OT9_W

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&mut self) -> OT8_W

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&mut self) -> OT7_W

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&mut self) -> OT6_W

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&mut self) -> OT5_W

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&mut self) -> OT4_W

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&mut self) -> OT3_W

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&mut self) -> OT2_W

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&mut self) -> OT1_W

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&mut self) -> OT0_W

Bit 0 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OSPEEDR>>

pub fn ospeed15(&mut self) -> OSPEED15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeed14(&mut self) -> OSPEED14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeed13(&mut self) -> OSPEED13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeed12(&mut self) -> OSPEED12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeed11(&mut self) -> OSPEED11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeed10(&mut self) -> OSPEED10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeed9(&mut self) -> OSPEED9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeed8(&mut self) -> OSPEED8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeed7(&mut self) -> OSPEED7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeed6(&mut self) -> OSPEED6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeed5(&mut self) -> OSPEED5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeed4(&mut self) -> OSPEED4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeed3(&mut self) -> OSPEED3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeed2(&mut self) -> OSPEED2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeed1(&mut self) -> OSPEED1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeed0(&mut self) -> OSPEED0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _PUPDR>>

pub fn pupd15(&mut self) -> PUPD15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupd14(&mut self) -> PUPD14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupd13(&mut self) -> PUPD13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupd12(&mut self) -> PUPD12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupd11(&mut self) -> PUPD11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupd10(&mut self) -> PUPD10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupd9(&mut self) -> PUPD9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupd8(&mut self) -> PUPD8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupd7(&mut self) -> PUPD7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupd6(&mut self) -> PUPD6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupd5(&mut self) -> PUPD5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupd4(&mut self) -> PUPD4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupd3(&mut self) -> PUPD3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupd2(&mut self) -> PUPD2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupd1(&mut self) -> PUPD1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupd0(&mut self) -> PUPD0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _ODR>>

pub fn od15(&mut self) -> OD15_W

Bit 15 - Port output data bit (y = 0..15)

pub fn od14(&mut self) -> OD14_W

Bit 14 - Port output data bit (y = 0..15)

pub fn od13(&mut self) -> OD13_W

Bit 13 - Port output data bit (y = 0..15)

pub fn od12(&mut self) -> OD12_W

Bit 12 - Port output data bit (y = 0..15)

pub fn od11(&mut self) -> OD11_W

Bit 11 - Port output data bit (y = 0..15)

pub fn od10(&mut self) -> OD10_W

Bit 10 - Port output data bit (y = 0..15)

pub fn od9(&mut self) -> OD9_W

Bit 9 - Port output data bit (y = 0..15)

pub fn od8(&mut self) -> OD8_W

Bit 8 - Port output data bit (y = 0..15)

pub fn od7(&mut self) -> OD7_W

Bit 7 - Port output data bit (y = 0..15)

pub fn od6(&mut self) -> OD6_W

Bit 6 - Port output data bit (y = 0..15)

pub fn od5(&mut self) -> OD5_W

Bit 5 - Port output data bit (y = 0..15)

pub fn od4(&mut self) -> OD4_W

Bit 4 - Port output data bit (y = 0..15)

pub fn od3(&mut self) -> OD3_W

Bit 3 - Port output data bit (y = 0..15)

pub fn od2(&mut self) -> OD2_W

Bit 2 - Port output data bit (y = 0..15)

pub fn od1(&mut self) -> OD1_W

Bit 1 - Port output data bit (y = 0..15)

pub fn od0(&mut self) -> OD0_W

Bit 0 - Port output data bit (y = 0..15)

impl W<u32, Reg<u32, _BSRR>>

pub fn br15(&mut self) -> BR15_W

Bit 31 - Port x reset bit y (y = 0..15)

pub fn br14(&mut self) -> BR14_W

Bit 30 - Port x reset bit y (y = 0..15)

pub fn br13(&mut self) -> BR13_W

Bit 29 - Port x reset bit y (y = 0..15)

pub fn br12(&mut self) -> BR12_W

Bit 28 - Port x reset bit y (y = 0..15)

pub fn br11(&mut self) -> BR11_W

Bit 27 - Port x reset bit y (y = 0..15)

pub fn br10(&mut self) -> BR10_W

Bit 26 - Port x reset bit y (y = 0..15)

pub fn br9(&mut self) -> BR9_W

Bit 25 - Port x reset bit y (y = 0..15)

pub fn br8(&mut self) -> BR8_W

Bit 24 - Port x reset bit y (y = 0..15)

pub fn br7(&mut self) -> BR7_W

Bit 23 - Port x reset bit y (y = 0..15)

pub fn br6(&mut self) -> BR6_W

Bit 22 - Port x reset bit y (y = 0..15)

pub fn br5(&mut self) -> BR5_W

Bit 21 - Port x reset bit y (y = 0..15)

pub fn br4(&mut self) -> BR4_W

Bit 20 - Port x reset bit y (y = 0..15)

pub fn br3(&mut self) -> BR3_W

Bit 19 - Port x reset bit y (y = 0..15)

pub fn br2(&mut self) -> BR2_W

Bit 18 - Port x reset bit y (y = 0..15)

pub fn br1(&mut self) -> BR1_W

Bit 17 - Port x reset bit y (y = 0..15)

pub fn br0(&mut self) -> BR0_W

Bit 16 - Port x reset bit y (y = 0..15)

pub fn bs15(&mut self) -> BS15_W

Bit 15 - Port x set bit y (y= 0..15)

pub fn bs14(&mut self) -> BS14_W

Bit 14 - Port x set bit y (y= 0..15)

pub fn bs13(&mut self) -> BS13_W

Bit 13 - Port x set bit y (y= 0..15)

pub fn bs12(&mut self) -> BS12_W

Bit 12 - Port x set bit y (y= 0..15)

pub fn bs11(&mut self) -> BS11_W

Bit 11 - Port x set bit y (y= 0..15)

pub fn bs10(&mut self) -> BS10_W

Bit 10 - Port x set bit y (y= 0..15)

pub fn bs9(&mut self) -> BS9_W

Bit 9 - Port x set bit y (y= 0..15)

pub fn bs8(&mut self) -> BS8_W

Bit 8 - Port x set bit y (y= 0..15)

pub fn bs7(&mut self) -> BS7_W

Bit 7 - Port x set bit y (y= 0..15)

pub fn bs6(&mut self) -> BS6_W

Bit 6 - Port x set bit y (y= 0..15)

pub fn bs5(&mut self) -> BS5_W

Bit 5 - Port x set bit y (y= 0..15)

pub fn bs4(&mut self) -> BS4_W

Bit 4 - Port x set bit y (y= 0..15)

pub fn bs3(&mut self) -> BS3_W

Bit 3 - Port x set bit y (y= 0..15)

pub fn bs2(&mut self) -> BS2_W

Bit 2 - Port x set bit y (y= 0..15)

pub fn bs1(&mut self) -> BS1_W

Bit 1 - Port x set bit y (y= 0..15)

pub fn bs0(&mut self) -> BS0_W

Bit 0 - Port x set bit y (y= 0..15)

impl W<u32, Reg<u32, _LCKR>>

pub fn lckk(&mut self) -> LCKK_W

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&mut self) -> LCK15_W

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&mut self) -> LCK14_W

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&mut self) -> LCK13_W

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&mut self) -> LCK12_W

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&mut self) -> LCK11_W

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&mut self) -> LCK10_W

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&mut self) -> LCK9_W

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&mut self) -> LCK8_W

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&mut self) -> LCK7_W

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&mut self) -> LCK6_W

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&mut self) -> LCK5_W

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&mut self) -> LCK4_W

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&mut self) -> LCK3_W

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&mut self) -> LCK2_W

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&mut self) -> LCK1_W

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&mut self) -> LCK0_W

Bit 0 - Port x lock bit y (y= 0..15)

impl W<u32, Reg<u32, _AFRL>>

pub fn afsel7(&mut self) -> AFSEL7_W

Bits 28:31 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel6(&mut self) -> AFSEL6_W

Bits 24:27 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel5(&mut self) -> AFSEL5_W

Bits 20:23 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel4(&mut self) -> AFSEL4_W

Bits 16:19 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel3(&mut self) -> AFSEL3_W

Bits 12:15 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel2(&mut self) -> AFSEL2_W

Bits 8:11 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel1(&mut self) -> AFSEL1_W

Bits 4:7 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel0(&mut self) -> AFSEL0_W

Bits 0:3 - Alternate function selection for port x pin y (y = 0..7)

impl W<u32, Reg<u32, _AFRH>>

pub fn afsel15(&mut self) -> AFSEL15_W

Bits 28:31 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel14(&mut self) -> AFSEL14_W

Bits 24:27 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel13(&mut self) -> AFSEL13_W

Bits 20:23 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel12(&mut self) -> AFSEL12_W

Bits 16:19 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel11(&mut self) -> AFSEL11_W

Bits 12:15 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel10(&mut self) -> AFSEL10_W

Bits 8:11 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel9(&mut self) -> AFSEL9_W

Bits 4:7 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel8(&mut self) -> AFSEL8_W

Bits 0:3 - Alternate function selection for port x pin y (y = 8..15)

impl W<u32, Reg<u32, _BRR>>

pub fn br15(&mut self) -> BR15_W

Bit 15 - Port x Reset bit y (y= 0 .. 15)

pub fn br14(&mut self) -> BR14_W

Bit 14 - Port x Reset bit y (y= 0 .. 15)

pub fn br13(&mut self) -> BR13_W

Bit 13 - Port x Reset bit y (y= 0 .. 15)

pub fn br12(&mut self) -> BR12_W

Bit 12 - Port x Reset bit y (y= 0 .. 15)

pub fn br11(&mut self) -> BR11_W

Bit 11 - Port x Reset bit y (y= 0 .. 15)

pub fn br10(&mut self) -> BR10_W

Bit 10 - Port x Reset bit y (y= 0 .. 15)

pub fn br9(&mut self) -> BR9_W

Bit 9 - Port x Reset bit y (y= 0 .. 15)

pub fn br8(&mut self) -> BR8_W

Bit 8 - Port x Reset bit y (y= 0 .. 15)

pub fn br7(&mut self) -> BR7_W

Bit 7 - Port x Reset bit y (y= 0 .. 15)

pub fn br6(&mut self) -> BR6_W

Bit 6 - Port x Reset bit y (y= 0 .. 15)

pub fn br5(&mut self) -> BR5_W

Bit 5 - Port x Reset bit y (y= 0 .. 15)

pub fn br4(&mut self) -> BR4_W

Bit 4 - Port x Reset bit y (y= 0 .. 15)

pub fn br3(&mut self) -> BR3_W

Bit 3 - Port x Reset bit y (y= 0 .. 15)

pub fn br2(&mut self) -> BR2_W

Bit 2 - Port x Reset bit y (y= 0 .. 15)

pub fn br1(&mut self) -> BR1_W

Bit 1 - Port x Reset bit y (y= 0 .. 15)

pub fn br0(&mut self) -> BR0_W

Bit 0 - Port x Reset bit y (y= 0 .. 15)

impl W<u32, Reg<u32, _MODER>>

pub fn mode15(&mut self) -> MODE15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn mode14(&mut self) -> MODE14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn mode13(&mut self) -> MODE13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn mode12(&mut self) -> MODE12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn mode11(&mut self) -> MODE11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn mode10(&mut self) -> MODE10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn mode9(&mut self) -> MODE9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn mode8(&mut self) -> MODE8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn mode7(&mut self) -> MODE7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn mode6(&mut self) -> MODE6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn mode5(&mut self) -> MODE5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn mode4(&mut self) -> MODE4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn mode3(&mut self) -> MODE3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn mode2(&mut self) -> MODE2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn mode1(&mut self) -> MODE1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn mode0(&mut self) -> MODE0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OTYPER>>

pub fn ot15(&mut self) -> OT15_W

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&mut self) -> OT14_W

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&mut self) -> OT13_W

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&mut self) -> OT12_W

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&mut self) -> OT11_W

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&mut self) -> OT10_W

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&mut self) -> OT9_W

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&mut self) -> OT8_W

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&mut self) -> OT7_W

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&mut self) -> OT6_W

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&mut self) -> OT5_W

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&mut self) -> OT4_W

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&mut self) -> OT3_W

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&mut self) -> OT2_W

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&mut self) -> OT1_W

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&mut self) -> OT0_W

Bit 0 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OSPEEDR>>

pub fn ospeed15(&mut self) -> OSPEED15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeed14(&mut self) -> OSPEED14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeed13(&mut self) -> OSPEED13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeed12(&mut self) -> OSPEED12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeed11(&mut self) -> OSPEED11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeed10(&mut self) -> OSPEED10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeed9(&mut self) -> OSPEED9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeed8(&mut self) -> OSPEED8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeed7(&mut self) -> OSPEED7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeed6(&mut self) -> OSPEED6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeed5(&mut self) -> OSPEED5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeed4(&mut self) -> OSPEED4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeed3(&mut self) -> OSPEED3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeed2(&mut self) -> OSPEED2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeed1(&mut self) -> OSPEED1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeed0(&mut self) -> OSPEED0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _PUPDR>>

pub fn pupd15(&mut self) -> PUPD15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupd14(&mut self) -> PUPD14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupd13(&mut self) -> PUPD13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupd12(&mut self) -> PUPD12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupd11(&mut self) -> PUPD11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupd10(&mut self) -> PUPD10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupd9(&mut self) -> PUPD9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupd8(&mut self) -> PUPD8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupd7(&mut self) -> PUPD7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupd6(&mut self) -> PUPD6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupd5(&mut self) -> PUPD5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupd4(&mut self) -> PUPD4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupd3(&mut self) -> PUPD3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupd2(&mut self) -> PUPD2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupd1(&mut self) -> PUPD1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupd0(&mut self) -> PUPD0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _ODR>>

pub fn od15(&mut self) -> OD15_W

Bit 15 - Port output data bit (y = 0..15)

pub fn od14(&mut self) -> OD14_W

Bit 14 - Port output data bit (y = 0..15)

pub fn od13(&mut self) -> OD13_W

Bit 13 - Port output data bit (y = 0..15)

pub fn od12(&mut self) -> OD12_W

Bit 12 - Port output data bit (y = 0..15)

pub fn od11(&mut self) -> OD11_W

Bit 11 - Port output data bit (y = 0..15)

pub fn od10(&mut self) -> OD10_W

Bit 10 - Port output data bit (y = 0..15)

pub fn od9(&mut self) -> OD9_W

Bit 9 - Port output data bit (y = 0..15)

pub fn od8(&mut self) -> OD8_W

Bit 8 - Port output data bit (y = 0..15)

pub fn od7(&mut self) -> OD7_W

Bit 7 - Port output data bit (y = 0..15)

pub fn od6(&mut self) -> OD6_W

Bit 6 - Port output data bit (y = 0..15)

pub fn od5(&mut self) -> OD5_W

Bit 5 - Port output data bit (y = 0..15)

pub fn od4(&mut self) -> OD4_W

Bit 4 - Port output data bit (y = 0..15)

pub fn od3(&mut self) -> OD3_W

Bit 3 - Port output data bit (y = 0..15)

pub fn od2(&mut self) -> OD2_W

Bit 2 - Port output data bit (y = 0..15)

pub fn od1(&mut self) -> OD1_W

Bit 1 - Port output data bit (y = 0..15)

pub fn od0(&mut self) -> OD0_W

Bit 0 - Port output data bit (y = 0..15)

impl W<u32, Reg<u32, _BSRR>>

pub fn br15(&mut self) -> BR15_W

Bit 31 - Port x reset bit y (y = 0..15)

pub fn br14(&mut self) -> BR14_W

Bit 30 - Port x reset bit y (y = 0..15)

pub fn br13(&mut self) -> BR13_W

Bit 29 - Port x reset bit y (y = 0..15)

pub fn br12(&mut self) -> BR12_W

Bit 28 - Port x reset bit y (y = 0..15)

pub fn br11(&mut self) -> BR11_W

Bit 27 - Port x reset bit y (y = 0..15)

pub fn br10(&mut self) -> BR10_W

Bit 26 - Port x reset bit y (y = 0..15)

pub fn br9(&mut self) -> BR9_W

Bit 25 - Port x reset bit y (y = 0..15)

pub fn br8(&mut self) -> BR8_W

Bit 24 - Port x reset bit y (y = 0..15)

pub fn br7(&mut self) -> BR7_W

Bit 23 - Port x reset bit y (y = 0..15)

pub fn br6(&mut self) -> BR6_W

Bit 22 - Port x reset bit y (y = 0..15)

pub fn br5(&mut self) -> BR5_W

Bit 21 - Port x reset bit y (y = 0..15)

pub fn br4(&mut self) -> BR4_W

Bit 20 - Port x reset bit y (y = 0..15)

pub fn br3(&mut self) -> BR3_W

Bit 19 - Port x reset bit y (y = 0..15)

pub fn br2(&mut self) -> BR2_W

Bit 18 - Port x reset bit y (y = 0..15)

pub fn br1(&mut self) -> BR1_W

Bit 17 - Port x reset bit y (y = 0..15)

pub fn br0(&mut self) -> BR0_W

Bit 16 - Port x reset bit y (y = 0..15)

pub fn bs15(&mut self) -> BS15_W

Bit 15 - Port x set bit y (y= 0..15)

pub fn bs14(&mut self) -> BS14_W

Bit 14 - Port x set bit y (y= 0..15)

pub fn bs13(&mut self) -> BS13_W

Bit 13 - Port x set bit y (y= 0..15)

pub fn bs12(&mut self) -> BS12_W

Bit 12 - Port x set bit y (y= 0..15)

pub fn bs11(&mut self) -> BS11_W

Bit 11 - Port x set bit y (y= 0..15)

pub fn bs10(&mut self) -> BS10_W

Bit 10 - Port x set bit y (y= 0..15)

pub fn bs9(&mut self) -> BS9_W

Bit 9 - Port x set bit y (y= 0..15)

pub fn bs8(&mut self) -> BS8_W

Bit 8 - Port x set bit y (y= 0..15)

pub fn bs7(&mut self) -> BS7_W

Bit 7 - Port x set bit y (y= 0..15)

pub fn bs6(&mut self) -> BS6_W

Bit 6 - Port x set bit y (y= 0..15)

pub fn bs5(&mut self) -> BS5_W

Bit 5 - Port x set bit y (y= 0..15)

pub fn bs4(&mut self) -> BS4_W

Bit 4 - Port x set bit y (y= 0..15)

pub fn bs3(&mut self) -> BS3_W

Bit 3 - Port x set bit y (y= 0..15)

pub fn bs2(&mut self) -> BS2_W

Bit 2 - Port x set bit y (y= 0..15)

pub fn bs1(&mut self) -> BS1_W

Bit 1 - Port x set bit y (y= 0..15)

pub fn bs0(&mut self) -> BS0_W

Bit 0 - Port x set bit y (y= 0..15)

impl W<u32, Reg<u32, _LCKR>>

pub fn lckk(&mut self) -> LCKK_W

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&mut self) -> LCK15_W

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&mut self) -> LCK14_W

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&mut self) -> LCK13_W

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&mut self) -> LCK12_W

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&mut self) -> LCK11_W

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&mut self) -> LCK10_W

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&mut self) -> LCK9_W

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&mut self) -> LCK8_W

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&mut self) -> LCK7_W

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&mut self) -> LCK6_W

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&mut self) -> LCK5_W

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&mut self) -> LCK4_W

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&mut self) -> LCK3_W

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&mut self) -> LCK2_W

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&mut self) -> LCK1_W

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&mut self) -> LCK0_W

Bit 0 - Port x lock bit y (y= 0..15)

impl W<u32, Reg<u32, _AFRL>>

pub fn afsel7(&mut self) -> AFSEL7_W

Bits 28:31 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel6(&mut self) -> AFSEL6_W

Bits 24:27 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel5(&mut self) -> AFSEL5_W

Bits 20:23 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel4(&mut self) -> AFSEL4_W

Bits 16:19 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel3(&mut self) -> AFSEL3_W

Bits 12:15 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel2(&mut self) -> AFSEL2_W

Bits 8:11 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel1(&mut self) -> AFSEL1_W

Bits 4:7 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel0(&mut self) -> AFSEL0_W

Bits 0:3 - Alternate function selection for port x pin y (y = 0..7)

impl W<u32, Reg<u32, _AFRH>>

pub fn afsel15(&mut self) -> AFSEL15_W

Bits 28:31 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel14(&mut self) -> AFSEL14_W

Bits 24:27 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel13(&mut self) -> AFSEL13_W

Bits 20:23 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel12(&mut self) -> AFSEL12_W

Bits 16:19 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel11(&mut self) -> AFSEL11_W

Bits 12:15 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel10(&mut self) -> AFSEL10_W

Bits 8:11 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel9(&mut self) -> AFSEL9_W

Bits 4:7 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel8(&mut self) -> AFSEL8_W

Bits 0:3 - Alternate function selection for port x pin y (y = 8..15)

impl W<u32, Reg<u32, _BRR>>

pub fn br15(&mut self) -> BR15_W

Bit 15 - Port x Reset bit y (y= 0 .. 15)

pub fn br14(&mut self) -> BR14_W

Bit 14 - Port x Reset bit y (y= 0 .. 15)

pub fn br13(&mut self) -> BR13_W

Bit 13 - Port x Reset bit y (y= 0 .. 15)

pub fn br12(&mut self) -> BR12_W

Bit 12 - Port x Reset bit y (y= 0 .. 15)

pub fn br11(&mut self) -> BR11_W

Bit 11 - Port x Reset bit y (y= 0 .. 15)

pub fn br10(&mut self) -> BR10_W

Bit 10 - Port x Reset bit y (y= 0 .. 15)

pub fn br9(&mut self) -> BR9_W

Bit 9 - Port x Reset bit y (y= 0 .. 15)

pub fn br8(&mut self) -> BR8_W

Bit 8 - Port x Reset bit y (y= 0 .. 15)

pub fn br7(&mut self) -> BR7_W

Bit 7 - Port x Reset bit y (y= 0 .. 15)

pub fn br6(&mut self) -> BR6_W

Bit 6 - Port x Reset bit y (y= 0 .. 15)

pub fn br5(&mut self) -> BR5_W

Bit 5 - Port x Reset bit y (y= 0 .. 15)

pub fn br4(&mut self) -> BR4_W

Bit 4 - Port x Reset bit y (y= 0 .. 15)

pub fn br3(&mut self) -> BR3_W

Bit 3 - Port x Reset bit y (y= 0 .. 15)

pub fn br2(&mut self) -> BR2_W

Bit 2 - Port x Reset bit y (y= 0 .. 15)

pub fn br1(&mut self) -> BR1_W

Bit 1 - Port x Reset bit y (y= 0 .. 15)

pub fn br0(&mut self) -> BR0_W

Bit 0 - Port x Reset bit y (y= 0 .. 15)

impl W<u32, Reg<u32, _ICR>>

pub fn downcf(&mut self) -> DOWNCF_W

Bit 6 - Direction change to down Clear Flag

pub fn upcf(&mut self) -> UPCF_W

Bit 5 - Direction change to UP Clear Flag

pub fn arrokcf(&mut self) -> ARROKCF_W

Bit 4 - Autoreload register update OK Clear Flag

pub fn cmpokcf(&mut self) -> CMPOKCF_W

Bit 3 - Compare register update OK Clear Flag

pub fn exttrigcf(&mut self) -> EXTTRIGCF_W

Bit 2 - External trigger valid edge Clear Flag

pub fn arrmcf(&mut self) -> ARRMCF_W

Bit 1 - Autoreload match Clear Flag

pub fn cmpmcf(&mut self) -> CMPMCF_W

Bit 0 - compare match Clear Flag

impl W<u32, Reg<u32, _IER>>

pub fn downie(&mut self) -> DOWNIE_W

Bit 6 - Direction change to down Interrupt Enable

pub fn upie(&mut self) -> UPIE_W

Bit 5 - Direction change to UP Interrupt Enable

pub fn arrokie(&mut self) -> ARROKIE_W

Bit 4 - Autoreload register update OK Interrupt Enable

pub fn cmpokie(&mut self) -> CMPOKIE_W

Bit 3 - Compare register update OK Interrupt Enable

pub fn exttrigie(&mut self) -> EXTTRIGIE_W

Bit 2 - External trigger valid edge Interrupt Enable

pub fn arrmie(&mut self) -> ARRMIE_W

Bit 1 - Autoreload match Interrupt Enable

pub fn cmpmie(&mut self) -> CMPMIE_W

Bit 0 - Compare match Interrupt Enable

impl W<u32, Reg<u32, _CFGR>>

pub fn enc(&mut self) -> ENC_W

Bit 24 - Encoder mode enable

pub fn countmode(&mut self) -> COUNTMODE_W

Bit 23 - counter mode enabled

pub fn preload(&mut self) -> PRELOAD_W

Bit 22 - Registers update mode

pub fn wavpol(&mut self) -> WAVPOL_W

Bit 21 - Waveform shape polarity

pub fn wave(&mut self) -> WAVE_W

Bit 20 - Waveform shape

pub fn timout(&mut self) -> TIMOUT_W

Bit 19 - Timeout enable

pub fn trigen(&mut self) -> TRIGEN_W

Bits 17:18 - Trigger enable and polarity

pub fn trigsel(&mut self) -> TRIGSEL_W

Bits 13:15 - Trigger selector

pub fn presc(&mut self) -> PRESC_W

Bits 9:11 - Clock prescaler

pub fn trgflt(&mut self) -> TRGFLT_W

Bits 6:7 - Configurable digital filter for trigger

pub fn ckflt(&mut self) -> CKFLT_W

Bits 3:4 - Configurable digital filter for external clock

pub fn ckpol(&mut self) -> CKPOL_W

Bits 1:2 - Clock Polarity

pub fn cksel(&mut self) -> CKSEL_W

Bit 0 - Clock selector

impl W<u32, Reg<u32, _CR>>

pub fn cntstrt(&mut self) -> CNTSTRT_W

Bit 2 - Timer start in continuous mode

pub fn sngstrt(&mut self) -> SNGSTRT_W

Bit 1 - LPTIM start in single mode

pub fn enable(&mut self) -> ENABLE_W

Bit 0 - LPTIM Enable

impl W<u32, Reg<u32, _CMP>>

pub fn cmp(&mut self) -> CMP_W

Bits 0:15 - Compare value.

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Auto reload value.

impl W<u32, Reg<u32, _CR>>

pub fn ie(&mut self) -> IE_W

Bit 3 - Interrupt enable

pub fn rngen(&mut self) -> RNGEN_W

Bit 2 - Random number generator enable

impl W<u32, Reg<u32, _SR>>

pub fn seis(&mut self) -> SEIS_W

Bit 6 - Seed error interrupt status

pub fn ceis(&mut self) -> CEIS_W

Bit 5 - Clock error interrupt status

impl W<u32, Reg<u32, _TR>>

pub fn pm(&mut self) -> PM_W

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W

Bits 20:21 - Hour tens in BCD format

pub fn hu(&mut self) -> HU_W

Bits 16:19 - Hour units in BCD format

pub fn mnt(&mut self) -> MNT_W

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&mut self) -> MNU_W

Bits 8:11 - Minute units in BCD format

pub fn st(&mut self) -> ST_W

Bits 4:6 - Second tens in BCD format

pub fn su(&mut self) -> SU_W

Bits 0:3 - Second units in BCD format

impl W<u32, Reg<u32, _DR>>

pub fn yt(&mut self) -> YT_W

Bits 20:23 - Year tens in BCD format

pub fn yu(&mut self) -> YU_W

Bits 16:19 - Year units in BCD format

pub fn wdu(&mut self) -> WDU_W

Bits 13:15 - Week day units

pub fn mt(&mut self) -> MT_W

Bit 12 - Month tens in BCD format

pub fn mu(&mut self) -> MU_W

Bits 8:11 - Month units in BCD format

pub fn dt(&mut self) -> DT_W

Bits 4:5 - Date tens in BCD format

pub fn du(&mut self) -> DU_W

Bits 0:3 - Date units in BCD format

impl W<u32, Reg<u32, _CR>>

pub fn coe(&mut self) -> COE_W

Bit 23 - Calibration output enable

pub fn osel(&mut self) -> OSEL_W

Bits 21:22 - Output selection

pub fn pol(&mut self) -> POL_W

Bit 20 - Output polarity

pub fn cosel(&mut self) -> COSEL_W

Bit 19 - Calibration output selection

pub fn bkp(&mut self) -> BKP_W

Bit 18 - Backup

pub fn sub1h(&mut self) -> SUB1H_W

Bit 17 - Subtract 1 hour (winter time change)

pub fn add1h(&mut self) -> ADD1H_W

Bit 16 - Add 1 hour (summer time change)

pub fn tsie(&mut self) -> TSIE_W

Bit 15 - Time-stamp interrupt enable

pub fn wutie(&mut self) -> WUTIE_W

Bit 14 - Wakeup timer interrupt enable

pub fn alrbie(&mut self) -> ALRBIE_W

Bit 13 - Alarm B interrupt enable

pub fn alraie(&mut self) -> ALRAIE_W

Bit 12 - Alarm A interrupt enable

pub fn tse(&mut self) -> TSE_W

Bit 11 - timestamp enable

pub fn wute(&mut self) -> WUTE_W

Bit 10 - Wakeup timer enable

pub fn alrbe(&mut self) -> ALRBE_W

Bit 9 - Alarm B enable

pub fn alrae(&mut self) -> ALRAE_W

Bit 8 - Alarm A enable

pub fn fmt(&mut self) -> FMT_W

Bit 6 - Hour format

pub fn bypshad(&mut self) -> BYPSHAD_W

Bit 5 - Bypass the shadow registers

pub fn refckon(&mut self) -> REFCKON_W

Bit 4 - RTC_REFIN reference clock detection enable (50 or 60 Hz)

pub fn tsedge(&mut self) -> TSEDGE_W

Bit 3 - Time-stamp event active edge

pub fn wucksel(&mut self) -> WUCKSEL_W

Bits 0:2 - Wakeup clock selection

impl W<u32, Reg<u32, _ISR>>

pub fn tamp2f(&mut self) -> TAMP2F_W

Bit 14 - RTC_TAMP2 detection flag

pub fn tamp1f(&mut self) -> TAMP1F_W

Bit 13 - RTC_TAMP1 detection flag

pub fn tsovf(&mut self) -> TSOVF_W

Bit 12 - Time-stamp overflow flag

pub fn tsf(&mut self) -> TSF_W

Bit 11 - Time-stamp flag

pub fn wutf(&mut self) -> WUTF_W

Bit 10 - Wakeup timer flag

pub fn alrbf(&mut self) -> ALRBF_W

Bit 9 - Alarm B flag

pub fn alraf(&mut self) -> ALRAF_W

Bit 8 - Alarm A flag

pub fn init(&mut self) -> INIT_W

Bit 7 - Initialization mode

pub fn rsf(&mut self) -> RSF_W

Bit 5 - Registers synchronization flag

pub fn recalpf(&mut self) -> RECALPF_W

Bit 16 - Recalibration pending flag

pub fn tamp3f(&mut self) -> TAMP3F_W

Bit 15 - RTC_TAMP3 detection flag

impl W<u32, Reg<u32, _PRER>>

pub fn prediv_a(&mut self) -> PREDIV_A_W

Bits 16:22 - Asynchronous prescaler factor

pub fn prediv_s(&mut self) -> PREDIV_S_W

Bits 0:15 - Synchronous prescaler factor

impl W<u32, Reg<u32, _WUTR>>

pub fn wut(&mut self) -> WUT_W

Bits 0:15 - Wakeup auto-reload value bits

impl W<u32, Reg<u32, _ALRMAR>>

pub fn msk4(&mut self) -> MSK4_W

Bit 31 - Alarm A date mask

pub fn wdsel(&mut self) -> WDSEL_W

Bit 30 - Week day selection

pub fn dt(&mut self) -> DT_W

Bits 28:29 - Date tens in BCD format.

pub fn du(&mut self) -> DU_W

Bits 24:27 - Date units or day in BCD format.

pub fn msk3(&mut self) -> MSK3_W

Bit 23 - Alarm A hours mask

pub fn pm(&mut self) -> PM_W

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W

Bits 20:21 - Hour tens in BCD format.

pub fn hu(&mut self) -> HU_W

Bits 16:19 - Hour units in BCD format.

pub fn msk2(&mut self) -> MSK2_W

Bit 15 - Alarm A minutes mask

pub fn mnt(&mut self) -> MNT_W

Bits 12:14 - Minute tens in BCD format.

pub fn mnu(&mut self) -> MNU_W

Bits 8:11 - Minute units in BCD format.

pub fn msk1(&mut self) -> MSK1_W

Bit 7 - Alarm A seconds mask

pub fn st(&mut self) -> ST_W

Bits 4:6 - Second tens in BCD format.

pub fn su(&mut self) -> SU_W

Bits 0:3 - Second units in BCD format.

impl W<u32, Reg<u32, _ALRMBR>>

pub fn msk4(&mut self) -> MSK4_W

Bit 31 - Alarm B date mask

pub fn wdsel(&mut self) -> WDSEL_W

Bit 30 - Week day selection

pub fn dt(&mut self) -> DT_W

Bits 28:29 - Date tens in BCD format

pub fn du(&mut self) -> DU_W

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&mut self) -> MSK3_W

Bit 23 - Alarm B hours mask

pub fn pm(&mut self) -> PM_W

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W

Bits 20:21 - Hour tens in BCD format

pub fn hu(&mut self) -> HU_W

Bits 16:19 - Hour units in BCD format

pub fn msk2(&mut self) -> MSK2_W

Bit 15 - Alarm B minutes mask

pub fn mnt(&mut self) -> MNT_W

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&mut self) -> MNU_W

Bits 8:11 - Minute units in BCD format

pub fn msk1(&mut self) -> MSK1_W

Bit 7 - Alarm B seconds mask

pub fn st(&mut self) -> ST_W

Bits 4:6 - Second tens in BCD format

pub fn su(&mut self) -> SU_W

Bits 0:3 - Second units in BCD format

impl W<u32, Reg<u32, _WPR>>

pub fn key(&mut self) -> KEY_W

Bits 0:7 - Write protection key

impl W<u32, Reg<u32, _SHIFTR>>

pub fn add1s(&mut self) -> ADD1S_W

Bit 31 - Add one second

pub fn subfs(&mut self) -> SUBFS_W

Bits 0:14 - Subtract a fraction of a second

impl W<u32, Reg<u32, _CALR>>

pub fn calp(&mut self) -> CALP_W

Bit 15 - Increase frequency of RTC by 488.5 ppm

pub fn calw8(&mut self) -> CALW8_W

Bit 14 - Use a 8-second calibration cycle period

pub fn calw16(&mut self) -> CALW16_W

Bit 13 - Use a 16-second calibration cycle period

pub fn calm(&mut self) -> CALM_W

Bits 0:8 - Calibration minus

impl W<u32, Reg<u32, _TAMPCR>>

pub fn tamp2mf(&mut self) -> TAMP2MF_W

Bit 21 - Tamper 2 mask flag

pub fn tamp2noerase(&mut self) -> TAMP2NOERASE_W

Bit 20 - Tamper 2 no erase

pub fn tamp2ie(&mut self) -> TAMP2IE_W

Bit 19 - Tamper 2 interrupt enable

pub fn tamp1mf(&mut self) -> TAMP1MF_W

Bit 18 - Tamper 1 mask flag

pub fn tamp1noerase(&mut self) -> TAMP1NOERASE_W

Bit 17 - Tamper 1 no erase

pub fn tamp1ie(&mut self) -> TAMP1IE_W

Bit 16 - Tamper 1 interrupt enable

pub fn tamppudis(&mut self) -> TAMPPUDIS_W

Bit 15 - RTC_TAMPx pull-up disable

pub fn tampprch(&mut self) -> TAMPPRCH_W

Bits 13:14 - RTC_TAMPx precharge duration

pub fn tampflt(&mut self) -> TAMPFLT_W

Bits 11:12 - RTC_TAMPx filter count

pub fn tampfreq(&mut self) -> TAMPFREQ_W

Bits 8:10 - Tamper sampling frequency

pub fn tampts(&mut self) -> TAMPTS_W

Bit 7 - Activate timestamp on tamper detection event

pub fn tamp2trg(&mut self) -> TAMP2TRG_W

Bit 4 - Active level for RTC_TAMP2 input

pub fn tamp2e(&mut self) -> TAMP2E_W

Bit 3 - RTC_TAMP2 input detection enable

pub fn tampie(&mut self) -> TAMPIE_W

Bit 2 - Tamper interrupt enable

pub fn tamp1trg(&mut self) -> TAMP1TRG_W

Bit 1 - Active level for RTC_TAMP1 input

pub fn tamp1e(&mut self) -> TAMP1E_W

Bit 0 - RTC_TAMP1 input detection enable

pub fn tamp3mf(&mut self) -> TAMP3MF_W

Bit 24 - Tamper 3 mask flag

pub fn tamp3noerase(&mut self) -> TAMP3NOERASE_W

Bit 23 - Tamper 3 no erase

pub fn tamp3ie(&mut self) -> TAMP3IE_W

Bit 22 - Tamper 3 interrupt enable

pub fn tamp3trg(&mut self) -> TAMP3TRG_W

Bit 6 - Active level for RTC_TAMP3 input

pub fn tamp3e(&mut self) -> TAMP3E_W

Bit 5 - RTC_TAMP3 detection enable

impl W<u32, Reg<u32, _ALRMASSR>>

pub fn maskss(&mut self) -> MASKSS_W

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&mut self) -> SS_W

Bits 0:14 - Sub seconds value

impl W<u32, Reg<u32, _ALRMBSSR>>

pub fn maskss(&mut self) -> MASKSS_W

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&mut self) -> SS_W

Bits 0:14 - Sub seconds value

impl W<u32, Reg<u32, _OR>>

pub fn rtc_out_rmp(&mut self) -> RTC_OUT_RMP_W

Bit 1 - RTC_ALARM on PC13 output type

pub fn rtc_alarm_type(&mut self) -> RTC_ALARM_TYPE_W

Bit 0 - RTC_ALARM on PC13 output type

impl W<u32, Reg<u32, _BKPR>>

pub fn bkp(&mut self) -> BKP_W

Bits 0:31 - BKP

impl W<u32, Reg<u32, _CR1>>

pub fn m1(&mut self) -> M1_W

Bit 28 - Word length

pub fn eobie(&mut self) -> EOBIE_W

Bit 27 - End of Block interrupt enable

pub fn rtoie(&mut self) -> RTOIE_W

Bit 26 - Receiver timeout interrupt enable

pub fn over8(&mut self) -> OVER8_W

Bit 15 - Oversampling mode

pub fn cmie(&mut self) -> CMIE_W

Bit 14 - Character match interrupt enable

pub fn mme(&mut self) -> MME_W

Bit 13 - Mute mode enable

pub fn m0(&mut self) -> M0_W

Bit 12 - Word length

pub fn wake(&mut self) -> WAKE_W

Bit 11 - Receiver wakeup method

pub fn pce(&mut self) -> PCE_W

Bit 10 - Parity control enable

pub fn ps(&mut self) -> PS_W

Bit 9 - Parity selection

pub fn peie(&mut self) -> PEIE_W

Bit 8 - PE interrupt enable

pub fn txeie(&mut self) -> TXEIE_W

Bit 7 - interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W

Bit 5 - RXNE interrupt enable

pub fn idleie(&mut self) -> IDLEIE_W

Bit 4 - IDLE interrupt enable

pub fn te(&mut self) -> TE_W

Bit 3 - Transmitter enable

pub fn re(&mut self) -> RE_W

Bit 2 - Receiver enable

pub fn uesm(&mut self) -> UESM_W

Bit 1 - USART enable in Stop mode

pub fn ue(&mut self) -> UE_W

Bit 0 - USART enable

pub fn deat(&mut self) -> DEAT_W

Bits 21:25 - Driver Enable assertion time

pub fn dedt(&mut self) -> DEDT_W

Bits 16:20 - Driver Enable de-assertion time

impl W<u32, Reg<u32, _CR2>>

pub fn rtoen(&mut self) -> RTOEN_W

Bit 23 - Receiver timeout enable

pub fn abren(&mut self) -> ABREN_W

Bit 20 - Auto baud rate enable

pub fn msbfirst(&mut self) -> MSBFIRST_W

Bit 19 - Most significant bit first

pub fn datainv(&mut self) -> DATAINV_W

Bit 18 - Binary data inversion

pub fn txinv(&mut self) -> TXINV_W

Bit 17 - TX pin active level inversion

pub fn rxinv(&mut self) -> RXINV_W

Bit 16 - RX pin active level inversion

pub fn swap(&mut self) -> SWAP_W

Bit 15 - Swap TX/RX pins

pub fn linen(&mut self) -> LINEN_W

Bit 14 - LIN mode enable

pub fn stop(&mut self) -> STOP_W

Bits 12:13 - STOP bits

pub fn clken(&mut self) -> CLKEN_W

Bit 11 - Clock enable

pub fn cpol(&mut self) -> CPOL_W

Bit 10 - Clock polarity

pub fn cpha(&mut self) -> CPHA_W

Bit 9 - Clock phase

pub fn lbcl(&mut self) -> LBCL_W

Bit 8 - Last bit clock pulse

pub fn lbdie(&mut self) -> LBDIE_W

Bit 6 - LIN break detection interrupt enable

pub fn lbdl(&mut self) -> LBDL_W

Bit 5 - LIN break detection length

pub fn addm7(&mut self) -> ADDM7_W

Bit 4 - 7-bit Address Detection/4-bit Address Detection

pub fn add(&mut self) -> ADD_W

Bits 24:31 - Address of the USART node

pub fn abrmod(&mut self) -> ABRMOD_W

Bits 21:22 - Auto baud rate mode

impl W<u32, Reg<u32, _CR3>>

pub fn wufie(&mut self) -> WUFIE_W

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&mut self) -> WUS_W

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn scarcnt(&mut self) -> SCARCNT_W

Bits 17:19 - Smartcard auto-retry count

pub fn dep(&mut self) -> DEP_W

Bit 15 - Driver enable polarity selection

pub fn dem(&mut self) -> DEM_W

Bit 14 - Driver enable mode

pub fn ddre(&mut self) -> DDRE_W

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&mut self) -> OVRDIS_W

Bit 12 - Overrun Disable

pub fn onebit(&mut self) -> ONEBIT_W

Bit 11 - One sample bit method enable

pub fn ctsie(&mut self) -> CTSIE_W

Bit 10 - CTS interrupt enable

pub fn ctse(&mut self) -> CTSE_W

Bit 9 - CTS enable

pub fn rtse(&mut self) -> RTSE_W

Bit 8 - RTS enable

pub fn dmat(&mut self) -> DMAT_W

Bit 7 - DMA enable transmitter

pub fn dmar(&mut self) -> DMAR_W

Bit 6 - DMA enable receiver

pub fn scen(&mut self) -> SCEN_W

Bit 5 - Smartcard mode enable

pub fn nack(&mut self) -> NACK_W

Bit 4 - Smartcard NACK enable

pub fn hdsel(&mut self) -> HDSEL_W

Bit 3 - Half-duplex selection

pub fn irlp(&mut self) -> IRLP_W

Bit 2 - Ir low-power

pub fn iren(&mut self) -> IREN_W

Bit 1 - Ir mode enable

pub fn eie(&mut self) -> EIE_W

Bit 0 - Error interrupt enable

impl W<u32, Reg<u32, _BRR>>

pub fn brr(&mut self) -> BRR_W

Bits 0:15 - DIV_Mantissa

impl W<u32, Reg<u32, _GTPR>>

pub fn gt(&mut self) -> GT_W

Bits 8:15 - Guard time value

pub fn psc(&mut self) -> PSC_W

Bits 0:7 - Prescaler value

impl W<u32, Reg<u32, _RTOR>>

pub fn blen(&mut self) -> BLEN_W

Bits 24:31 - Block Length

pub fn rto(&mut self) -> RTO_W

Bits 0:23 - Receiver timeout value

impl W<u32, Reg<u32, _RQR>>

pub fn txfrq(&mut self) -> TXFRQ_W

Bit 4 - Transmit data flush request

pub fn rxfrq(&mut self) -> RXFRQ_W

Bit 3 - Receive data flush request

pub fn mmrq(&mut self) -> MMRQ_W

Bit 2 - Mute mode request

pub fn sbkrq(&mut self) -> SBKRQ_W

Bit 1 - Send break request

pub fn abrrq(&mut self) -> ABRRQ_W

Bit 0 - Auto baud rate request

impl W<u32, Reg<u32, _ICR>>

pub fn wucf(&mut self) -> WUCF_W

Bit 20 - Wakeup from Stop mode clear flag

pub fn cmcf(&mut self) -> CMCF_W

Bit 17 - Character match clear flag

pub fn eobcf(&mut self) -> EOBCF_W

Bit 12 - End of block clear flag

pub fn rtocf(&mut self) -> RTOCF_W

Bit 11 - Receiver timeout clear flag

pub fn ctscf(&mut self) -> CTSCF_W

Bit 9 - CTS clear flag

pub fn lbdcf(&mut self) -> LBDCF_W

Bit 8 - LIN break detection clear flag

pub fn tccf(&mut self) -> TCCF_W

Bit 6 - Transmission complete clear flag

pub fn idlecf(&mut self) -> IDLECF_W

Bit 4 - Idle line detected clear flag

pub fn orecf(&mut self) -> ORECF_W

Bit 3 - Overrun error clear flag

pub fn ncf(&mut self) -> NCF_W

Bit 2 - Noise detected clear flag

pub fn fecf(&mut self) -> FECF_W

Bit 1 - Framing error clear flag

pub fn pecf(&mut self) -> PECF_W

Bit 0 - Parity error clear flag

impl W<u32, Reg<u32, _TDR>>

pub fn tdr(&mut self) -> TDR_W

Bits 0:8 - Transmit data value

impl W<u32, Reg<u32, _CR>>

pub fn ctph(&mut self) -> CTPH_W

Bits 28:31 - Charge transfer pulse high

pub fn ctpl(&mut self) -> CTPL_W

Bits 24:27 - Charge transfer pulse low

pub fn ssd(&mut self) -> SSD_W

Bits 17:23 - Spread spectrum deviation

pub fn sse(&mut self) -> SSE_W

Bit 16 - Spread spectrum enable

pub fn sspsc(&mut self) -> SSPSC_W

Bit 15 - Spread spectrum prescaler

pub fn pgpsc(&mut self) -> PGPSC_W

Bits 12:14 - pulse generator prescaler

pub fn mcv(&mut self) -> MCV_W

Bits 5:7 - Max count value

pub fn iodef(&mut self) -> IODEF_W

Bit 4 - I/O Default mode

pub fn syncpol(&mut self) -> SYNCPOL_W

Bit 3 - Synchronization pin polarity

pub fn am(&mut self) -> AM_W

Bit 2 - Acquisition mode

pub fn start(&mut self) -> START_W

Bit 1 - Start a new acquisition

pub fn tsce(&mut self) -> TSCE_W

Bit 0 - Touch sensing controller enable

impl W<u32, Reg<u32, _IER>>

pub fn mceie(&mut self) -> MCEIE_W

Bit 1 - Max count error interrupt enable

pub fn eoaie(&mut self) -> EOAIE_W

Bit 0 - End of acquisition interrupt enable

impl W<u32, Reg<u32, _ICR>>

pub fn mceic(&mut self) -> MCEIC_W

Bit 1 - Max count error interrupt clear

pub fn eoaic(&mut self) -> EOAIC_W

Bit 0 - End of acquisition interrupt clear

impl W<u32, Reg<u32, _ISR>>

pub fn mcef(&mut self) -> MCEF_W

Bit 1 - Max count error flag

pub fn eoaf(&mut self) -> EOAF_W

Bit 0 - End of acquisition flag

impl W<u32, Reg<u32, _IOHCR>>

pub fn g8_io4(&mut self) -> G8_IO4_W

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOASCR>>

pub fn g8_io4(&mut self) -> G8_IO4_W

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOSCR>>

pub fn g8_io4(&mut self) -> G8_IO4_W

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOCCR>>

pub fn g8_io4(&mut self) -> G8_IO4_W

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOGCSR>>

pub fn g8e(&mut self) -> G8E_W

Bit 7 - Analog I/O group x enable

pub fn g7e(&mut self) -> G7E_W

Bit 6 - Analog I/O group x enable

pub fn g6e(&mut self) -> G6E_W

Bit 5 - Analog I/O group x enable

pub fn g5e(&mut self) -> G5E_W

Bit 4 - Analog I/O group x enable

pub fn g4e(&mut self) -> G4E_W

Bit 3 - Analog I/O group x enable

pub fn g3e(&mut self) -> G3E_W

Bit 2 - Analog I/O group x enable

pub fn g2e(&mut self) -> G2E_W

Bit 1 - Analog I/O group x enable

pub fn g1e(&mut self) -> G1E_W

Bit 0 - Analog I/O group x enable

impl W<u32, Reg<u32, _KR>>

pub fn key(&mut self) -> KEY_W

Bits 0:15 - Key value (write only, read 0x0000)

impl W<u32, Reg<u32, _PR>>

pub fn pr(&mut self) -> PR_W

Bits 0:2 - Prescaler divider

impl W<u32, Reg<u32, _RLR>>

pub fn rl(&mut self) -> RL_W

Bits 0:11 - Watchdog counter reload value

impl W<u32, Reg<u32, _WINR>>

pub fn win(&mut self) -> WIN_W

Bits 0:11 - Watchdog counter window value

impl W<u32, Reg<u32, _CR>>

pub fn wdga(&mut self) -> WDGA_W

Bit 7 - Activation bit

pub fn t(&mut self) -> T_W

Bits 0:6 - 7-bit counter (MSB to LSB)

impl W<u32, Reg<u32, _CFR>>

pub fn ewi(&mut self) -> EWI_W

Bit 9 - Early wakeup interrupt

pub fn w(&mut self) -> W_W

Bits 0:6 - 7-bit window value

pub fn wdgtb(&mut self) -> WDGTB_W

Bits 7:8 - Timer base

impl W<u32, Reg<u32, _SR>>

pub fn ewif(&mut self) -> EWIF_W

Bit 0 - Early wakeup interrupt flag

impl W<u32, Reg<u32, _EP0R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP1R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP2R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP3R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP4R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP5R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP6R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP7R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _CNTR>>

pub fn ctrm(&mut self) -> CTRM_W

Bit 15 - CTRM

pub fn pmaovrm(&mut self) -> PMAOVRM_W

Bit 14 - PMAOVRM

pub fn errm(&mut self) -> ERRM_W

Bit 13 - ERRM

pub fn wkupm(&mut self) -> WKUPM_W

Bit 12 - WKUPM

pub fn suspm(&mut self) -> SUSPM_W

Bit 11 - SUSPM

pub fn resetm(&mut self) -> RESETM_W

Bit 10 - RESETM

pub fn sofm(&mut self) -> SOFM_W

Bit 9 - SOFM

pub fn esofm(&mut self) -> ESOFM_W

Bit 8 - ESOFM

pub fn l1reqm(&mut self) -> L1REQM_W

Bit 7 - L1REQM

pub fn l1resume(&mut self) -> L1RESUME_W

Bit 5 - L1RESUME

pub fn resume(&mut self) -> RESUME_W

Bit 4 - RESUME

pub fn fsusp(&mut self) -> FSUSP_W

Bit 3 - FSUSP

pub fn lpmode(&mut self) -> LPMODE_W

Bit 2 - LPMODE

pub fn pdwn(&mut self) -> PDWN_W

Bit 1 - PDWN

pub fn fres(&mut self) -> FRES_W

Bit 0 - FRES

impl W<u32, Reg<u32, _ISTR>>

pub fn ctr(&mut self) -> CTR_W

Bit 15 - CTR

pub fn pmaovr(&mut self) -> PMAOVR_W

Bit 14 - PMAOVR

pub fn err(&mut self) -> ERR_W

Bit 13 - ERR

pub fn wkup(&mut self) -> WKUP_W

Bit 12 - WKUP

pub fn susp(&mut self) -> SUSP_W

Bit 11 - SUSP

pub fn reset(&mut self) -> RESET_W

Bit 10 - RESET

pub fn sof(&mut self) -> SOF_W

Bit 9 - SOF

pub fn esof(&mut self) -> ESOF_W

Bit 8 - ESOF

pub fn l1req(&mut self) -> L1REQ_W

Bit 7 - L1REQ

pub fn dir(&mut self) -> DIR_W

Bit 4 - DIR

pub fn ep_id(&mut self) -> EP_ID_W

Bits 0:3 - EP_ID

impl W<u32, Reg<u32, _DADDR>>

pub fn ef(&mut self) -> EF_W

Bit 7 - EF

pub fn add(&mut self) -> ADD_W

Bits 0:6 - ADD

impl W<u32, Reg<u32, _BTABLE>>

pub fn btable(&mut self) -> BTABLE_W

Bits 3:15 - BTABLE

impl W<u32, Reg<u32, _LPMCSR>>

pub fn lpmack(&mut self) -> LPMACK_W

Bit 1 - LPMACK

pub fn lpmen(&mut self) -> LPMEN_W

Bit 0 - LPMEN

impl W<u32, Reg<u32, _BCDR>>

pub fn dppu(&mut self) -> DPPU_W

Bit 15 - DPPU

pub fn sden(&mut self) -> SDEN_W

Bit 3 - SDEN

pub fn pden(&mut self) -> PDEN_W

Bit 2 - PDEN

pub fn dcden(&mut self) -> DCDEN_W

Bit 1 - DCDEN

pub fn bcden(&mut self) -> BCDEN_W

Bit 0 - BCDEN

impl W<u32, Reg<u32, _CR>>

pub fn trim(&mut self) -> TRIM_W

Bits 8:13 - HSI48 oscillator smooth trimming

pub fn swsync(&mut self) -> SWSYNC_W

Bit 7 - Generate software SYNC event

pub fn autotrimen(&mut self) -> AUTOTRIMEN_W

Bit 6 - Automatic trimming enable

pub fn cen(&mut self) -> CEN_W

Bit 5 - Frequency error counter enable

pub fn esyncie(&mut self) -> ESYNCIE_W

Bit 3 - Expected SYNC interrupt enable

pub fn errie(&mut self) -> ERRIE_W

Bit 2 - Synchronization or trimming error interrupt enable

pub fn syncwarnie(&mut self) -> SYNCWARNIE_W

Bit 1 - SYNC warning interrupt enable

pub fn syncokie(&mut self) -> SYNCOKIE_W

Bit 0 - SYNC event OK interrupt enable

impl W<u32, Reg<u32, _CFGR>>

pub fn syncpol(&mut self) -> SYNCPOL_W

Bit 31 - SYNC polarity selection

pub fn syncsrc(&mut self) -> SYNCSRC_W

Bits 28:29 - SYNC signal source selection

pub fn syncdiv(&mut self) -> SYNCDIV_W

Bits 24:26 - SYNC divider

pub fn felim(&mut self) -> FELIM_W

Bits 16:23 - Frequency error limit

pub fn reload(&mut self) -> RELOAD_W

Bits 0:15 - Counter reload value

impl W<u32, Reg<u32, _ICR>>

pub fn esyncc(&mut self) -> ESYNCC_W

Bit 3 - Expected SYNC clear flag

pub fn errc(&mut self) -> ERRC_W

Bit 2 - Error clear flag

pub fn syncwarnc(&mut self) -> SYNCWARNC_W

Bit 1 - SYNC warning clear flag

pub fn syncokc(&mut self) -> SYNCOKC_W

Bit 0 - SYNC event OK clear flag

impl W<u32, Reg<u32, _CSSA>>

pub fn add(&mut self) -> ADD_W

Bits 8:23 - code segment start address

impl W<u32, Reg<u32, _CSL>>

pub fn leng(&mut self) -> LENG_W

Bits 8:21 - code segment length

impl W<u32, Reg<u32, _NVDSSA>>

pub fn add(&mut self) -> ADD_W

Bits 8:23 - Non-volatile data segment start address

impl W<u32, Reg<u32, _NVDSL>>

pub fn leng(&mut self) -> LENG_W

Bits 8:21 - Non-volatile data segment length

impl W<u32, Reg<u32, _VDSSA>>

pub fn add(&mut self) -> ADD_W

Bits 6:15 - Volatile data segment start address

impl W<u32, Reg<u32, _VDSL>>

pub fn leng(&mut self) -> LENG_W

Bits 6:15 - Non-volatile data segment length

impl W<u32, Reg<u32, _CR>>

pub fn vde(&mut self) -> VDE_W

Bit 2 - Volatile data execution

pub fn vds(&mut self) -> VDS_W

Bit 1 - Volatile data shared

pub fn fpa(&mut self) -> FPA_W

Bit 0 - Firewall pre alarm

impl W<u32, Reg<u32, _CR>>

pub fn pllon(&mut self) -> PLLON_W

Bit 24 - PLL enable bit

pub fn rtcpre(&mut self) -> RTCPRE_W

Bits 20:21 - TC/LCD prescaler

pub fn csshseon(&mut self) -> CSSHSEON_W

Bit 19 - Clock security system on HSE enable bit

pub fn hsebyp(&mut self) -> HSEBYP_W

Bit 18 - HSE clock bypass bit

pub fn hseon(&mut self) -> HSEON_W

Bit 16 - HSE clock enable bit

pub fn msion(&mut self) -> MSION_W

Bit 8 - MSI clock enable bit

pub fn hsi16diven(&mut self) -> HSI16DIVEN_W

Bit 3 - HSI16DIVEN

pub fn hsi16rdyf(&mut self) -> HSI16RDYF_W

Bit 2 - Internal high-speed clock ready flag

pub fn hsi16on(&mut self) -> HSI16ON_W

Bit 0 - 16 MHz high-speed internal clock enable

pub fn hsi16outen(&mut self) -> HSI16OUTEN_W

Bit 5 - 16 MHz high-speed internal clock output enable

impl W<u32, Reg<u32, _ICSCR>>

pub fn msitrim(&mut self) -> MSITRIM_W

Bits 24:31 - MSI clock trimming

pub fn msirange(&mut self) -> MSIRANGE_W

Bits 13:15 - MSI clock ranges

pub fn hsi16trim(&mut self) -> HSI16TRIM_W

Bits 8:12 - High speed internal clock trimming

impl W<u32, Reg<u32, _CRRCR>>

pub fn hsi48on(&mut self) -> HSI48ON_W

Bit 0 - 48MHz HSI clock enable bit

pub fn hsi48div6en(&mut self) -> HSI48DIV6EN_W

Bit 2 - 48 MHz HSI clock divided by 6 output enable

impl W<u32, Reg<u32, _CFGR>>

pub fn mcopre(&mut self) -> MCOPRE_W

Bits 28:30 - Microcontroller clock output prescaler

pub fn mcosel(&mut self) -> MCOSEL_W

Bits 24:27 - Microcontroller clock output selection

pub fn plldiv(&mut self) -> PLLDIV_W

Bits 22:23 - PLL output division

pub fn pllmul(&mut self) -> PLLMUL_W

Bits 18:21 - PLL multiplication factor

pub fn pllsrc(&mut self) -> PLLSRC_W

Bit 16 - PLL entry clock source

pub fn stopwuck(&mut self) -> STOPWUCK_W

Bit 15 - Wake-up from stop clock selection

pub fn ppre2(&mut self) -> PPRE2_W

Bits 11:13 - APB high-speed prescaler (APB2)

pub fn ppre1(&mut self) -> PPRE1_W

Bits 8:10 - APB low-speed prescaler (APB1)

pub fn hpre(&mut self) -> HPRE_W

Bits 4:7 - AHB prescaler

pub fn sw(&mut self) -> SW_W

Bits 0:1 - System clock switch

impl W<u32, Reg<u32, _IOPRSTR>>

pub fn iophrst(&mut self) -> IOPHRST_W

Bit 7 - I/O port H reset

pub fn iopdrst(&mut self) -> IOPDRST_W

Bit 3 - I/O port D reset

pub fn iopcrst(&mut self) -> IOPCRST_W

Bit 2 - I/O port A reset

pub fn iopbrst(&mut self) -> IOPBRST_W

Bit 1 - I/O port B reset

pub fn ioparst(&mut self) -> IOPARST_W

Bit 0 - I/O port A reset

pub fn ioperst(&mut self) -> IOPERST_W

Bit 4 - I/O port E reset

impl W<u32, Reg<u32, _AHBRSTR>>

pub fn cryprst(&mut self) -> CRYPRST_W

Bit 24 - Crypto module reset

pub fn rngrst(&mut self) -> RNGRST_W

Bit 20 - Random Number Generator module reset

pub fn touchrst(&mut self) -> TOUCHRST_W

Bit 16 - Touch Sensing reset

pub fn crcrst(&mut self) -> CRCRST_W

Bit 12 - Test integration module reset

pub fn mifrst(&mut self) -> MIFRST_W

Bit 8 - Memory interface reset

pub fn dmarst(&mut self) -> DMARST_W

Bit 0 - DMA reset

impl W<u32, Reg<u32, _APB2RSTR>>

pub fn dbgrst(&mut self) -> DBGRST_W

Bit 22 - DBG reset

pub fn usart1rst(&mut self) -> USART1RST_W

Bit 14 - USART1 reset

pub fn spi1rst(&mut self) -> SPI1RST_W

Bit 12 - SPI 1 reset

pub fn adcrst(&mut self) -> ADCRST_W

Bit 9 - ADC interface reset

pub fn tim22rst(&mut self) -> TIM22RST_W

Bit 5 - TIM22 timer reset

pub fn tim21rst(&mut self) -> TIM21RST_W

Bit 2 - TIM21 timer reset

pub fn syscfgrst(&mut self) -> SYSCFGRST_W

Bit 0 - System configuration controller reset

impl W<u32, Reg<u32, _APB1RSTR>>

pub fn lptim1rst(&mut self) -> LPTIM1RST_W

Bit 31 - Low power timer reset

pub fn dacrst(&mut self) -> DACRST_W

Bit 29 - DAC interface reset

pub fn pwrrst(&mut self) -> PWRRST_W

Bit 28 - Power interface reset

pub fn crsrst(&mut self) -> CRSRST_W

Bit 27 - Clock recovery system reset

pub fn usbrst(&mut self) -> USBRST_W

Bit 23 - USB reset

pub fn i2c2rst(&mut self) -> I2C2RST_W

Bit 22 - I2C2 reset

pub fn i2c1rst(&mut self) -> I2C1RST_W

Bit 21 - I2C1 reset

pub fn lpuart1rst(&mut self) -> LPUART1RST_W

Bit 18 - LPUART1 reset

pub fn lpuart12rst(&mut self) -> LPUART12RST_W

Bit 17 - UART2 reset

pub fn spi2rst(&mut self) -> SPI2RST_W

Bit 14 - SPI2 reset

pub fn wwdrst(&mut self) -> WWDRST_W

Bit 11 - Window watchdog reset

pub fn tim6rst(&mut self) -> TIM6RST_W

Bit 4 - Timer 6 reset

pub fn tim2rst(&mut self) -> TIM2RST_W

Bit 0 - Timer2 reset

pub fn tim3rst(&mut self) -> TIM3RST_W

Bit 1 - Timer3 reset

pub fn tim7rst(&mut self) -> TIM7RST_W

Bit 5 - Timer 7 reset

pub fn usart4rst(&mut self) -> USART4RST_W

Bit 19 - USART4 reset

pub fn usart5rst(&mut self) -> USART5RST_W

Bit 20 - USART5 reset

pub fn i2c3rst(&mut self) -> I2C3RST_W

Bit 30 - I2C3 reset

impl W<u32, Reg<u32, _IOPENR>>

pub fn iophen(&mut self) -> IOPHEN_W

Bit 7 - I/O port H clock enable bit

pub fn iopden(&mut self) -> IOPDEN_W

Bit 3 - I/O port D clock enable bit

pub fn iopcen(&mut self) -> IOPCEN_W

Bit 2 - IO port A clock enable bit

pub fn iopben(&mut self) -> IOPBEN_W

Bit 1 - IO port B clock enable bit

pub fn iopaen(&mut self) -> IOPAEN_W

Bit 0 - IO port A clock enable bit

pub fn iopeen(&mut self) -> IOPEEN_W

Bit 4 - I/O port E clock enable bit

impl W<u32, Reg<u32, _AHBENR>>

pub fn crypen(&mut self) -> CRYPEN_W

Bit 24 - Crypto clock enable bit

pub fn rngen(&mut self) -> RNGEN_W

Bit 20 - Random Number Generator clock enable bit

pub fn touchen(&mut self) -> TOUCHEN_W

Bit 16 - Touch Sensing clock enable bit

pub fn crcen(&mut self) -> CRCEN_W

Bit 12 - CRC clock enable bit

pub fn mifen(&mut self) -> MIFEN_W

Bit 8 - NVM interface clock enable bit

pub fn dmaen(&mut self) -> DMAEN_W

Bit 0 - DMA clock enable bit

impl W<u32, Reg<u32, _APB2ENR>>

pub fn dbgen(&mut self) -> DBGEN_W

Bit 22 - DBG clock enable bit

pub fn usart1en(&mut self) -> USART1EN_W

Bit 14 - USART1 clock enable bit

pub fn spi1en(&mut self) -> SPI1EN_W

Bit 12 - SPI1 clock enable bit

pub fn adcen(&mut self) -> ADCEN_W

Bit 9 - ADC clock enable bit

pub fn mifien(&mut self) -> MIFIEN_W

Bit 7 - MiFaRe Firewall clock enable bit

pub fn tim22en(&mut self) -> TIM22EN_W

Bit 5 - TIM22 timer clock enable bit

pub fn tim21en(&mut self) -> TIM21EN_W

Bit 2 - TIM21 timer clock enable bit

pub fn syscfgen(&mut self) -> SYSCFGEN_W

Bit 0 - System configuration controller clock enable bit

impl W<u32, Reg<u32, _APB1ENR>>

pub fn lptim1en(&mut self) -> LPTIM1EN_W

Bit 31 - Low power timer clock enable bit

pub fn dacen(&mut self) -> DACEN_W

Bit 29 - DAC interface clock enable bit

pub fn pwren(&mut self) -> PWREN_W

Bit 28 - Power interface clock enable bit

pub fn crsen(&mut self) -> CRSEN_W

Bit 27 - Clock recovery system clock enable bit

pub fn usben(&mut self) -> USBEN_W

Bit 23 - USB clock enable bit

pub fn i2c2en(&mut self) -> I2C2EN_W

Bit 22 - I2C2 clock enable bit

pub fn i2c1en(&mut self) -> I2C1EN_W

Bit 21 - I2C1 clock enable bit

pub fn lpuart1en(&mut self) -> LPUART1EN_W

Bit 18 - LPUART1 clock enable bit

pub fn usart2en(&mut self) -> USART2EN_W

Bit 17 - UART2 clock enable bit

pub fn spi2en(&mut self) -> SPI2EN_W

Bit 14 - SPI2 clock enable bit

pub fn wwdgen(&mut self) -> WWDGEN_W

Bit 11 - Window watchdog clock enable bit

pub fn tim6en(&mut self) -> TIM6EN_W

Bit 4 - Timer 6 clock enable bit

pub fn tim2en(&mut self) -> TIM2EN_W

Bit 0 - Timer2 clock enable bit

pub fn tim3en(&mut self) -> TIM3EN_W

Bit 1 - Timer3 clock enable bit

pub fn tim7en(&mut self) -> TIM7EN_W

Bit 5 - Timer 7 clock enable bit

pub fn usart4en(&mut self) -> USART4EN_W

Bit 19 - USART4 clock enable bit

pub fn usart5en(&mut self) -> USART5EN_W

Bit 20 - USART5 clock enable bit

pub fn i2c3en(&mut self) -> I2C3EN_W

Bit 30 - I2C3 clock enable bit

impl W<u32, Reg<u32, _IOPSMEN>>

pub fn iophsmen(&mut self) -> IOPHSMEN_W

Bit 7 - IOPHSMEN

pub fn iopdsmen(&mut self) -> IOPDSMEN_W

Bit 3 - IOPDSMEN

pub fn iopcsmen(&mut self) -> IOPCSMEN_W

Bit 2 - IOPCSMEN

pub fn iopbsmen(&mut self) -> IOPBSMEN_W

Bit 1 - IOPBSMEN

pub fn iopasmen(&mut self) -> IOPASMEN_W

Bit 0 - IOPASMEN

pub fn iopesmen(&mut self) -> IOPESMEN_W

Bit 4 - Port E clock enable during Sleep mode bit

impl W<u32, Reg<u32, _AHBSMENR>>

pub fn crypsmen(&mut self) -> CRYPSMEN_W

Bit 24 - Crypto clock enable during sleep mode bit

pub fn rngsmen(&mut self) -> RNGSMEN_W

Bit 20 - Random Number Generator clock enable during sleep mode bit

pub fn touchsmen(&mut self) -> TOUCHSMEN_W

Bit 16 - Touch Sensing clock enable during sleep mode bit

pub fn crcsmen(&mut self) -> CRCSMEN_W

Bit 12 - CRC clock enable during sleep mode bit

pub fn sramsmen(&mut self) -> SRAMSMEN_W

Bit 9 - SRAM interface clock enable during sleep mode bit

pub fn mifsmen(&mut self) -> MIFSMEN_W

Bit 8 - NVM interface clock enable during sleep mode bit

pub fn dmasmen(&mut self) -> DMASMEN_W

Bit 0 - DMA clock enable during sleep mode bit

impl W<u32, Reg<u32, _APB2SMENR>>

pub fn dbgsmen(&mut self) -> DBGSMEN_W

Bit 22 - DBG clock enable during sleep mode bit

pub fn usart1smen(&mut self) -> USART1SMEN_W

Bit 14 - USART1 clock enable during sleep mode bit

pub fn spi1smen(&mut self) -> SPI1SMEN_W

Bit 12 - SPI1 clock enable during sleep mode bit

pub fn adcsmen(&mut self) -> ADCSMEN_W

Bit 9 - ADC clock enable during sleep mode bit

pub fn tim22smen(&mut self) -> TIM22SMEN_W

Bit 5 - TIM22 timer clock enable during sleep mode bit

pub fn tim21smen(&mut self) -> TIM21SMEN_W

Bit 2 - TIM21 timer clock enable during sleep mode bit

pub fn syscfgsmen(&mut self) -> SYSCFGSMEN_W

Bit 0 - System configuration controller clock enable during sleep mode bit

impl W<u32, Reg<u32, _APB1SMENR>>

pub fn lptim1smen(&mut self) -> LPTIM1SMEN_W

Bit 31 - Low power timer clock enable during sleep mode bit

pub fn dacsmen(&mut self) -> DACSMEN_W

Bit 29 - DAC interface clock enable during sleep mode bit

pub fn pwrsmen(&mut self) -> PWRSMEN_W

Bit 28 - Power interface clock enable during sleep mode bit

pub fn crssmen(&mut self) -> CRSSMEN_W

Bit 27 - Clock recovery system clock enable during sleep mode bit

pub fn usbsmen(&mut self) -> USBSMEN_W

Bit 23 - USB clock enable during sleep mode bit

pub fn i2c2smen(&mut self) -> I2C2SMEN_W

Bit 22 - I2C2 clock enable during sleep mode bit

pub fn i2c1smen(&mut self) -> I2C1SMEN_W

Bit 21 - I2C1 clock enable during sleep mode bit

pub fn lpuart1smen(&mut self) -> LPUART1SMEN_W

Bit 18 - LPUART1 clock enable during sleep mode bit

pub fn usart2smen(&mut self) -> USART2SMEN_W

Bit 17 - UART2 clock enable during sleep mode bit

pub fn spi2smen(&mut self) -> SPI2SMEN_W

Bit 14 - SPI2 clock enable during sleep mode bit

pub fn wwdgsmen(&mut self) -> WWDGSMEN_W

Bit 11 - Window watchdog clock enable during sleep mode bit

pub fn tim6smen(&mut self) -> TIM6SMEN_W

Bit 4 - Timer 6 clock enable during sleep mode bit

pub fn tim2smen(&mut self) -> TIM2SMEN_W

Bit 0 - Timer2 clock enable during sleep mode bit

pub fn tim3smen(&mut self) -> TIM3SMEN_W

Bit 1 - Timer3 clock enable during Sleep mode bit

pub fn tim7smen(&mut self) -> TIM7SMEN_W

Bit 5 - Timer 7 clock enable during Sleep mode bit

pub fn usart4smen(&mut self) -> USART4SMEN_W

Bit 19 - USART4 clock enable during Sleep mode bit

pub fn usart5smen(&mut self) -> USART5SMEN_W

Bit 20 - USART5 clock enable during Sleep mode bit

pub fn i2c3smen(&mut self) -> I2C3SMEN_W

Bit 30 - 2C3 clock enable during Sleep mode bit

impl W<u32, Reg<u32, _CCIPR>>

pub fn hsi48msel(&mut self) -> HSI48MSEL_W

Bit 26 - 48 MHz HSI48 clock source selection bit

pub fn i2c3sel(&mut self) -> I2C3SEL_W

Bits 16:17 - I2C3 clock source selection bits

pub fn lptim1sel(&mut self) -> LPTIM1SEL_W

Bits 18:19 - Low Power Timer clock source selection bits

pub fn i2c1sel(&mut self) -> I2C1SEL_W

Bits 12:13 - I2C1 clock source selection bits

pub fn lpuart1sel(&mut self) -> LPUART1SEL_W

Bits 10:11 - LPUART1 clock source selection bits

pub fn usart2sel(&mut self) -> USART2SEL_W

Bits 2:3 - USART2 clock source selection bits

pub fn usart1sel(&mut self) -> USART1SEL_W

Bits 0:1 - USART1 clock source selection bits

impl W<u32, Reg<u32, _CSR>>

pub fn lpwrrstf(&mut self) -> LPWRRSTF_W

Bit 31 - Low-power reset flag

pub fn wwdgrstf(&mut self) -> WWDGRSTF_W

Bit 30 - Window watchdog reset flag

pub fn iwdgrstf(&mut self) -> IWDGRSTF_W

Bit 29 - Independent watchdog reset flag

pub fn sftrstf(&mut self) -> SFTRSTF_W

Bit 28 - Software reset flag

pub fn porrstf(&mut self) -> PORRSTF_W

Bit 27 - POR/PDR reset flag

pub fn pinrstf(&mut self) -> PINRSTF_W

Bit 26 - PIN reset flag

pub fn oblrstf(&mut self) -> OBLRSTF_W

Bit 25 - OBLRSTF

pub fn rmvf(&mut self) -> RMVF_W

Bit 24 - Remove reset flag

pub fn rtcrst(&mut self) -> RTCRST_W

Bit 19 - RTC software reset bit

pub fn rtcen(&mut self) -> RTCEN_W

Bit 18 - RTC clock enable bit

pub fn rtcsel(&mut self) -> RTCSEL_W

Bits 16:17 - RTC and LCD clock source selection bits

pub fn csslsed(&mut self) -> CSSLSED_W

Bit 14 - CSS on LSE failure detection flag

pub fn csslseon(&mut self) -> CSSLSEON_W

Bit 13 - CSSLSEON

pub fn lsedrv(&mut self) -> LSEDRV_W

Bits 11:12 - LSEDRV

pub fn lsebyp(&mut self) -> LSEBYP_W

Bit 10 - External low-speed oscillator bypass bit

pub fn lseon(&mut self) -> LSEON_W

Bit 8 - External low-speed oscillator enable bit

pub fn lsirdy(&mut self) -> LSIRDY_W

Bit 1 - Internal low-speed oscillator ready bit

pub fn lsion(&mut self) -> LSION_W

Bit 0 - Internal low-speed oscillator enable

impl W<u32, Reg<u32, _CFGR1>>

pub fn mem_mode(&mut self) -> MEM_MODE_W

Bits 0:1 - Memory mapping selection bits

pub fn ufb(&mut self) -> UFB_W

Bit 3 - User bank swapping

impl W<u32, Reg<u32, _CFGR2>>

pub fn i2c2_fmp(&mut self) -> I2C2_FMP_W

Bit 13 - I2C2 Fm+ drive capability enable bit

pub fn i2c1_fmp(&mut self) -> I2C1_FMP_W

Bit 12 - I2C1 Fm+ drive capability enable bit

pub fn i2c_pb9_fmp(&mut self) -> I2C_PB9_FMP_W

Bit 11 - Fm+ drive capability on PB9 enable bit

pub fn i2c_pb8_fmp(&mut self) -> I2C_PB8_FMP_W

Bit 10 - Fm+ drive capability on PB8 enable bit

pub fn i2c_pb7_fmp(&mut self) -> I2C_PB7_FMP_W

Bit 9 - Fm+ drive capability on PB7 enable bit

pub fn i2c_pb6_fmp(&mut self) -> I2C_PB6_FMP_W

Bit 8 - Fm+ drive capability on PB6 enable bit

pub fn i2c3_fmp(&mut self) -> I2C3_FMP_W

Bit 14 - I2C3 Fm+ drive capability enable bit

pub fn fwdis(&mut self) -> FWDIS_W

Bit 0 - Firewall disable bit

impl W<u32, Reg<u32, _EXTICR1>>

pub fn exti3(&mut self) -> EXTI3_W

Bits 12:15 - EXTI x configuration (x = 0 to 3)

pub fn exti2(&mut self) -> EXTI2_W

Bits 8:11 - EXTI x configuration (x = 0 to 3)

pub fn exti1(&mut self) -> EXTI1_W

Bits 4:7 - EXTI x configuration (x = 0 to 3)

pub fn exti0(&mut self) -> EXTI0_W

Bits 0:3 - EXTI x configuration (x = 0 to 3)

impl W<u32, Reg<u32, _EXTICR2>>

pub fn exti7(&mut self) -> EXTI7_W

Bits 12:15 - EXTI x configuration (x = 4 to 7)

pub fn exti6(&mut self) -> EXTI6_W

Bits 8:11 - EXTI x configuration (x = 4 to 7)

pub fn exti5(&mut self) -> EXTI5_W

Bits 4:7 - EXTI x configuration (x = 4 to 7)

pub fn exti4(&mut self) -> EXTI4_W

Bits 0:3 - EXTI x configuration (x = 4 to 7)

impl W<u32, Reg<u32, _EXTICR3>>

pub fn exti11(&mut self) -> EXTI11_W

Bits 12:15 - EXTI x configuration (x = 8 to 11)

pub fn exti10(&mut self) -> EXTI10_W

Bits 8:11 - EXTI10

pub fn exti9(&mut self) -> EXTI9_W

Bits 4:7 - EXTI x configuration (x = 8 to 11)

pub fn exti8(&mut self) -> EXTI8_W

Bits 0:3 - EXTI x configuration (x = 8 to 11)

impl W<u32, Reg<u32, _EXTICR4>>

pub fn exti15(&mut self) -> EXTI15_W

Bits 12:15 - EXTI x configuration (x = 12 to 15)

pub fn exti14(&mut self) -> EXTI14_W

Bits 8:11 - EXTI14

pub fn exti13(&mut self) -> EXTI13_W

Bits 4:7 - EXTI13

pub fn exti12(&mut self) -> EXTI12_W

Bits 0:3 - EXTI12

impl W<u32, Reg<u32, _CFGR3>>

pub fn enbuf_sensor_adc(&mut self) -> ENBUF_SENSOR_ADC_W

Bit 9 - Sensor reference for ADC enable bit

pub fn sel_vref_out(&mut self) -> SEL_VREF_OUT_W

Bits 4:5 - BGAP_ADC connection bit

pub fn enref_hsi48(&mut self) -> ENREF_HSI48_W

Bit 13 - VREFINT reference for HSI48 oscillator enable bit

pub fn ref_lock(&mut self) -> REF_LOCK_W

Bit 31 - SYSCFG_CFGR3 lock bit

pub fn enbuf_vrefint_comp2(&mut self) -> ENBUF_VREFINT_COMP2_W

Bit 12 - VREFINT reference for COMP2 scaler enable bit

pub fn enbuf_vrefint_adc(&mut self) -> ENBUF_VREFINT_ADC_W

Bit 8 - VREFINT reference for ADC enable bit

pub fn en_vrefint(&mut self) -> EN_VREFINT_W

Bit 0 - VREFINT enable and scaler control for COMP2 enable bit

impl W<u32, Reg<u32, _COMP1_CSR>>

pub fn comp1polarity(&mut self) -> COMP1POLARITY_W

Bit 15 - Comparator 1 polarity selection bit

pub fn comp1lptimin1(&mut self) -> COMP1LPTIMIN1_W

Bit 12 - Comparator 1 LPTIM input propagation bit

pub fn comp1wm(&mut self) -> COMP1WM_W

Bit 8 - Comparator 1 window mode selection bit

pub fn comp1innsel(&mut self) -> COMP1INNSEL_W

Bits 4:5 - Comparator 1 Input Minus connection configuration bit

pub fn comp1en(&mut self) -> COMP1EN_W

Bit 0 - Comparator 1 enable bit

impl W<u32, Reg<u32, _COMP2_CSR>>

pub fn comp2polarity(&mut self) -> COMP2POLARITY_W

Bit 15 - Comparator 2 polarity selection bit

pub fn comp2lptimin1(&mut self) -> COMP2LPTIMIN1_W

Bit 13 - Comparator 2 LPTIM input 1 propagation bit

pub fn comp2lptimin2(&mut self) -> COMP2LPTIMIN2_W

Bit 12 - Comparator 2 LPTIM input 2 propagation bit

pub fn comp2inpsel(&mut self) -> COMP2INPSEL_W

Bits 8:10 - Comparator 2 Input Plus connection configuration bit

pub fn comp2innsel(&mut self) -> COMP2INNSEL_W

Bits 4:6 - Comparator 2 Input Minus connection configuration bit

pub fn comp2speed(&mut self) -> COMP2SPEED_W

Bit 3 - Comparator 2 power mode selection bit

pub fn comp2en(&mut self) -> COMP2EN_W

Bit 0 - Comparator 2 enable bit

impl W<u32, Reg<u32, _CR1>>

pub fn bidimode(&mut self) -> BIDIMODE_W

Bit 15 - Bidirectional data mode enable

pub fn bidioe(&mut self) -> BIDIOE_W

Bit 14 - Output enable in bidirectional mode

pub fn crcen(&mut self) -> CRCEN_W

Bit 13 - Hardware CRC calculation enable

pub fn crcnext(&mut self) -> CRCNEXT_W

Bit 12 - CRC transfer next

pub fn dff(&mut self) -> DFF_W

Bit 11 - Data frame format

pub fn rxonly(&mut self) -> RXONLY_W

Bit 10 - Receive only

pub fn ssm(&mut self) -> SSM_W

Bit 9 - Software slave management

pub fn ssi(&mut self) -> SSI_W

Bit 8 - Internal slave select

pub fn lsbfirst(&mut self) -> LSBFIRST_W

Bit 7 - Frame format

pub fn spe(&mut self) -> SPE_W

Bit 6 - SPI enable

pub fn br(&mut self) -> BR_W

Bits 3:5 - Baud rate control

pub fn mstr(&mut self) -> MSTR_W

Bit 2 - Master selection

pub fn cpol(&mut self) -> CPOL_W

Bit 1 - Clock polarity

pub fn cpha(&mut self) -> CPHA_W

Bit 0 - Clock phase

impl W<u32, Reg<u32, _CR2>>

pub fn rxdmaen(&mut self) -> RXDMAEN_W

Bit 0 - Rx buffer DMA enable

pub fn txdmaen(&mut self) -> TXDMAEN_W

Bit 1 - Tx buffer DMA enable

pub fn ssoe(&mut self) -> SSOE_W

Bit 2 - SS output enable

pub fn frf(&mut self) -> FRF_W

Bit 4 - Frame format

pub fn errie(&mut self) -> ERRIE_W

Bit 5 - Error interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W

Bit 6 - RX buffer not empty interrupt enable

pub fn txeie(&mut self) -> TXEIE_W

Bit 7 - Tx buffer empty interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn crcerr(&mut self) -> CRCERR_W

Bit 4 - CRC error flag

impl W<u32, Reg<u32, _DR>>

pub fn dr(&mut self) -> DR_W

Bits 0:15 - Data register

impl W<u32, Reg<u32, _CRCPR>>

pub fn crcpoly(&mut self) -> CRCPOLY_W

Bits 0:15 - CRC polynomial register

impl W<u32, Reg<u32, _I2SCFGR>>

pub fn i2smod(&mut self) -> I2SMOD_W

Bit 11 - I2S mode selection

pub fn i2se(&mut self) -> I2SE_W

Bit 10 - I2S Enable

pub fn i2scfg(&mut self) -> I2SCFG_W

Bits 8:9 - I2S configuration mode

pub fn pcmsync(&mut self) -> PCMSYNC_W

Bit 7 - PCM frame synchronization

pub fn i2sstd(&mut self) -> I2SSTD_W

Bits 4:5 - I2S standard selection

pub fn ckpol(&mut self) -> CKPOL_W

Bit 3 - Steady state clock polarity

pub fn datlen(&mut self) -> DATLEN_W

Bits 1:2 - Data length to be transferred

pub fn chlen(&mut self) -> CHLEN_W

Bit 0 - Channel length (number of bits per audio channel)

impl W<u32, Reg<u32, _I2SPR>>

pub fn mckoe(&mut self) -> MCKOE_W

Bit 9 - Master clock output enable

pub fn odd(&mut self) -> ODD_W

Bit 8 - Odd factor for the prescaler

pub fn i2sdiv(&mut self) -> I2SDIV_W

Bits 0:7 - I2S Linear prescaler

impl W<u32, Reg<u32, _CR1>>

pub fn pe(&mut self) -> PE_W

Bit 0 - Peripheral enable

pub fn txie(&mut self) -> TXIE_W

Bit 1 - TX Interrupt enable

pub fn rxie(&mut self) -> RXIE_W

Bit 2 - RX Interrupt enable

pub fn addrie(&mut self) -> ADDRIE_W

Bit 3 - Address match interrupt enable (slave only)

pub fn nackie(&mut self) -> NACKIE_W

Bit 4 - Not acknowledge received interrupt enable

pub fn stopie(&mut self) -> STOPIE_W

Bit 5 - STOP detection Interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 6 - Transfer Complete interrupt enable

pub fn errie(&mut self) -> ERRIE_W

Bit 7 - Error interrupts enable

pub fn dnf(&mut self) -> DNF_W

Bits 8:11 - Digital noise filter

pub fn anfoff(&mut self) -> ANFOFF_W

Bit 12 - Analog noise filter OFF

pub fn txdmaen(&mut self) -> TXDMAEN_W

Bit 14 - DMA transmission requests enable

pub fn rxdmaen(&mut self) -> RXDMAEN_W

Bit 15 - DMA reception requests enable

pub fn sbc(&mut self) -> SBC_W

Bit 16 - Slave byte control

pub fn nostretch(&mut self) -> NOSTRETCH_W

Bit 17 - Clock stretching disable

pub fn wupen(&mut self) -> WUPEN_W

Bit 18 - Wakeup from STOP enable

pub fn gcen(&mut self) -> GCEN_W

Bit 19 - General call enable

pub fn smbhen(&mut self) -> SMBHEN_W

Bit 20 - SMBus Host address enable

pub fn smbden(&mut self) -> SMBDEN_W

Bit 21 - SMBus Device Default address enable

pub fn alerten(&mut self) -> ALERTEN_W

Bit 22 - SMBUS alert enable

pub fn pecen(&mut self) -> PECEN_W

Bit 23 - PEC enable

impl W<u32, Reg<u32, _CR2>>

pub fn pecbyte(&mut self) -> PECBYTE_W

Bit 26 - Packet error checking byte

pub fn autoend(&mut self) -> AUTOEND_W

Bit 25 - Automatic end mode (master mode)

pub fn reload(&mut self) -> RELOAD_W

Bit 24 - NBYTES reload mode

pub fn nbytes(&mut self) -> NBYTES_W

Bits 16:23 - Number of bytes

pub fn nack(&mut self) -> NACK_W

Bit 15 - NACK generation (slave mode)

pub fn stop(&mut self) -> STOP_W

Bit 14 - Stop generation (master mode)

pub fn start(&mut self) -> START_W

Bit 13 - Start generation

pub fn head10r(&mut self) -> HEAD10R_W

Bit 12 - 10-bit address header only read direction (master receiver mode)

pub fn add10(&mut self) -> ADD10_W

Bit 11 - 10-bit addressing mode (master mode)

pub fn rd_wrn(&mut self) -> RD_WRN_W

Bit 10 - Transfer direction (master mode)

pub fn sadd(&mut self) -> SADD_W

Bits 0:9 - Slave address bit (master mode)

impl W<u32, Reg<u32, _OAR1>>

pub fn oa1(&mut self) -> OA1_W

Bits 0:9 - Interface address

pub fn oa1mode(&mut self) -> OA1MODE_W

Bit 10 - Own Address 1 10-bit mode

pub fn oa1en(&mut self) -> OA1EN_W

Bit 15 - Own Address 1 enable

impl W<u32, Reg<u32, _OAR2>>

pub fn oa2(&mut self) -> OA2_W

Bits 1:7 - Interface address

pub fn oa2msk(&mut self) -> OA2MSK_W

Bits 8:10 - Own Address 2 masks

pub fn oa2en(&mut self) -> OA2EN_W

Bit 15 - Own Address 2 enable

impl W<u32, Reg<u32, _TIMINGR>>

pub fn scll(&mut self) -> SCLL_W

Bits 0:7 - SCL low period (master mode)

pub fn sclh(&mut self) -> SCLH_W

Bits 8:15 - SCL high period (master mode)

pub fn sdadel(&mut self) -> SDADEL_W

Bits 16:19 - Data hold time

pub fn scldel(&mut self) -> SCLDEL_W

Bits 20:23 - Data setup time

pub fn presc(&mut self) -> PRESC_W

Bits 28:31 - Timing prescaler

impl W<u32, Reg<u32, _TIMEOUTR>>

pub fn timeouta(&mut self) -> TIMEOUTA_W

Bits 0:11 - Bus timeout A

pub fn tidle(&mut self) -> TIDLE_W

Bit 12 - Idle clock timeout detection

pub fn timouten(&mut self) -> TIMOUTEN_W

Bit 15 - Clock timeout enable

pub fn timeoutb(&mut self) -> TIMEOUTB_W

Bits 16:27 - Bus timeout B

pub fn texten(&mut self) -> TEXTEN_W

Bit 31 - Extended clock timeout enable

impl W<u32, Reg<u32, _ISR>>

pub fn txis(&mut self) -> TXIS_W

Bit 1 - Transmit interrupt status (transmitters)

pub fn txe(&mut self) -> TXE_W

Bit 0 - Transmit data register empty (transmitters)

impl W<u32, Reg<u32, _ICR>>

pub fn alertcf(&mut self) -> ALERTCF_W

Bit 13 - Alert flag clear

pub fn timoutcf(&mut self) -> TIMOUTCF_W

Bit 12 - Timeout detection flag clear

pub fn peccf(&mut self) -> PECCF_W

Bit 11 - PEC Error flag clear

pub fn ovrcf(&mut self) -> OVRCF_W

Bit 10 - Overrun/Underrun flag clear

pub fn arlocf(&mut self) -> ARLOCF_W

Bit 9 - Arbitration lost flag clear

pub fn berrcf(&mut self) -> BERRCF_W

Bit 8 - Bus error flag clear

pub fn stopcf(&mut self) -> STOPCF_W

Bit 5 - Stop detection flag clear

pub fn nackcf(&mut self) -> NACKCF_W

Bit 4 - Not Acknowledge flag clear

pub fn addrcf(&mut self) -> ADDRCF_W

Bit 3 - Address Matched flag clear

impl W<u32, Reg<u32, _TXDR>>

pub fn txdata(&mut self) -> TXDATA_W

Bits 0:7 - 8-bit transmit data

impl W<u32, Reg<u32, _CR>>

pub fn lpds(&mut self) -> LPDS_W

Bit 0 - Low-power deep sleep

pub fn pdds(&mut self) -> PDDS_W

Bit 1 - Power down deepsleep

pub fn cwuf(&mut self) -> CWUF_W

Bit 2 - Clear wakeup flag

pub fn csbf(&mut self) -> CSBF_W

Bit 3 - Clear standby flag

pub fn pvde(&mut self) -> PVDE_W

Bit 4 - Power voltage detector enable

pub fn pls(&mut self) -> PLS_W

Bits 5:7 - PVD level selection

pub fn dbp(&mut self) -> DBP_W

Bit 8 - Disable backup domain write protection

pub fn ulp(&mut self) -> ULP_W

Bit 9 - Ultra-low-power mode

pub fn fwu(&mut self) -> FWU_W

Bit 10 - Fast wakeup

pub fn vos(&mut self) -> VOS_W

Bits 11:12 - Voltage scaling range selection

pub fn ds_ee_koff(&mut self) -> DS_EE_KOFF_W

Bit 13 - Deep sleep mode with Flash memory kept off

pub fn lprun(&mut self) -> LPRUN_W

Bit 14 - Low power run mode

pub fn lpsdsr(&mut self) -> LPSDSR_W

Bit 0 - Low-power deepsleep/Sleep/Low-power run

impl W<u32, Reg<u32, _CSR>>

pub fn ewup2(&mut self) -> EWUP2_W

Bit 9 - Enable WKUP pin 2

pub fn ewup1(&mut self) -> EWUP1_W

Bit 8 - Enable WKUP pin 1

pub fn ewup3(&mut self) -> EWUP3_W

Bit 10 - Enable WKUP pin 3

impl W<u32, Reg<u32, _ACR>>

pub fn latency(&mut self) -> LATENCY_W

Bit 0 - Latency

pub fn prften(&mut self) -> PRFTEN_W

Bit 1 - Prefetch enable

pub fn sleep_pd(&mut self) -> SLEEP_PD_W

Bit 3 - Flash mode during Sleep

pub fn run_pd(&mut self) -> RUN_PD_W

Bit 4 - Flash mode during Run

pub fn disab_buf(&mut self) -> DISAB_BUF_W

Bit 5 - Disable Buffer

pub fn pre_read(&mut self) -> PRE_READ_W

Bit 6 - Pre-read data address

impl W<u32, Reg<u32, _PECR>>

pub fn pelock(&mut self) -> PELOCK_W

Bit 0 - FLASH_PECR and data EEPROM lock

pub fn prglock(&mut self) -> PRGLOCK_W

Bit 1 - Program memory lock

pub fn optlock(&mut self) -> OPTLOCK_W

Bit 2 - Option bytes block lock

pub fn prog(&mut self) -> PROG_W

Bit 3 - Program memory selection

pub fn data(&mut self) -> DATA_W

Bit 4 - Data EEPROM selection

pub fn fix(&mut self) -> FIX_W

Bit 8 - Fixed time data write for Byte, Half Word and Word programming

pub fn erase(&mut self) -> ERASE_W

Bit 9 - Page or Double Word erase mode

pub fn fprg(&mut self) -> FPRG_W

Bit 10 - Half Page/Double Word programming mode

pub fn parallelbank(&mut self) -> PARALLELBANK_W

Bit 15 - Parallel bank mode

pub fn eopie(&mut self) -> EOPIE_W

Bit 16 - End of programming interrupt enable

pub fn errie(&mut self) -> ERRIE_W

Bit 17 - Error interrupt enable

pub fn obl_launch(&mut self) -> OBL_LAUNCH_W

Bit 18 - Launch the option byte loading

impl W<u32, Reg<u32, _PDKEYR>>

pub fn pdkeyr(&mut self) -> PDKEYR_W

Bits 0:31 - RUN_PD in FLASH_ACR key

impl W<u32, Reg<u32, _PEKEYR>>

pub fn pekeyr(&mut self) -> PEKEYR_W

Bits 0:31 - FLASH_PEC and data EEPROM key

impl W<u32, Reg<u32, _PRGKEYR>>

pub fn prgkeyr(&mut self) -> PRGKEYR_W

Bits 0:31 - Program memory key

impl W<u32, Reg<u32, _OPTKEYR>>

pub fn optkeyr(&mut self) -> OPTKEYR_W

Bits 0:31 - Option byte key

impl W<u32, Reg<u32, _SR>>

pub fn eop(&mut self) -> EOP_W

Bit 1 - End of operation

pub fn wrperr(&mut self) -> WRPERR_W

Bit 8 - Write protected error

pub fn pgaerr(&mut self) -> PGAERR_W

Bit 9 - Programming alignment error

pub fn sizerr(&mut self) -> SIZERR_W

Bit 10 - Size error

pub fn optverr(&mut self) -> OPTVERR_W

Bit 11 - Option validity error

pub fn rderr(&mut self) -> RDERR_W

Bit 14 - RDERR

pub fn notzeroerr(&mut self) -> NOTZEROERR_W

Bit 16 - NOTZEROERR

pub fn fwwerr(&mut self) -> FWWERR_W

Bit 17 - FWWERR

impl W<u32, Reg<u32, _IMR>>

pub fn im0(&mut self) -> IM0_W

Bit 0 - Interrupt Mask on line 0

pub fn im1(&mut self) -> IM1_W

Bit 1 - Interrupt Mask on line 1

pub fn im2(&mut self) -> IM2_W

Bit 2 - Interrupt Mask on line 2

pub fn im3(&mut self) -> IM3_W

Bit 3 - Interrupt Mask on line 3

pub fn im4(&mut self) -> IM4_W

Bit 4 - Interrupt Mask on line 4

pub fn im5(&mut self) -> IM5_W

Bit 5 - Interrupt Mask on line 5

pub fn im6(&mut self) -> IM6_W

Bit 6 - Interrupt Mask on line 6

pub fn im7(&mut self) -> IM7_W

Bit 7 - Interrupt Mask on line 7

pub fn im8(&mut self) -> IM8_W

Bit 8 - Interrupt Mask on line 8

pub fn im9(&mut self) -> IM9_W

Bit 9 - Interrupt Mask on line 9

pub fn im10(&mut self) -> IM10_W

Bit 10 - Interrupt Mask on line 10

pub fn im11(&mut self) -> IM11_W

Bit 11 - Interrupt Mask on line 11

pub fn im12(&mut self) -> IM12_W

Bit 12 - Interrupt Mask on line 12

pub fn im13(&mut self) -> IM13_W

Bit 13 - Interrupt Mask on line 13

pub fn im14(&mut self) -> IM14_W

Bit 14 - Interrupt Mask on line 14

pub fn im15(&mut self) -> IM15_W

Bit 15 - Interrupt Mask on line 15

pub fn im16(&mut self) -> IM16_W

Bit 16 - Interrupt Mask on line 16

pub fn im17(&mut self) -> IM17_W

Bit 17 - Interrupt Mask on line 17

pub fn im18(&mut self) -> IM18_W

Bit 18 - Interrupt Mask on line 18

pub fn im19(&mut self) -> IM19_W

Bit 19 - Interrupt Mask on line 19

pub fn im20(&mut self) -> IM20_W

Bit 20 - Interrupt Mask on line 20

pub fn im21(&mut self) -> IM21_W

Bit 21 - Interrupt Mask on line 21

pub fn im22(&mut self) -> IM22_W

Bit 22 - Interrupt Mask on line 22

pub fn im23(&mut self) -> IM23_W

Bit 23 - Interrupt Mask on line 23

pub fn im24(&mut self) -> IM24_W

Bit 24 - Interrupt Mask on line 24

pub fn im25(&mut self) -> IM25_W

Bit 25 - Interrupt Mask on line 25

pub fn im26(&mut self) -> IM26_W

Bit 26 - Interrupt Mask on line 27

pub fn im28(&mut self) -> IM28_W

Bit 28 - Interrupt Mask on line 27

pub fn im29(&mut self) -> IM29_W

Bit 29 - Interrupt Mask on line 27

impl W<u32, Reg<u32, _EMR>>

pub fn em0(&mut self) -> EM0_W

Bit 0 - Event Mask on line 0

pub fn em1(&mut self) -> EM1_W

Bit 1 - Event Mask on line 1

pub fn em2(&mut self) -> EM2_W

Bit 2 - Event Mask on line 2

pub fn em3(&mut self) -> EM3_W

Bit 3 - Event Mask on line 3

pub fn em4(&mut self) -> EM4_W

Bit 4 - Event Mask on line 4

pub fn em5(&mut self) -> EM5_W

Bit 5 - Event Mask on line 5

pub fn em6(&mut self) -> EM6_W

Bit 6 - Event Mask on line 6

pub fn em7(&mut self) -> EM7_W

Bit 7 - Event Mask on line 7

pub fn em8(&mut self) -> EM8_W

Bit 8 - Event Mask on line 8

pub fn em9(&mut self) -> EM9_W

Bit 9 - Event Mask on line 9

pub fn em10(&mut self) -> EM10_W

Bit 10 - Event Mask on line 10

pub fn em11(&mut self) -> EM11_W

Bit 11 - Event Mask on line 11

pub fn em12(&mut self) -> EM12_W

Bit 12 - Event Mask on line 12

pub fn em13(&mut self) -> EM13_W

Bit 13 - Event Mask on line 13

pub fn em14(&mut self) -> EM14_W

Bit 14 - Event Mask on line 14

pub fn em15(&mut self) -> EM15_W

Bit 15 - Event Mask on line 15

pub fn em16(&mut self) -> EM16_W

Bit 16 - Event Mask on line 16

pub fn em17(&mut self) -> EM17_W

Bit 17 - Event Mask on line 17

pub fn em18(&mut self) -> EM18_W

Bit 18 - Event Mask on line 18

pub fn em19(&mut self) -> EM19_W

Bit 19 - Event Mask on line 19

pub fn em20(&mut self) -> EM20_W

Bit 20 - Event Mask on line 20

pub fn em21(&mut self) -> EM21_W

Bit 21 - Event Mask on line 21

pub fn em22(&mut self) -> EM22_W

Bit 22 - Event Mask on line 22

pub fn em23(&mut self) -> EM23_W

Bit 23 - Event Mask on line 23

pub fn em24(&mut self) -> EM24_W

Bit 24 - Event Mask on line 24

pub fn em25(&mut self) -> EM25_W

Bit 25 - Event Mask on line 25

pub fn em26(&mut self) -> EM26_W

Bit 26 - Event Mask on line 26

pub fn em28(&mut self) -> EM28_W

Bit 28 - Event Mask on line 28

pub fn em29(&mut self) -> EM29_W

Bit 29 - Event Mask on line 29

impl W<u32, Reg<u32, _RTSR>>

pub fn rt0(&mut self) -> RT0_W

Bit 0 - Rising trigger event configuration of line 0

pub fn rt1(&mut self) -> RT1_W

Bit 1 - Rising trigger event configuration of line 1

pub fn rt2(&mut self) -> RT2_W

Bit 2 - Rising trigger event configuration of line 2

pub fn rt3(&mut self) -> RT3_W

Bit 3 - Rising trigger event configuration of line 3

pub fn rt4(&mut self) -> RT4_W

Bit 4 - Rising trigger event configuration of line 4

pub fn rt5(&mut self) -> RT5_W

Bit 5 - Rising trigger event configuration of line 5

pub fn rt6(&mut self) -> RT6_W

Bit 6 - Rising trigger event configuration of line 6

pub fn rt7(&mut self) -> RT7_W

Bit 7 - Rising trigger event configuration of line 7

pub fn rt8(&mut self) -> RT8_W

Bit 8 - Rising trigger event configuration of line 8

pub fn rt9(&mut self) -> RT9_W

Bit 9 - Rising trigger event configuration of line 9

pub fn rt10(&mut self) -> RT10_W

Bit 10 - Rising trigger event configuration of line 10

pub fn rt11(&mut self) -> RT11_W

Bit 11 - Rising trigger event configuration of line 11

pub fn rt12(&mut self) -> RT12_W

Bit 12 - Rising trigger event configuration of line 12

pub fn rt13(&mut self) -> RT13_W

Bit 13 - Rising trigger event configuration of line 13

pub fn rt14(&mut self) -> RT14_W

Bit 14 - Rising trigger event configuration of line 14

pub fn rt15(&mut self) -> RT15_W

Bit 15 - Rising trigger event configuration of line 15

pub fn rt16(&mut self) -> RT16_W

Bit 16 - Rising trigger event configuration of line 16

pub fn rt17(&mut self) -> RT17_W

Bit 17 - Rising trigger event configuration of line 17

pub fn rt19(&mut self) -> RT19_W

Bit 19 - Rising trigger event configuration of line 19

pub fn rt20(&mut self) -> RT20_W

Bit 20 - Rising trigger event configuration of line 20

pub fn rt21(&mut self) -> RT21_W

Bit 21 - Rising trigger event configuration of line 21

pub fn rt22(&mut self) -> RT22_W

Bit 22 - Rising trigger event configuration of line 22

impl W<u32, Reg<u32, _FTSR>>

pub fn ft0(&mut self) -> FT0_W

Bit 0 - Falling trigger event configuration of line 0

pub fn ft1(&mut self) -> FT1_W

Bit 1 - Falling trigger event configuration of line 1

pub fn ft2(&mut self) -> FT2_W

Bit 2 - Falling trigger event configuration of line 2

pub fn ft3(&mut self) -> FT3_W

Bit 3 - Falling trigger event configuration of line 3

pub fn ft4(&mut self) -> FT4_W

Bit 4 - Falling trigger event configuration of line 4

pub fn ft5(&mut self) -> FT5_W

Bit 5 - Falling trigger event configuration of line 5

pub fn ft6(&mut self) -> FT6_W

Bit 6 - Falling trigger event configuration of line 6

pub fn ft7(&mut self) -> FT7_W

Bit 7 - Falling trigger event configuration of line 7

pub fn ft8(&mut self) -> FT8_W

Bit 8 - Falling trigger event configuration of line 8

pub fn ft9(&mut self) -> FT9_W

Bit 9 - Falling trigger event configuration of line 9

pub fn ft10(&mut self) -> FT10_W

Bit 10 - Falling trigger event configuration of line 10

pub fn ft11(&mut self) -> FT11_W

Bit 11 - Falling trigger event configuration of line 11

pub fn ft12(&mut self) -> FT12_W

Bit 12 - Falling trigger event configuration of line 12

pub fn ft13(&mut self) -> FT13_W

Bit 13 - Falling trigger event configuration of line 13

pub fn ft14(&mut self) -> FT14_W

Bit 14 - Falling trigger event configuration of line 14

pub fn ft15(&mut self) -> FT15_W

Bit 15 - Falling trigger event configuration of line 15

pub fn ft16(&mut self) -> FT16_W

Bit 16 - Falling trigger event configuration of line 16

pub fn ft17(&mut self) -> FT17_W

Bit 17 - Falling trigger event configuration of line 17

pub fn ft19(&mut self) -> FT19_W

Bit 19 - Falling trigger event configuration of line 19

pub fn ft20(&mut self) -> FT20_W

Bit 20 - Falling trigger event configuration of line 20

pub fn ft21(&mut self) -> FT21_W

Bit 21 - Falling trigger event configuration of line 21

pub fn ft22(&mut self) -> FT22_W

Bit 22 - Falling trigger event configuration of line 22

impl W<u32, Reg<u32, _SWIER>>

pub fn swi0(&mut self) -> SWI0_W

Bit 0 - Software Interrupt on line 0

pub fn swi1(&mut self) -> SWI1_W

Bit 1 - Software Interrupt on line 1

pub fn swi2(&mut self) -> SWI2_W

Bit 2 - Software Interrupt on line 2

pub fn swi3(&mut self) -> SWI3_W

Bit 3 - Software Interrupt on line 3

pub fn swi4(&mut self) -> SWI4_W

Bit 4 - Software Interrupt on line 4

pub fn swi5(&mut self) -> SWI5_W

Bit 5 - Software Interrupt on line 5

pub fn swi6(&mut self) -> SWI6_W

Bit 6 - Software Interrupt on line 6

pub fn swi7(&mut self) -> SWI7_W

Bit 7 - Software Interrupt on line 7

pub fn swi8(&mut self) -> SWI8_W

Bit 8 - Software Interrupt on line 8

pub fn swi9(&mut self) -> SWI9_W

Bit 9 - Software Interrupt on line 9

pub fn swi10(&mut self) -> SWI10_W

Bit 10 - Software Interrupt on line 10

pub fn swi11(&mut self) -> SWI11_W

Bit 11 - Software Interrupt on line 11

pub fn swi12(&mut self) -> SWI12_W

Bit 12 - Software Interrupt on line 12

pub fn swi13(&mut self) -> SWI13_W

Bit 13 - Software Interrupt on line 13

pub fn swi14(&mut self) -> SWI14_W

Bit 14 - Software Interrupt on line 14

pub fn swi15(&mut self) -> SWI15_W

Bit 15 - Software Interrupt on line 15

pub fn swi16(&mut self) -> SWI16_W

Bit 16 - Software Interrupt on line 16

pub fn swi17(&mut self) -> SWI17_W

Bit 17 - Software Interrupt on line 17

pub fn swi19(&mut self) -> SWI19_W

Bit 19 - Software Interrupt on line 19

pub fn swi20(&mut self) -> SWI20_W

Bit 20 - Software Interrupt on line 20

pub fn swi21(&mut self) -> SWI21_W

Bit 21 - Software Interrupt on line 21

pub fn swi22(&mut self) -> SWI22_W

Bit 22 - Software Interrupt on line 22

impl W<u32, Reg<u32, _PR>>

pub fn pif0(&mut self) -> PIF0_W

Bit 0 - Pending bit 0

pub fn pif1(&mut self) -> PIF1_W

Bit 1 - Pending bit 1

pub fn pif2(&mut self) -> PIF2_W

Bit 2 - Pending bit 2

pub fn pif3(&mut self) -> PIF3_W

Bit 3 - Pending bit 3

pub fn pif4(&mut self) -> PIF4_W

Bit 4 - Pending bit 4

pub fn pif5(&mut self) -> PIF5_W

Bit 5 - Pending bit 5

pub fn pif6(&mut self) -> PIF6_W

Bit 6 - Pending bit 6

pub fn pif7(&mut self) -> PIF7_W

Bit 7 - Pending bit 7

pub fn pif8(&mut self) -> PIF8_W

Bit 8 - Pending bit 8

pub fn pif9(&mut self) -> PIF9_W

Bit 9 - Pending bit 9

pub fn pif10(&mut self) -> PIF10_W

Bit 10 - Pending bit 10

pub fn pif11(&mut self) -> PIF11_W

Bit 11 - Pending bit 11

pub fn pif12(&mut self) -> PIF12_W

Bit 12 - Pending bit 12

pub fn pif13(&mut self) -> PIF13_W

Bit 13 - Pending bit 13

pub fn pif14(&mut self) -> PIF14_W

Bit 14 - Pending bit 14

pub fn pif15(&mut self) -> PIF15_W

Bit 15 - Pending bit 15

pub fn pif16(&mut self) -> PIF16_W

Bit 16 - Pending bit 16

pub fn pif17(&mut self) -> PIF17_W

Bit 17 - Pending bit 17

pub fn pif19(&mut self) -> PIF19_W

Bit 19 - Pending bit 19

pub fn pif20(&mut self) -> PIF20_W

Bit 20 - Pending bit 20

pub fn pif21(&mut self) -> PIF21_W

Bit 21 - Pending bit 21

pub fn pif22(&mut self) -> PIF22_W

Bit 22 - Pending bit 22

impl W<u32, Reg<u32, _ISR>>

pub fn adrdy(&mut self) -> ADRDY_W

Bit 0 - ADC ready

pub fn eosmp(&mut self) -> EOSMP_W

Bit 1 - End of sampling flag

pub fn eoc(&mut self) -> EOC_W

Bit 2 - End of conversion flag

pub fn eos(&mut self) -> EOS_W

Bit 3 - End of sequence flag

pub fn ovr(&mut self) -> OVR_W

Bit 4 - ADC overrun

pub fn awd(&mut self) -> AWD_W

Bit 7 - Analog watchdog flag

pub fn eocal(&mut self) -> EOCAL_W

Bit 11 - End Of Calibration flag

impl W<u32, Reg<u32, _IER>>

pub fn adrdyie(&mut self) -> ADRDYIE_W

Bit 0 - ADC ready interrupt enable

pub fn eosmpie(&mut self) -> EOSMPIE_W

Bit 1 - End of sampling flag interrupt enable

pub fn eocie(&mut self) -> EOCIE_W

Bit 2 - End of conversion interrupt enable

pub fn eosie(&mut self) -> EOSIE_W

Bit 3 - End of conversion sequence interrupt enable

pub fn ovrie(&mut self) -> OVRIE_W

Bit 4 - Overrun interrupt enable

pub fn awdie(&mut self) -> AWDIE_W

Bit 7 - Analog watchdog interrupt enable

pub fn eocalie(&mut self) -> EOCALIE_W

Bit 11 - End of calibration interrupt enable

impl W<u32, Reg<u32, _CR>>

pub fn aden(&mut self) -> ADEN_W

Bit 0 - ADC enable command

pub fn addis(&mut self) -> ADDIS_W

Bit 1 - ADC disable command

pub fn adstart(&mut self) -> ADSTART_W

Bit 2 - ADC start conversion command

pub fn adstp(&mut self) -> ADSTP_W

Bit 4 - ADC stop conversion command

pub fn advregen(&mut self) -> ADVREGEN_W

Bit 28 - ADC Voltage Regulator Enable

pub fn adcal(&mut self) -> ADCAL_W

Bit 31 - ADC calibration

impl W<u32, Reg<u32, _CFGR1>>

pub fn awdch(&mut self) -> AWDCH_W

Bits 26:30 - Analog watchdog channel selection

pub fn awden(&mut self) -> AWDEN_W

Bit 23 - Analog watchdog enable

pub fn awdsgl(&mut self) -> AWDSGL_W

Bit 22 - Enable the watchdog on a single channel or on all channels

pub fn discen(&mut self) -> DISCEN_W

Bit 16 - Discontinuous mode

pub fn autoff(&mut self) -> AUTOFF_W

Bit 15 - Auto-off mode

pub fn wait(&mut self) -> WAIT_W

Bit 14 - Auto-delayed conversion mode

pub fn cont(&mut self) -> CONT_W

Bit 13 - Single / continuous conversion mode

pub fn ovrmod(&mut self) -> OVRMOD_W

Bit 12 - Overrun management mode

pub fn exten(&mut self) -> EXTEN_W

Bits 10:11 - External trigger enable and polarity selection

pub fn extsel(&mut self) -> EXTSEL_W

Bits 6:8 - External trigger selection

pub fn align(&mut self) -> ALIGN_W

Bit 5 - Data alignment

pub fn res(&mut self) -> RES_W

Bits 3:4 - Data resolution

pub fn scandir(&mut self) -> SCANDIR_W

Bit 2 - Scan sequence direction

pub fn dmacfg(&mut self) -> DMACFG_W

Bit 1 - Direct memery access configuration

pub fn dmaen(&mut self) -> DMAEN_W

Bit 0 - Direct memory access enable

impl W<u32, Reg<u32, _CFGR2>>

pub fn ovse(&mut self) -> OVSE_W

Bit 0 - Oversampler Enable

pub fn ovsr(&mut self) -> OVSR_W

Bits 2:4 - Oversampling ratio

pub fn ovss(&mut self) -> OVSS_W

Bits 5:8 - Oversampling shift

pub fn tovs(&mut self) -> TOVS_W

Bit 9 - Triggered Oversampling

pub fn ckmode(&mut self) -> CKMODE_W

Bits 30:31 - ADC clock mode

impl W<u32, Reg<u32, _SMPR>>

pub fn smp(&mut self) -> SMP_W

Bits 0:2 - Sampling time selection

impl W<u32, Reg<u32, _TR>>

pub fn ht(&mut self) -> HT_W

Bits 16:27 - Analog watchdog higher threshold

pub fn lt(&mut self) -> LT_W

Bits 0:11 - Analog watchdog lower threshold

impl W<u32, Reg<u32, _CHSELR>>

pub fn chsel18(&mut self) -> CHSEL18_W

Bit 18 - Channel-x selection

pub fn chsel17(&mut self) -> CHSEL17_W

Bit 17 - Channel-x selection

pub fn chsel16(&mut self) -> CHSEL16_W

Bit 16 - Channel-x selection

pub fn chsel15(&mut self) -> CHSEL15_W

Bit 15 - Channel-x selection

pub fn chsel14(&mut self) -> CHSEL14_W

Bit 14 - Channel-x selection

pub fn chsel13(&mut self) -> CHSEL13_W

Bit 13 - Channel-x selection

pub fn chsel12(&mut self) -> CHSEL12_W

Bit 12 - Channel-x selection

pub fn chsel11(&mut self) -> CHSEL11_W

Bit 11 - Channel-x selection

pub fn chsel10(&mut self) -> CHSEL10_W

Bit 10 - Channel-x selection

pub fn chsel9(&mut self) -> CHSEL9_W

Bit 9 - Channel-x selection

pub fn chsel8(&mut self) -> CHSEL8_W

Bit 8 - Channel-x selection

pub fn chsel7(&mut self) -> CHSEL7_W

Bit 7 - Channel-x selection

pub fn chsel6(&mut self) -> CHSEL6_W

Bit 6 - Channel-x selection

pub fn chsel5(&mut self) -> CHSEL5_W

Bit 5 - Channel-x selection

pub fn chsel4(&mut self) -> CHSEL4_W

Bit 4 - Channel-x selection

pub fn chsel3(&mut self) -> CHSEL3_W

Bit 3 - Channel-x selection

pub fn chsel2(&mut self) -> CHSEL2_W

Bit 2 - Channel-x selection

pub fn chsel1(&mut self) -> CHSEL1_W

Bit 1 - Channel-x selection

pub fn chsel0(&mut self) -> CHSEL0_W

Bit 0 - Channel-x selection

impl W<u32, Reg<u32, _CALFACT>>

pub fn calfact(&mut self) -> CALFACT_W

Bits 0:6 - Calibration factor

impl W<u32, Reg<u32, _CCR>>

pub fn presc(&mut self) -> PRESC_W

Bits 18:21 - ADC prescaler

pub fn vrefen(&mut self) -> VREFEN_W

Bit 22 - VREFINT enable

pub fn tsen(&mut self) -> TSEN_W

Bit 23 - Temperature sensor enable

pub fn lfmen(&mut self) -> LFMEN_W

Bit 25 - Low Frequency Mode enable

impl W<u32, Reg<u32, _CR>>

pub fn dbg_stop(&mut self) -> DBG_STOP_W

Bit 1 - Debug Stop Mode

pub fn dbg_standby(&mut self) -> DBG_STANDBY_W

Bit 2 - Debug Standby Mode

pub fn dbg_sleep(&mut self) -> DBG_SLEEP_W

Bit 0 - Debug Sleep Mode

impl W<u32, Reg<u32, _APB1_FZ>>

pub fn dbg_timer2_stop(&mut self) -> DBG_TIMER2_STOP_W

Bit 0 - Debug Timer 2 stopped when Core is halted

pub fn dbg_timer6_stop(&mut self) -> DBG_TIMER6_STOP_W

Bit 4 - Debug Timer 6 stopped when Core is halted

pub fn dbg_rtc_stop(&mut self) -> DBG_RTC_STOP_W

Bit 10 - Debug RTC stopped when Core is halted

pub fn dbg_wwdg_stop(&mut self) -> DBG_WWDG_STOP_W

Bit 11 - Debug Window Wachdog stopped when Core is halted

pub fn dbg_iwdg_stop(&mut self) -> DBG_IWDG_STOP_W

Bit 12 - Debug Independent Wachdog stopped when Core is halted

pub fn dbg_i2c1_stop(&mut self) -> DBG_I2C1_STOP_W

Bit 21 - I2C1 SMBUS timeout mode stopped when core is halted

pub fn dbg_i2c2_stop(&mut self) -> DBG_I2C2_STOP_W

Bit 22 - I2C2 SMBUS timeout mode stopped when core is halted

pub fn dbg_lptimer_stop(&mut self) -> DBG_LPTIMER_STOP_W

Bit 31 - LPTIM1 counter stopped when core is halted

impl W<u32, Reg<u32, _APB2_FZ>>

pub fn dbg_timer21_stop(&mut self) -> DBG_TIMER21_STOP_W

Bit 2 - Debug Timer 21 stopped when Core is halted

pub fn dbg_timer22_sto(&mut self) -> DBG_TIMER22_STO_W

Bit 6 - Debug Timer 22 stopped when Core is halted

impl W<u32, Reg<u32, _CR1>>

pub fn ckd(&mut self) -> CKD_W

Bits 8:9 - Clock division

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn cms(&mut self) -> CMS_W

Bits 5:6 - Center-aligned mode selection

pub fn dir(&mut self) -> DIR_W

Bit 4 - Direction

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

impl W<u32, Reg<u32, _CR2>>

pub fn ti1s(&mut self) -> TI1S_W

Bit 7 - TI1 selection

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

pub fn ccds(&mut self) -> CCDS_W

Bit 3 - Capture/compare DMA selection

impl W<u32, Reg<u32, _SMCR>>

pub fn etp(&mut self) -> ETP_W

Bit 15 - External trigger polarity

pub fn ece(&mut self) -> ECE_W

Bit 14 - External clock enable

pub fn etps(&mut self) -> ETPS_W

Bits 12:13 - External trigger prescaler

pub fn etf(&mut self) -> ETF_W

Bits 8:11 - External trigger filter

pub fn msm(&mut self) -> MSM_W

Bit 7 - Master/Slave mode

pub fn ts(&mut self) -> TS_W

Bits 4:6 - Trigger selection

pub fn sms(&mut self) -> SMS_W

Bits 0:2 - Slave mode selection

impl W<u32, Reg<u32, _DIER>>

pub fn tde(&mut self) -> TDE_W

Bit 14 - Trigger DMA request enable

pub fn cc4de(&mut self) -> CC4DE_W

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&mut self) -> CC3DE_W

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&mut self) -> CC2DE_W

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&mut self) -> CC1DE_W

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&mut self) -> UDE_W

Bit 8 - Update DMA request enable

pub fn tie(&mut self) -> TIE_W

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&mut self) -> CC4IE_W

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&mut self) -> CC3IE_W

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn cc4of(&mut self) -> CC4OF_W

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&mut self) -> CC3OF_W

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&mut self) -> CC2OF_W

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W

Bit 6 - Trigger interrupt flag

pub fn cc4if(&mut self) -> CC4IF_W

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&mut self) -> CC3IF_W

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn tg(&mut self) -> TG_W

Bit 6 - Trigger generation

pub fn cc4g(&mut self) -> CC4G_W

Bit 4 - Capture/compare 4 generation

pub fn cc3g(&mut self) -> CC3G_W

Bit 3 - Capture/compare 3 generation

pub fn cc2g(&mut self) -> CC2G_W

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>

pub fn oc2ce(&mut self) -> OC2CE_W

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&mut self) -> OC2M_W

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&mut self) -> OC1CE_W

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&mut self) -> OC1M_W

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>

pub fn ic2f(&mut self) -> IC2F_W

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR2_OUTPUT>>

pub fn oc4ce(&mut self) -> OC4CE_W

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&mut self) -> OC4M_W

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&mut self) -> OC4PE_W

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&mut self) -> OC4FE_W

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&mut self) -> CC4S_W

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&mut self) -> OC3CE_W

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&mut self) -> OC3M_W

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&mut self) -> OC3PE_W

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&mut self) -> OC3FE_W

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&mut self) -> CC3S_W

Bits 0:1 - Capture/Compare 3 selection

impl W<u32, Reg<u32, _CCMR2_INPUT>>

pub fn ic4f(&mut self) -> IC4F_W

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&mut self) -> IC4PSC_W

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&mut self) -> CC4S_W

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&mut self) -> IC3F_W

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&mut self) -> IC3PSC_W

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&mut self) -> CC3S_W

Bits 0:1 - Capture/Compare 3 selection

impl W<u32, Reg<u32, _CCER>>

pub fn cc4np(&mut self) -> CC4NP_W

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc4p(&mut self) -> CC4P_W

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&mut self) -> CC4E_W

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&mut self) -> CC3NP_W

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3p(&mut self) -> CC3P_W

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&mut self) -> CC3E_W

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&mut self) -> CC2NP_W

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _DCR>>

pub fn dbl(&mut self) -> DBL_W

Bits 8:12 - DMA burst length

pub fn dba(&mut self) -> DBA_W

Bits 0:4 - DMA base address

impl W<u32, Reg<u32, _DMAR>>

pub fn dmab(&mut self) -> DMAB_W

Bits 0:15 - DMA register for burst accesses

impl W<u32, Reg<u32, _OR>>

pub fn etr_rmp(&mut self) -> ETR_RMP_W

Bits 0:2 - Timer2 ETR remap

pub fn ti4_rmp(&mut self) -> TI4_RMP_W

Bits 3:4 - Internal trigger

impl W<u16, Reg<u16, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - Low counter value

impl W<u16, Reg<u16, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Low Auto-reload value

impl W<u16, Reg<u16, _CCR>>

pub fn ccr(&mut self) -> CCR_W

Bits 0:15 - Low Capture/Compare 1 value

impl W<u32, Reg<u32, _CR1>>

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

impl W<u32, Reg<u32, _CR2>>

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

impl W<u32, Reg<u32, _DIER>>

pub fn ude(&mut self) -> UDE_W

Bit 8 - Update DMA request enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - Low counter value

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Low Auto-reload value

impl W<u32, Reg<u32, _CR1>>

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn dir(&mut self) -> DIR_W

Bit 4 - Direction

pub fn cms(&mut self) -> CMS_W

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn ckd(&mut self) -> CKD_W

Bits 8:9 - Clock division

impl W<u32, Reg<u32, _CR2>>

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

impl W<u32, Reg<u32, _SMCR>>

pub fn sms(&mut self) -> SMS_W

Bits 0:2 - Slave mode selection

pub fn ts(&mut self) -> TS_W

Bits 4:6 - Trigger selection

pub fn msm(&mut self) -> MSM_W

Bit 7 - Master/Slave mode

pub fn etf(&mut self) -> ETF_W

Bits 8:11 - External trigger filter

pub fn etps(&mut self) -> ETPS_W

Bits 12:13 - External trigger prescaler

pub fn ece(&mut self) -> ECE_W

Bit 14 - External clock enable

pub fn etp(&mut self) -> ETP_W

Bit 15 - External trigger polarity

impl W<u32, Reg<u32, _DIER>>

pub fn tie(&mut self) -> TIE_W

Bit 6 - Trigger interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn cc2of(&mut self) -> CC2OF_W

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W

Bit 6 - Trigger interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn tg(&mut self) -> TG_W

Bit 6 - Trigger generation

pub fn cc2g(&mut self) -> CC2G_W

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>

pub fn oc2m(&mut self) -> OC2M_W

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1m(&mut self) -> OC1M_W

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>

pub fn ic2f(&mut self) -> IC2F_W

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCER>>

pub fn cc2np(&mut self) -> CC2NP_W

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - counter value

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Auto-reload value

impl W<u32, Reg<u32, _CCR>>

pub fn ccr(&mut self) -> CCR_W

Bits 0:15 - Capture/Compare 1 value

impl W<u32, Reg<u32, _OR>>

pub fn etr_rmp(&mut self) -> ETR_RMP_W

Bits 0:1 - Timer21 ETR remap

pub fn ti1_rmp(&mut self) -> TI1_RMP_W

Bits 2:4 - Timer21 TI1

pub fn ti2_rmp(&mut self) -> TI2_RMP_W

Bit 5 - Timer21 TI2

impl W<u32, Reg<u32, _CR1>>

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn dir(&mut self) -> DIR_W

Bit 4 - Direction

pub fn cms(&mut self) -> CMS_W

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn ckd(&mut self) -> CKD_W

Bits 8:9 - Clock division

impl W<u32, Reg<u32, _CR2>>

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

impl W<u32, Reg<u32, _SMCR>>

pub fn sms(&mut self) -> SMS_W

Bits 0:2 - Slave mode selection

pub fn ts(&mut self) -> TS_W

Bits 4:6 - Trigger selection

pub fn msm(&mut self) -> MSM_W

Bit 7 - Master/Slave mode

pub fn etf(&mut self) -> ETF_W

Bits 8:11 - External trigger filter

pub fn etps(&mut self) -> ETPS_W

Bits 12:13 - External trigger prescaler

pub fn ece(&mut self) -> ECE_W

Bit 14 - External clock enable

pub fn etp(&mut self) -> ETP_W

Bit 15 - External trigger polarity

impl W<u32, Reg<u32, _DIER>>

pub fn tie(&mut self) -> TIE_W

Bit 6 - Trigger interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn cc2of(&mut self) -> CC2OF_W

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W

Bit 6 - Trigger interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn tg(&mut self) -> TG_W

Bit 6 - Trigger generation

pub fn cc2g(&mut self) -> CC2G_W

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>

pub fn oc2m(&mut self) -> OC2M_W

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1m(&mut self) -> OC1M_W

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>

pub fn ic2f(&mut self) -> IC2F_W

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCER>>

pub fn cc2np(&mut self) -> CC2NP_W

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - counter value

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Auto-reload value

impl W<u32, Reg<u32, _CCR>>

pub fn ccr(&mut self) -> CCR_W

Bits 0:15 - Capture/Compare 1 value

impl W<u32, Reg<u32, _OR>>

pub fn etr_rmp(&mut self) -> ETR_RMP_W

Bits 0:1 - Timer22 ETR remap

pub fn ti1_rmp(&mut self) -> TI1_RMP_W

Bits 2:3 - Timer22 TI1

impl W<u32, Reg<u32, _CR1>>

pub fn m1(&mut self) -> M1_W

Bit 28 - Word length

pub fn cmie(&mut self) -> CMIE_W

Bit 14 - Character match interrupt enable

pub fn mme(&mut self) -> MME_W

Bit 13 - Mute mode enable

pub fn m0(&mut self) -> M0_W

Bit 12 - Word length

pub fn wake(&mut self) -> WAKE_W

Bit 11 - Receiver wakeup method

pub fn pce(&mut self) -> PCE_W

Bit 10 - Parity control enable

pub fn ps(&mut self) -> PS_W

Bit 9 - Parity selection

pub fn peie(&mut self) -> PEIE_W

Bit 8 - PE interrupt enable

pub fn txeie(&mut self) -> TXEIE_W

Bit 7 - interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W

Bit 5 - RXNE interrupt enable

pub fn idleie(&mut self) -> IDLEIE_W

Bit 4 - IDLE interrupt enable

pub fn te(&mut self) -> TE_W

Bit 3 - Transmitter enable

pub fn re(&mut self) -> RE_W

Bit 2 - Receiver enable

pub fn uesm(&mut self) -> UESM_W

Bit 1 - USART enable in Stop mode

pub fn ue(&mut self) -> UE_W

Bit 0 - USART enable

pub fn deat(&mut self) -> DEAT_W

Bits 21:25 - Driver Enable assertion time

pub fn dedt(&mut self) -> DEDT_W

Bits 16:20 - Driver Enable de-assertion time

impl W<u32, Reg<u32, _CR2>>

pub fn msbfirst(&mut self) -> MSBFIRST_W

Bit 19 - Most significant bit first

pub fn datainv(&mut self) -> DATAINV_W

Bit 18 - Binary data inversion

pub fn txinv(&mut self) -> TXINV_W

Bit 17 - TX pin active level inversion

pub fn rxinv(&mut self) -> RXINV_W

Bit 16 - RX pin active level inversion

pub fn swap(&mut self) -> SWAP_W

Bit 15 - Swap TX/RX pins

pub fn stop(&mut self) -> STOP_W

Bits 12:13 - STOP bits

pub fn clken(&mut self) -> CLKEN_W

Bit 11 - Clock enable

pub fn addm7(&mut self) -> ADDM7_W

Bit 4 - 7-bit Address Detection/4-bit Address Detection

pub fn add(&mut self) -> ADD_W

Bits 24:31 - Address of the USART node

impl W<u32, Reg<u32, _CR3>>

pub fn wufie(&mut self) -> WUFIE_W

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&mut self) -> WUS_W

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn dep(&mut self) -> DEP_W

Bit 15 - Driver enable polarity selection

pub fn dem(&mut self) -> DEM_W

Bit 14 - Driver enable mode

pub fn ddre(&mut self) -> DDRE_W

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&mut self) -> OVRDIS_W

Bit 12 - Overrun Disable

pub fn ctsie(&mut self) -> CTSIE_W

Bit 10 - CTS interrupt enable

pub fn ctse(&mut self) -> CTSE_W

Bit 9 - CTS enable

pub fn rtse(&mut self) -> RTSE_W

Bit 8 - RTS enable

pub fn dmat(&mut self) -> DMAT_W

Bit 7 - DMA enable transmitter

pub fn dmar(&mut self) -> DMAR_W

Bit 6 - DMA enable receiver

pub fn hdsel(&mut self) -> HDSEL_W

Bit 3 - Half-duplex selection

pub fn eie(&mut self) -> EIE_W

Bit 0 - Error interrupt enable

impl W<u32, Reg<u32, _BRR>>

pub fn brr(&mut self) -> BRR_W

Bits 0:19 - BRR

impl W<u32, Reg<u32, _RQR>>

pub fn rxfrq(&mut self) -> RXFRQ_W

Bit 3 - Receive data flush request

pub fn mmrq(&mut self) -> MMRQ_W

Bit 2 - Mute mode request

pub fn sbkrq(&mut self) -> SBKRQ_W

Bit 1 - Send break request

impl W<u32, Reg<u32, _ICR>>

pub fn wucf(&mut self) -> WUCF_W

Bit 20 - Wakeup from Stop mode clear flag

pub fn cmcf(&mut self) -> CMCF_W

Bit 17 - Character match clear flag

pub fn ctscf(&mut self) -> CTSCF_W

Bit 9 - CTS clear flag

pub fn tccf(&mut self) -> TCCF_W

Bit 6 - Transmission complete clear flag

pub fn idlecf(&mut self) -> IDLECF_W

Bit 4 - Idle line detected clear flag

pub fn orecf(&mut self) -> ORECF_W

Bit 3 - Overrun error clear flag

pub fn ncf(&mut self) -> NCF_W

Bit 2 - Noise detected clear flag

pub fn fecf(&mut self) -> FECF_W

Bit 1 - Framing error clear flag

pub fn pecf(&mut self) -> PECF_W

Bit 0 - Parity error clear flag

impl W<u32, Reg<u32, _TDR>>

pub fn tdr(&mut self) -> TDR_W

Bits 0:8 - Transmit data value

impl W<u32, Reg<u32, _CSR>>

pub fn enable(&mut self) -> ENABLE_W

Bit 0 - Counter enable

pub fn tickint(&mut self) -> TICKINT_W

Bit 1 - SysTick exception request enable

pub fn clksource(&mut self) -> CLKSOURCE_W

Bit 2 - Clock source selection

pub fn countflag(&mut self) -> COUNTFLAG_W

Bit 16 - COUNTFLAG

impl W<u32, Reg<u32, _RVR>>

pub fn reload(&mut self) -> RELOAD_W

Bits 0:23 - RELOAD value

impl W<u32, Reg<u32, _CVR>>

pub fn current(&mut self) -> CURRENT_W

Bits 0:23 - Current counter value

impl W<u32, Reg<u32, _CALIB>>

pub fn tenms(&mut self) -> TENMS_W

Bits 0:23 - Calibration value

pub fn skew(&mut self) -> SKEW_W

Bit 30 - SKEW flag: Indicates whether the TENMS value is exact

pub fn noref(&mut self) -> NOREF_W

Bit 31 - NOREF flag. Reads as zero

impl W<u32, Reg<u32, _CR>>

pub fn dmaouten(&mut self) -> DMAOUTEN_W

Bit 12 - Enable DMA management of data output phase

pub fn dmainen(&mut self) -> DMAINEN_W

Bit 11 - Enable DMA management of data input phase

pub fn errie(&mut self) -> ERRIE_W

Bit 10 - Error interrupt enable

pub fn ccfie(&mut self) -> CCFIE_W

Bit 9 - CCF flag interrupt enable

pub fn errc(&mut self) -> ERRC_W

Bit 8 - Error clear

pub fn ccfc(&mut self) -> CCFC_W

Bit 7 - Computation Complete Flag Clear

pub fn chmod(&mut self) -> CHMOD_W

Bits 5:6 - AES chaining mode

pub fn mode(&mut self) -> MODE_W

Bits 3:4 - AES operating mode

pub fn datatype(&mut self) -> DATATYPE_W

Bits 1:2 - Data type selection (for data in and data out to/from the cryptographic block)

pub fn en(&mut self) -> EN_W

Bit 0 - AES enable

impl W<u32, Reg<u32, _DINR>>

pub fn din(&mut self) -> DIN_W

Bits 0:31 - Data Input Register.

impl W<u32, Reg<u32, _KEYR0>>

pub fn key0(&mut self) -> KEY0_W

Bits 0:31 - Data Output Register (LSB key [31:0])

impl W<u32, Reg<u32, _KEYR1>>

pub fn key1(&mut self) -> KEY1_W

Bits 0:31 - AES key register (key [63:32])

impl W<u32, Reg<u32, _KEYR2>>

pub fn key2(&mut self) -> KEY2_W

Bits 0:31 - AES key register (key [95:64])

impl W<u32, Reg<u32, _KEYR3>>

pub fn key3(&mut self) -> KEY3_W

Bits 0:31 - AES key register (MSB key [127:96])

impl W<u32, Reg<u32, _IVR0>>

pub fn iv0(&mut self) -> IV0_W

Bits 0:31 - initialization vector register (LSB IVR [31:0])

impl W<u32, Reg<u32, _IVR1>>

pub fn iv1(&mut self) -> IV1_W

Bits 0:31 - Initialization Vector Register (IVR [63:32])

impl W<u32, Reg<u32, _IVR2>>

pub fn iv2(&mut self) -> IV2_W

Bits 0:31 - Initialization Vector Register (IVR [95:64])

impl W<u32, Reg<u32, _IVR3>>

pub fn iv3(&mut self) -> IV3_W

Bits 0:31 - Initialization Vector Register (MSB IVR [127:96])

impl W<u32, Reg<u32, _CR>>

pub fn dmaudrie1(&mut self) -> DMAUDRIE1_W

Bit 13 - DAC channel1 DMA Underrun Interrupt enable

pub fn dmaen1(&mut self) -> DMAEN1_W

Bit 12 - DAC channel1 DMA enable

pub fn mamp1(&mut self) -> MAMP1_W

Bits 8:11 - DAC channel1 mask/amplitude selector

pub fn wave1(&mut self) -> WAVE1_W

Bits 6:7 - DAC channel1 noise/triangle wave generation enable

pub fn tsel1(&mut self) -> TSEL1_W

Bits 3:5 - DAC channel1 trigger selection

pub fn ten1(&mut self) -> TEN1_W

Bit 2 - DAC channel1 trigger enable

pub fn boff1(&mut self) -> BOFF1_W

Bit 1 - DAC channel1 output buffer disable

pub fn en1(&mut self) -> EN1_W

Bit 0 - DAC channel1 enable

impl W<u32, Reg<u32, _SWTRIGR>>

pub fn swtrig1(&mut self) -> SWTRIG1_W

Bit 0 - DAC channel1 software trigger

impl W<u32, Reg<u32, _DHR12R1>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 0:11 - DAC channel1 12-bit right-aligned data

impl W<u32, Reg<u32, _DHR12L1>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 4:15 - DAC channel1 12-bit left-aligned data

impl W<u32, Reg<u32, _DHR8R1>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 0:7 - DAC channel1 8-bit right-aligned data

impl W<u32, Reg<u32, _SR>>

pub fn dmaudr1(&mut self) -> DMAUDR1_W

Bit 13 - DAC channel1 DMA underrun flag

impl W<u32, Reg<u32, _DHR12R2>>

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 0:11 - DAC channel2 12-bit right-aligned data

impl W<u32, Reg<u32, _DHR12L2>>

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 4:15 - DAC channel2 12-bit left-aligned data

impl W<u32, Reg<u32, _DHR8R2>>

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 0:7 - DAC channel2 8-bit right-aligned data

impl W<u32, Reg<u32, _DHR12RD>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 0:11 - DAC channel1 12-bit right-aligned data

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 16:27 - DAC channel2 12-bit right-aligned data

impl W<u32, Reg<u32, _DHR12LD>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 4:15 - DAC channel1 12-bit left-aligned data

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 20:31 - DAC channel2 12-bit left-aligned data

impl W<u32, Reg<u32, _DHR8RD>>

pub fn dacc1dhr(&mut self) -> DACC1DHR_W

Bits 0:7 - DAC channel1 8-bit right-aligned data

pub fn dacc2dhr(&mut self) -> DACC2DHR_W

Bits 8:15 - DAC channel2 8-bit right-aligned data

impl W<u32, Reg<u32, _CR>>

pub fn mem2mem(&mut self) -> MEM2MEM_W

Bit 14 - Memory to memory mode

pub fn pl(&mut self) -> PL_W

Bits 12:13 - Channel priority level

pub fn msize(&mut self) -> MSIZE_W

Bits 10:11 - Memory size

pub fn psize(&mut self) -> PSIZE_W

Bits 8:9 - Peripheral size

pub fn minc(&mut self) -> MINC_W

Bit 7 - Memory increment mode

pub fn pinc(&mut self) -> PINC_W

Bit 6 - Peripheral increment mode

pub fn circ(&mut self) -> CIRC_W

Bit 5 - Circular mode

pub fn dir(&mut self) -> DIR_W

Bit 4 - Data transfer direction

pub fn teie(&mut self) -> TEIE_W

Bit 3 - Transfer error interrupt enable

pub fn htie(&mut self) -> HTIE_W

Bit 2 - Half transfer interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 1 - Transfer complete interrupt enable

pub fn en(&mut self) -> EN_W

Bit 0 - Channel enable

impl W<u32, Reg<u32, _NDTR>>

pub fn ndt(&mut self) -> NDT_W

Bits 0:15 - Number of data to transfer

impl W<u32, Reg<u32, _PAR>>

pub fn pa(&mut self) -> PA_W

Bits 0:31 - Peripheral address

impl W<u32, Reg<u32, _MAR>>

pub fn ma(&mut self) -> MA_W

Bits 0:31 - Memory address

impl W<u32, Reg<u32, _IFCR>>

pub fn cteif7(&mut self) -> CTEIF7_W

Bit 27 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif7(&mut self) -> CHTIF7_W

Bit 26 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif7(&mut self) -> CTCIF7_W

Bit 25 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif7(&mut self) -> CGIF7_W

Bit 24 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif6(&mut self) -> CTEIF6_W

Bit 23 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif6(&mut self) -> CHTIF6_W

Bit 22 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif6(&mut self) -> CTCIF6_W

Bit 21 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif6(&mut self) -> CGIF6_W

Bit 20 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif5(&mut self) -> CTEIF5_W

Bit 19 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif5(&mut self) -> CHTIF5_W

Bit 18 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif5(&mut self) -> CTCIF5_W

Bit 17 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif5(&mut self) -> CGIF5_W

Bit 16 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif4(&mut self) -> CTEIF4_W

Bit 15 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif4(&mut self) -> CHTIF4_W

Bit 14 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif4(&mut self) -> CTCIF4_W

Bit 13 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif4(&mut self) -> CGIF4_W

Bit 12 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif3(&mut self) -> CTEIF3_W

Bit 11 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif3(&mut self) -> CHTIF3_W

Bit 10 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif3(&mut self) -> CTCIF3_W

Bit 9 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif3(&mut self) -> CGIF3_W

Bit 8 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif2(&mut self) -> CTEIF2_W

Bit 7 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif2(&mut self) -> CHTIF2_W

Bit 6 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif2(&mut self) -> CTCIF2_W

Bit 5 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif2(&mut self) -> CGIF2_W

Bit 4 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif1(&mut self) -> CTEIF1_W

Bit 3 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif1(&mut self) -> CHTIF1_W

Bit 2 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif1(&mut self) -> CTCIF1_W

Bit 1 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif1(&mut self) -> CGIF1_W

Bit 0 - Channel x global interrupt clear (x = 1 ..7)

impl W<u32, Reg<u32, _CSELR>>

pub fn c7s(&mut self) -> C7S_W

Bits 24:27 - DMA channel 7 selection

pub fn c6s(&mut self) -> C6S_W

Bits 20:23 - DMA channel 6 selection

pub fn c5s(&mut self) -> C5S_W

Bits 16:19 - DMA channel 5 selection

pub fn c4s(&mut self) -> C4S_W

Bits 12:15 - DMA channel 4 selection

pub fn c3s(&mut self) -> C3S_W

Bits 8:11 - DMA channel 3 selection

pub fn c2s(&mut self) -> C2S_W

Bits 4:7 - DMA channel 2 selection

pub fn c1s(&mut self) -> C1S_W

Bits 0:3 - DMA channel 1 selection

impl W<u32, Reg<u32, _DR>>

pub fn dr(&mut self) -> DR_W

Bits 0:31 - Data register bits

impl W<u32, Reg<u32, _IDR>>

pub fn idr(&mut self) -> IDR_W

Bits 0:7 - General-purpose 8-bit data register bits

impl W<u32, Reg<u32, _CR>>

pub fn rev_out(&mut self) -> REV_OUT_W

Bit 7 - Reverse output data

pub fn rev_in(&mut self) -> REV_IN_W

Bits 5:6 - Reverse input data

pub fn polysize(&mut self) -> POLYSIZE_W

Bits 3:4 - Polynomial size

pub fn reset(&mut self) -> RESET_W

Bit 0 - RESET bit

impl W<u32, Reg<u32, _INIT>>

pub fn crc_init(&mut self) -> CRC_INIT_W

Bits 0:31 - Programmable initial CRC value

impl W<u32, Reg<u32, _POL>>

pub fn pol(&mut self) -> POL_W

Bits 0:31 - Programmable polynomial

impl W<u32, Reg<u32, _MODER>>

pub fn mode0(&mut self) -> MODE0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

pub fn mode1(&mut self) -> MODE1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn mode2(&mut self) -> MODE2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn mode3(&mut self) -> MODE3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn mode4(&mut self) -> MODE4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn mode5(&mut self) -> MODE5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn mode6(&mut self) -> MODE6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn mode7(&mut self) -> MODE7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn mode8(&mut self) -> MODE8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn mode9(&mut self) -> MODE9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn mode10(&mut self) -> MODE10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn mode11(&mut self) -> MODE11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn mode12(&mut self) -> MODE12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn mode13(&mut self) -> MODE13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn mode14(&mut self) -> MODE14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn mode15(&mut self) -> MODE15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OTYPER>>

pub fn ot15(&mut self) -> OT15_W

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&mut self) -> OT14_W

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&mut self) -> OT13_W

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&mut self) -> OT12_W

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&mut self) -> OT11_W

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&mut self) -> OT10_W

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&mut self) -> OT9_W

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&mut self) -> OT8_W

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&mut self) -> OT7_W

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&mut self) -> OT6_W

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&mut self) -> OT5_W

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&mut self) -> OT4_W

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&mut self) -> OT3_W

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&mut self) -> OT2_W

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&mut self) -> OT1_W

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&mut self) -> OT0_W

Bit 0 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OSPEEDR>>

pub fn ospeed15(&mut self) -> OSPEED15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeed14(&mut self) -> OSPEED14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeed13(&mut self) -> OSPEED13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeed12(&mut self) -> OSPEED12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeed11(&mut self) -> OSPEED11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeed10(&mut self) -> OSPEED10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeed9(&mut self) -> OSPEED9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeed8(&mut self) -> OSPEED8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeed7(&mut self) -> OSPEED7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeed6(&mut self) -> OSPEED6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeed5(&mut self) -> OSPEED5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeed4(&mut self) -> OSPEED4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeed3(&mut self) -> OSPEED3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeed2(&mut self) -> OSPEED2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeed1(&mut self) -> OSPEED1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeed0(&mut self) -> OSPEED0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _PUPDR>>

pub fn pupd15(&mut self) -> PUPD15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupd14(&mut self) -> PUPD14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupd13(&mut self) -> PUPD13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupd12(&mut self) -> PUPD12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupd11(&mut self) -> PUPD11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupd10(&mut self) -> PUPD10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupd9(&mut self) -> PUPD9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupd8(&mut self) -> PUPD8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupd7(&mut self) -> PUPD7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupd6(&mut self) -> PUPD6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupd5(&mut self) -> PUPD5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupd4(&mut self) -> PUPD4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupd3(&mut self) -> PUPD3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupd2(&mut self) -> PUPD2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupd1(&mut self) -> PUPD1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupd0(&mut self) -> PUPD0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _ODR>>

pub fn od15(&mut self) -> OD15_W

Bit 15 - Port output data bit (y = 0..15)

pub fn od14(&mut self) -> OD14_W

Bit 14 - Port output data bit (y = 0..15)

pub fn od13(&mut self) -> OD13_W

Bit 13 - Port output data bit (y = 0..15)

pub fn od12(&mut self) -> OD12_W

Bit 12 - Port output data bit (y = 0..15)

pub fn od11(&mut self) -> OD11_W

Bit 11 - Port output data bit (y = 0..15)

pub fn od10(&mut self) -> OD10_W

Bit 10 - Port output data bit (y = 0..15)

pub fn od9(&mut self) -> OD9_W

Bit 9 - Port output data bit (y = 0..15)

pub fn od8(&mut self) -> OD8_W

Bit 8 - Port output data bit (y = 0..15)

pub fn od7(&mut self) -> OD7_W

Bit 7 - Port output data bit (y = 0..15)

pub fn od6(&mut self) -> OD6_W

Bit 6 - Port output data bit (y = 0..15)

pub fn od5(&mut self) -> OD5_W

Bit 5 - Port output data bit (y = 0..15)

pub fn od4(&mut self) -> OD4_W

Bit 4 - Port output data bit (y = 0..15)

pub fn od3(&mut self) -> OD3_W

Bit 3 - Port output data bit (y = 0..15)

pub fn od2(&mut self) -> OD2_W

Bit 2 - Port output data bit (y = 0..15)

pub fn od1(&mut self) -> OD1_W

Bit 1 - Port output data bit (y = 0..15)

pub fn od0(&mut self) -> OD0_W

Bit 0 - Port output data bit (y = 0..15)

impl W<u32, Reg<u32, _BSRR>>

pub fn br15(&mut self) -> BR15_W

Bit 31 - Port x reset bit y (y = 0..15)

pub fn br14(&mut self) -> BR14_W

Bit 30 - Port x reset bit y (y = 0..15)

pub fn br13(&mut self) -> BR13_W

Bit 29 - Port x reset bit y (y = 0..15)

pub fn br12(&mut self) -> BR12_W

Bit 28 - Port x reset bit y (y = 0..15)

pub fn br11(&mut self) -> BR11_W

Bit 27 - Port x reset bit y (y = 0..15)

pub fn br10(&mut self) -> BR10_W

Bit 26 - Port x reset bit y (y = 0..15)

pub fn br9(&mut self) -> BR9_W

Bit 25 - Port x reset bit y (y = 0..15)

pub fn br8(&mut self) -> BR8_W

Bit 24 - Port x reset bit y (y = 0..15)

pub fn br7(&mut self) -> BR7_W

Bit 23 - Port x reset bit y (y = 0..15)

pub fn br6(&mut self) -> BR6_W

Bit 22 - Port x reset bit y (y = 0..15)

pub fn br5(&mut self) -> BR5_W

Bit 21 - Port x reset bit y (y = 0..15)

pub fn br4(&mut self) -> BR4_W

Bit 20 - Port x reset bit y (y = 0..15)

pub fn br3(&mut self) -> BR3_W

Bit 19 - Port x reset bit y (y = 0..15)

pub fn br2(&mut self) -> BR2_W

Bit 18 - Port x reset bit y (y = 0..15)

pub fn br1(&mut self) -> BR1_W

Bit 17 - Port x reset bit y (y = 0..15)

pub fn br0(&mut self) -> BR0_W

Bit 16 - Port x reset bit y (y = 0..15)

pub fn bs15(&mut self) -> BS15_W

Bit 15 - Port x set bit y (y= 0..15)

pub fn bs14(&mut self) -> BS14_W

Bit 14 - Port x set bit y (y= 0..15)

pub fn bs13(&mut self) -> BS13_W

Bit 13 - Port x set bit y (y= 0..15)

pub fn bs12(&mut self) -> BS12_W

Bit 12 - Port x set bit y (y= 0..15)

pub fn bs11(&mut self) -> BS11_W

Bit 11 - Port x set bit y (y= 0..15)

pub fn bs10(&mut self) -> BS10_W

Bit 10 - Port x set bit y (y= 0..15)

pub fn bs9(&mut self) -> BS9_W

Bit 9 - Port x set bit y (y= 0..15)

pub fn bs8(&mut self) -> BS8_W

Bit 8 - Port x set bit y (y= 0..15)

pub fn bs7(&mut self) -> BS7_W

Bit 7 - Port x set bit y (y= 0..15)

pub fn bs6(&mut self) -> BS6_W

Bit 6 - Port x set bit y (y= 0..15)

pub fn bs5(&mut self) -> BS5_W

Bit 5 - Port x set bit y (y= 0..15)

pub fn bs4(&mut self) -> BS4_W

Bit 4 - Port x set bit y (y= 0..15)

pub fn bs3(&mut self) -> BS3_W

Bit 3 - Port x set bit y (y= 0..15)

pub fn bs2(&mut self) -> BS2_W

Bit 2 - Port x set bit y (y= 0..15)

pub fn bs1(&mut self) -> BS1_W

Bit 1 - Port x set bit y (y= 0..15)

pub fn bs0(&mut self) -> BS0_W

Bit 0 - Port x set bit y (y= 0..15)

impl W<u32, Reg<u32, _LCKR>>

pub fn lckk(&mut self) -> LCKK_W

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&mut self) -> LCK15_W

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&mut self) -> LCK14_W

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&mut self) -> LCK13_W

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&mut self) -> LCK12_W

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&mut self) -> LCK11_W

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&mut self) -> LCK10_W

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&mut self) -> LCK9_W

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&mut self) -> LCK8_W

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&mut self) -> LCK7_W

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&mut self) -> LCK6_W

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&mut self) -> LCK5_W

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&mut self) -> LCK4_W

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&mut self) -> LCK3_W

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&mut self) -> LCK2_W

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&mut self) -> LCK1_W

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&mut self) -> LCK0_W

Bit 0 - Port x lock bit y (y= 0..15)

impl W<u32, Reg<u32, _AFRL>>

pub fn afsel7(&mut self) -> AFSEL7_W

Bits 28:31 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel6(&mut self) -> AFSEL6_W

Bits 24:27 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel5(&mut self) -> AFSEL5_W

Bits 20:23 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel4(&mut self) -> AFSEL4_W

Bits 16:19 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel3(&mut self) -> AFSEL3_W

Bits 12:15 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel2(&mut self) -> AFSEL2_W

Bits 8:11 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel1(&mut self) -> AFSEL1_W

Bits 4:7 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel0(&mut self) -> AFSEL0_W

Bits 0:3 - Alternate function selection for port x pin y (y = 0..7)

impl W<u32, Reg<u32, _AFRH>>

pub fn afsel15(&mut self) -> AFSEL15_W

Bits 28:31 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel14(&mut self) -> AFSEL14_W

Bits 24:27 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel13(&mut self) -> AFSEL13_W

Bits 20:23 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel12(&mut self) -> AFSEL12_W

Bits 16:19 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel11(&mut self) -> AFSEL11_W

Bits 12:15 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel10(&mut self) -> AFSEL10_W

Bits 8:11 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel9(&mut self) -> AFSEL9_W

Bits 4:7 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel8(&mut self) -> AFSEL8_W

Bits 0:3 - Alternate function selection for port x pin y (y = 8..15)

impl W<u32, Reg<u32, _BRR>>

pub fn br15(&mut self) -> BR15_W

Bit 15 - Port x Reset bit y (y= 0 .. 15)

pub fn br14(&mut self) -> BR14_W

Bit 14 - Port x Reset bit y (y= 0 .. 15)

pub fn br13(&mut self) -> BR13_W

Bit 13 - Port x Reset bit y (y= 0 .. 15)

pub fn br12(&mut self) -> BR12_W

Bit 12 - Port x Reset bit y (y= 0 .. 15)

pub fn br11(&mut self) -> BR11_W

Bit 11 - Port x Reset bit y (y= 0 .. 15)

pub fn br10(&mut self) -> BR10_W

Bit 10 - Port x Reset bit y (y= 0 .. 15)

pub fn br9(&mut self) -> BR9_W

Bit 9 - Port x Reset bit y (y= 0 .. 15)

pub fn br8(&mut self) -> BR8_W

Bit 8 - Port x Reset bit y (y= 0 .. 15)

pub fn br7(&mut self) -> BR7_W

Bit 7 - Port x Reset bit y (y= 0 .. 15)

pub fn br6(&mut self) -> BR6_W

Bit 6 - Port x Reset bit y (y= 0 .. 15)

pub fn br5(&mut self) -> BR5_W

Bit 5 - Port x Reset bit y (y= 0 .. 15)

pub fn br4(&mut self) -> BR4_W

Bit 4 - Port x Reset bit y (y= 0 .. 15)

pub fn br3(&mut self) -> BR3_W

Bit 3 - Port x Reset bit y (y= 0 .. 15)

pub fn br2(&mut self) -> BR2_W

Bit 2 - Port x Reset bit y (y= 0 .. 15)

pub fn br1(&mut self) -> BR1_W

Bit 1 - Port x Reset bit y (y= 0 .. 15)

pub fn br0(&mut self) -> BR0_W

Bit 0 - Port x Reset bit y (y= 0 .. 15)

impl W<u32, Reg<u32, _MODER>>

pub fn mode15(&mut self) -> MODE15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn mode14(&mut self) -> MODE14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn mode13(&mut self) -> MODE13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn mode12(&mut self) -> MODE12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn mode11(&mut self) -> MODE11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn mode10(&mut self) -> MODE10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn mode9(&mut self) -> MODE9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn mode8(&mut self) -> MODE8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn mode7(&mut self) -> MODE7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn mode6(&mut self) -> MODE6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn mode5(&mut self) -> MODE5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn mode4(&mut self) -> MODE4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn mode3(&mut self) -> MODE3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn mode2(&mut self) -> MODE2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn mode1(&mut self) -> MODE1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn mode0(&mut self) -> MODE0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OTYPER>>

pub fn ot15(&mut self) -> OT15_W

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&mut self) -> OT14_W

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&mut self) -> OT13_W

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&mut self) -> OT12_W

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&mut self) -> OT11_W

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&mut self) -> OT10_W

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&mut self) -> OT9_W

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&mut self) -> OT8_W

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&mut self) -> OT7_W

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&mut self) -> OT6_W

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&mut self) -> OT5_W

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&mut self) -> OT4_W

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&mut self) -> OT3_W

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&mut self) -> OT2_W

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&mut self) -> OT1_W

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&mut self) -> OT0_W

Bit 0 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OSPEEDR>>

pub fn ospeed15(&mut self) -> OSPEED15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeed14(&mut self) -> OSPEED14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeed13(&mut self) -> OSPEED13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeed12(&mut self) -> OSPEED12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeed11(&mut self) -> OSPEED11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeed10(&mut self) -> OSPEED10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeed9(&mut self) -> OSPEED9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeed8(&mut self) -> OSPEED8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeed7(&mut self) -> OSPEED7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeed6(&mut self) -> OSPEED6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeed5(&mut self) -> OSPEED5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeed4(&mut self) -> OSPEED4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeed3(&mut self) -> OSPEED3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeed2(&mut self) -> OSPEED2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeed1(&mut self) -> OSPEED1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeed0(&mut self) -> OSPEED0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _PUPDR>>

pub fn pupd15(&mut self) -> PUPD15_W

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupd14(&mut self) -> PUPD14_W

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupd13(&mut self) -> PUPD13_W

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupd12(&mut self) -> PUPD12_W

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupd11(&mut self) -> PUPD11_W

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupd10(&mut self) -> PUPD10_W

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupd9(&mut self) -> PUPD9_W

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupd8(&mut self) -> PUPD8_W

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupd7(&mut self) -> PUPD7_W

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupd6(&mut self) -> PUPD6_W

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupd5(&mut self) -> PUPD5_W

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupd4(&mut self) -> PUPD4_W

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupd3(&mut self) -> PUPD3_W

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupd2(&mut self) -> PUPD2_W

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupd1(&mut self) -> PUPD1_W

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupd0(&mut self) -> PUPD0_W

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _ODR>>

pub fn od15(&mut self) -> OD15_W

Bit 15 - Port output data bit (y = 0..15)

pub fn od14(&mut self) -> OD14_W

Bit 14 - Port output data bit (y = 0..15)

pub fn od13(&mut self) -> OD13_W

Bit 13 - Port output data bit (y = 0..15)

pub fn od12(&mut self) -> OD12_W

Bit 12 - Port output data bit (y = 0..15)

pub fn od11(&mut self) -> OD11_W

Bit 11 - Port output data bit (y = 0..15)

pub fn od10(&mut self) -> OD10_W

Bit 10 - Port output data bit (y = 0..15)

pub fn od9(&mut self) -> OD9_W

Bit 9 - Port output data bit (y = 0..15)

pub fn od8(&mut self) -> OD8_W

Bit 8 - Port output data bit (y = 0..15)

pub fn od7(&mut self) -> OD7_W

Bit 7 - Port output data bit (y = 0..15)

pub fn od6(&mut self) -> OD6_W

Bit 6 - Port output data bit (y = 0..15)

pub fn od5(&mut self) -> OD5_W

Bit 5 - Port output data bit (y = 0..15)

pub fn od4(&mut self) -> OD4_W

Bit 4 - Port output data bit (y = 0..15)

pub fn od3(&mut self) -> OD3_W

Bit 3 - Port output data bit (y = 0..15)

pub fn od2(&mut self) -> OD2_W

Bit 2 - Port output data bit (y = 0..15)

pub fn od1(&mut self) -> OD1_W

Bit 1 - Port output data bit (y = 0..15)

pub fn od0(&mut self) -> OD0_W

Bit 0 - Port output data bit (y = 0..15)

impl W<u32, Reg<u32, _BSRR>>

pub fn br15(&mut self) -> BR15_W

Bit 31 - Port x reset bit y (y = 0..15)

pub fn br14(&mut self) -> BR14_W

Bit 30 - Port x reset bit y (y = 0..15)

pub fn br13(&mut self) -> BR13_W

Bit 29 - Port x reset bit y (y = 0..15)

pub fn br12(&mut self) -> BR12_W

Bit 28 - Port x reset bit y (y = 0..15)

pub fn br11(&mut self) -> BR11_W

Bit 27 - Port x reset bit y (y = 0..15)

pub fn br10(&mut self) -> BR10_W

Bit 26 - Port x reset bit y (y = 0..15)

pub fn br9(&mut self) -> BR9_W

Bit 25 - Port x reset bit y (y = 0..15)

pub fn br8(&mut self) -> BR8_W

Bit 24 - Port x reset bit y (y = 0..15)

pub fn br7(&mut self) -> BR7_W

Bit 23 - Port x reset bit y (y = 0..15)

pub fn br6(&mut self) -> BR6_W

Bit 22 - Port x reset bit y (y = 0..15)

pub fn br5(&mut self) -> BR5_W

Bit 21 - Port x reset bit y (y = 0..15)

pub fn br4(&mut self) -> BR4_W

Bit 20 - Port x reset bit y (y = 0..15)

pub fn br3(&mut self) -> BR3_W

Bit 19 - Port x reset bit y (y = 0..15)

pub fn br2(&mut self) -> BR2_W

Bit 18 - Port x reset bit y (y = 0..15)

pub fn br1(&mut self) -> BR1_W

Bit 17 - Port x reset bit y (y = 0..15)

pub fn br0(&mut self) -> BR0_W

Bit 16 - Port x reset bit y (y = 0..15)

pub fn bs15(&mut self) -> BS15_W

Bit 15 - Port x set bit y (y= 0..15)

pub fn bs14(&mut self) -> BS14_W

Bit 14 - Port x set bit y (y= 0..15)

pub fn bs13(&mut self) -> BS13_W

Bit 13 - Port x set bit y (y= 0..15)

pub fn bs12(&mut self) -> BS12_W

Bit 12 - Port x set bit y (y= 0..15)

pub fn bs11(&mut self) -> BS11_W

Bit 11 - Port x set bit y (y= 0..15)

pub fn bs10(&mut self) -> BS10_W

Bit 10 - Port x set bit y (y= 0..15)

pub fn bs9(&mut self) -> BS9_W

Bit 9 - Port x set bit y (y= 0..15)

pub fn bs8(&mut self) -> BS8_W

Bit 8 - Port x set bit y (y= 0..15)

pub fn bs7(&mut self) -> BS7_W

Bit 7 - Port x set bit y (y= 0..15)

pub fn bs6(&mut self) -> BS6_W

Bit 6 - Port x set bit y (y= 0..15)

pub fn bs5(&mut self) -> BS5_W

Bit 5 - Port x set bit y (y= 0..15)

pub fn bs4(&mut self) -> BS4_W

Bit 4 - Port x set bit y (y= 0..15)

pub fn bs3(&mut self) -> BS3_W

Bit 3 - Port x set bit y (y= 0..15)

pub fn bs2(&mut self) -> BS2_W

Bit 2 - Port x set bit y (y= 0..15)

pub fn bs1(&mut self) -> BS1_W

Bit 1 - Port x set bit y (y= 0..15)

pub fn bs0(&mut self) -> BS0_W

Bit 0 - Port x set bit y (y= 0..15)

impl W<u32, Reg<u32, _LCKR>>

pub fn lckk(&mut self) -> LCKK_W

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&mut self) -> LCK15_W

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&mut self) -> LCK14_W

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&mut self) -> LCK13_W

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&mut self) -> LCK12_W

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&mut self) -> LCK11_W

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&mut self) -> LCK10_W

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&mut self) -> LCK9_W

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&mut self) -> LCK8_W

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&mut self) -> LCK7_W

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&mut self) -> LCK6_W

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&mut self) -> LCK5_W

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&mut self) -> LCK4_W

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&mut self) -> LCK3_W

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&mut self) -> LCK2_W

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&mut self) -> LCK1_W

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&mut self) -> LCK0_W

Bit 0 - Port x lock bit y (y= 0..15)

impl W<u32, Reg<u32, _AFRL>>

pub fn afsel7(&mut self) -> AFSEL7_W

Bits 28:31 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel6(&mut self) -> AFSEL6_W

Bits 24:27 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel5(&mut self) -> AFSEL5_W

Bits 20:23 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel4(&mut self) -> AFSEL4_W

Bits 16:19 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel3(&mut self) -> AFSEL3_W

Bits 12:15 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel2(&mut self) -> AFSEL2_W

Bits 8:11 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel1(&mut self) -> AFSEL1_W

Bits 4:7 - Alternate function selection for port x pin y (y = 0..7)

pub fn afsel0(&mut self) -> AFSEL0_W

Bits 0:3 - Alternate function selection for port x pin y (y = 0..7)

impl W<u32, Reg<u32, _AFRH>>

pub fn afsel15(&mut self) -> AFSEL15_W

Bits 28:31 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel14(&mut self) -> AFSEL14_W

Bits 24:27 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel13(&mut self) -> AFSEL13_W

Bits 20:23 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel12(&mut self) -> AFSEL12_W

Bits 16:19 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel11(&mut self) -> AFSEL11_W

Bits 12:15 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel10(&mut self) -> AFSEL10_W

Bits 8:11 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel9(&mut self) -> AFSEL9_W

Bits 4:7 - Alternate function selection for port x pin y (y = 8..15)

pub fn afsel8(&mut self) -> AFSEL8_W

Bits 0:3 - Alternate function selection for port x pin y (y = 8..15)

impl W<u32, Reg<u32, _BRR>>

pub fn br15(&mut self) -> BR15_W

Bit 15 - Port x Reset bit y (y= 0 .. 15)

pub fn br14(&mut self) -> BR14_W

Bit 14 - Port x Reset bit y (y= 0 .. 15)

pub fn br13(&mut self) -> BR13_W

Bit 13 - Port x Reset bit y (y= 0 .. 15)

pub fn br12(&mut self) -> BR12_W

Bit 12 - Port x Reset bit y (y= 0 .. 15)

pub fn br11(&mut self) -> BR11_W

Bit 11 - Port x Reset bit y (y= 0 .. 15)

pub fn br10(&mut self) -> BR10_W

Bit 10 - Port x Reset bit y (y= 0 .. 15)

pub fn br9(&mut self) -> BR9_W

Bit 9 - Port x Reset bit y (y= 0 .. 15)

pub fn br8(&mut self) -> BR8_W

Bit 8 - Port x Reset bit y (y= 0 .. 15)

pub fn br7(&mut self) -> BR7_W

Bit 7 - Port x Reset bit y (y= 0 .. 15)

pub fn br6(&mut self) -> BR6_W

Bit 6 - Port x Reset bit y (y= 0 .. 15)

pub fn br5(&mut self) -> BR5_W

Bit 5 - Port x Reset bit y (y= 0 .. 15)

pub fn br4(&mut self) -> BR4_W

Bit 4 - Port x Reset bit y (y= 0 .. 15)

pub fn br3(&mut self) -> BR3_W

Bit 3 - Port x Reset bit y (y= 0 .. 15)

pub fn br2(&mut self) -> BR2_W

Bit 2 - Port x Reset bit y (y= 0 .. 15)

pub fn br1(&mut self) -> BR1_W

Bit 1 - Port x Reset bit y (y= 0 .. 15)

pub fn br0(&mut self) -> BR0_W

Bit 0 - Port x Reset bit y (y= 0 .. 15)

impl W<u32, Reg<u32, _ICR>>

pub fn downcf(&mut self) -> DOWNCF_W

Bit 6 - Direction change to down Clear Flag

pub fn upcf(&mut self) -> UPCF_W

Bit 5 - Direction change to UP Clear Flag

pub fn arrokcf(&mut self) -> ARROKCF_W

Bit 4 - Autoreload register update OK Clear Flag

pub fn cmpokcf(&mut self) -> CMPOKCF_W

Bit 3 - Compare register update OK Clear Flag

pub fn exttrigcf(&mut self) -> EXTTRIGCF_W

Bit 2 - External trigger valid edge Clear Flag

pub fn arrmcf(&mut self) -> ARRMCF_W

Bit 1 - Autoreload match Clear Flag

pub fn cmpmcf(&mut self) -> CMPMCF_W

Bit 0 - compare match Clear Flag

impl W<u32, Reg<u32, _IER>>

pub fn downie(&mut self) -> DOWNIE_W

Bit 6 - Direction change to down Interrupt Enable

pub fn upie(&mut self) -> UPIE_W

Bit 5 - Direction change to UP Interrupt Enable

pub fn arrokie(&mut self) -> ARROKIE_W

Bit 4 - Autoreload register update OK Interrupt Enable

pub fn cmpokie(&mut self) -> CMPOKIE_W

Bit 3 - Compare register update OK Interrupt Enable

pub fn exttrigie(&mut self) -> EXTTRIGIE_W

Bit 2 - External trigger valid edge Interrupt Enable

pub fn arrmie(&mut self) -> ARRMIE_W

Bit 1 - Autoreload match Interrupt Enable

pub fn cmpmie(&mut self) -> CMPMIE_W

Bit 0 - Compare match Interrupt Enable

impl W<u32, Reg<u32, _CFGR>>

pub fn enc(&mut self) -> ENC_W

Bit 24 - Encoder mode enable

pub fn countmode(&mut self) -> COUNTMODE_W

Bit 23 - counter mode enabled

pub fn preload(&mut self) -> PRELOAD_W

Bit 22 - Registers update mode

pub fn wavpol(&mut self) -> WAVPOL_W

Bit 21 - Waveform shape polarity

pub fn wave(&mut self) -> WAVE_W

Bit 20 - Waveform shape

pub fn timout(&mut self) -> TIMOUT_W

Bit 19 - Timeout enable

pub fn trigen(&mut self) -> TRIGEN_W

Bits 17:18 - Trigger enable and polarity

pub fn trigsel(&mut self) -> TRIGSEL_W

Bits 13:15 - Trigger selector

pub fn presc(&mut self) -> PRESC_W

Bits 9:11 - Clock prescaler

pub fn trgflt(&mut self) -> TRGFLT_W

Bits 6:7 - Configurable digital filter for trigger

pub fn ckflt(&mut self) -> CKFLT_W

Bits 3:4 - Configurable digital filter for external clock

pub fn ckpol(&mut self) -> CKPOL_W

Bits 1:2 - Clock Polarity

pub fn cksel(&mut self) -> CKSEL_W

Bit 0 - Clock selector

impl W<u32, Reg<u32, _CR>>

pub fn cntstrt(&mut self) -> CNTSTRT_W

Bit 2 - Timer start in continuous mode

pub fn sngstrt(&mut self) -> SNGSTRT_W

Bit 1 - LPTIM start in single mode

pub fn enable(&mut self) -> ENABLE_W

Bit 0 - LPTIM Enable

impl W<u32, Reg<u32, _CMP>>

pub fn cmp(&mut self) -> CMP_W

Bits 0:15 - Compare value.

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Auto reload value.

impl W<u32, Reg<u32, _CR>>

pub fn ie(&mut self) -> IE_W

Bit 3 - Interrupt enable

pub fn rngen(&mut self) -> RNGEN_W

Bit 2 - Random number generator enable

impl W<u32, Reg<u32, _SR>>

pub fn seis(&mut self) -> SEIS_W

Bit 6 - Seed error interrupt status

pub fn ceis(&mut self) -> CEIS_W

Bit 5 - Clock error interrupt status

impl W<u32, Reg<u32, _TR>>

pub fn pm(&mut self) -> PM_W

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W

Bits 20:21 - Hour tens in BCD format

pub fn hu(&mut self) -> HU_W

Bits 16:19 - Hour units in BCD format

pub fn mnt(&mut self) -> MNT_W

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&mut self) -> MNU_W

Bits 8:11 - Minute units in BCD format

pub fn st(&mut self) -> ST_W

Bits 4:6 - Second tens in BCD format

pub fn su(&mut self) -> SU_W

Bits 0:3 - Second units in BCD format

impl W<u32, Reg<u32, _DR>>

pub fn yt(&mut self) -> YT_W

Bits 20:23 - Year tens in BCD format

pub fn yu(&mut self) -> YU_W

Bits 16:19 - Year units in BCD format

pub fn wdu(&mut self) -> WDU_W

Bits 13:15 - Week day units

pub fn mt(&mut self) -> MT_W

Bit 12 - Month tens in BCD format

pub fn mu(&mut self) -> MU_W

Bits 8:11 - Month units in BCD format

pub fn dt(&mut self) -> DT_W

Bits 4:5 - Date tens in BCD format

pub fn du(&mut self) -> DU_W

Bits 0:3 - Date units in BCD format

impl W<u32, Reg<u32, _CR>>

pub fn coe(&mut self) -> COE_W

Bit 23 - Calibration output enable

pub fn osel(&mut self) -> OSEL_W

Bits 21:22 - Output selection

pub fn pol(&mut self) -> POL_W

Bit 20 - Output polarity

pub fn cosel(&mut self) -> COSEL_W

Bit 19 - Calibration output selection

pub fn bkp(&mut self) -> BKP_W

Bit 18 - Backup

pub fn sub1h(&mut self) -> SUB1H_W

Bit 17 - Subtract 1 hour (winter time change)

pub fn add1h(&mut self) -> ADD1H_W

Bit 16 - Add 1 hour (summer time change)

pub fn tsie(&mut self) -> TSIE_W

Bit 15 - Time-stamp interrupt enable

pub fn wutie(&mut self) -> WUTIE_W

Bit 14 - Wakeup timer interrupt enable

pub fn alrbie(&mut self) -> ALRBIE_W

Bit 13 - Alarm B interrupt enable

pub fn alraie(&mut self) -> ALRAIE_W

Bit 12 - Alarm A interrupt enable

pub fn tse(&mut self) -> TSE_W

Bit 11 - timestamp enable

pub fn wute(&mut self) -> WUTE_W

Bit 10 - Wakeup timer enable

pub fn alrbe(&mut self) -> ALRBE_W

Bit 9 - Alarm B enable

pub fn alrae(&mut self) -> ALRAE_W

Bit 8 - Alarm A enable

pub fn fmt(&mut self) -> FMT_W

Bit 6 - Hour format

pub fn bypshad(&mut self) -> BYPSHAD_W

Bit 5 - Bypass the shadow registers

pub fn refckon(&mut self) -> REFCKON_W

Bit 4 - RTC_REFIN reference clock detection enable (50 or 60 Hz)

pub fn tsedge(&mut self) -> TSEDGE_W

Bit 3 - Time-stamp event active edge

pub fn wucksel(&mut self) -> WUCKSEL_W

Bits 0:2 - Wakeup clock selection

impl W<u32, Reg<u32, _ISR>>

pub fn tamp2f(&mut self) -> TAMP2F_W

Bit 14 - RTC_TAMP2 detection flag

pub fn tamp1f(&mut self) -> TAMP1F_W

Bit 13 - RTC_TAMP1 detection flag

pub fn tsovf(&mut self) -> TSOVF_W

Bit 12 - Time-stamp overflow flag

pub fn tsf(&mut self) -> TSF_W

Bit 11 - Time-stamp flag

pub fn wutf(&mut self) -> WUTF_W

Bit 10 - Wakeup timer flag

pub fn alrbf(&mut self) -> ALRBF_W

Bit 9 - Alarm B flag

pub fn alraf(&mut self) -> ALRAF_W

Bit 8 - Alarm A flag

pub fn init(&mut self) -> INIT_W

Bit 7 - Initialization mode

pub fn rsf(&mut self) -> RSF_W

Bit 5 - Registers synchronization flag

pub fn recalpf(&mut self) -> RECALPF_W

Bit 16 - Recalibration pending flag

pub fn tamp3f(&mut self) -> TAMP3F_W

Bit 15 - RTC_TAMP3 detection flag

impl W<u32, Reg<u32, _PRER>>

pub fn prediv_a(&mut self) -> PREDIV_A_W

Bits 16:22 - Asynchronous prescaler factor

pub fn prediv_s(&mut self) -> PREDIV_S_W

Bits 0:15 - Synchronous prescaler factor

impl W<u32, Reg<u32, _WUTR>>

pub fn wut(&mut self) -> WUT_W

Bits 0:15 - Wakeup auto-reload value bits

impl W<u32, Reg<u32, _ALRMAR>>

pub fn msk4(&mut self) -> MSK4_W

Bit 31 - Alarm A date mask

pub fn wdsel(&mut self) -> WDSEL_W

Bit 30 - Week day selection

pub fn dt(&mut self) -> DT_W

Bits 28:29 - Date tens in BCD format.

pub fn du(&mut self) -> DU_W

Bits 24:27 - Date units or day in BCD format.

pub fn msk3(&mut self) -> MSK3_W

Bit 23 - Alarm A hours mask

pub fn pm(&mut self) -> PM_W

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W

Bits 20:21 - Hour tens in BCD format.

pub fn hu(&mut self) -> HU_W

Bits 16:19 - Hour units in BCD format.

pub fn msk2(&mut self) -> MSK2_W

Bit 15 - Alarm A minutes mask

pub fn mnt(&mut self) -> MNT_W

Bits 12:14 - Minute tens in BCD format.

pub fn mnu(&mut self) -> MNU_W

Bits 8:11 - Minute units in BCD format.

pub fn msk1(&mut self) -> MSK1_W

Bit 7 - Alarm A seconds mask

pub fn st(&mut self) -> ST_W

Bits 4:6 - Second tens in BCD format.

pub fn su(&mut self) -> SU_W

Bits 0:3 - Second units in BCD format.

impl W<u32, Reg<u32, _ALRMBR>>

pub fn msk4(&mut self) -> MSK4_W

Bit 31 - Alarm B date mask

pub fn wdsel(&mut self) -> WDSEL_W

Bit 30 - Week day selection

pub fn dt(&mut self) -> DT_W

Bits 28:29 - Date tens in BCD format

pub fn du(&mut self) -> DU_W

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&mut self) -> MSK3_W

Bit 23 - Alarm B hours mask

pub fn pm(&mut self) -> PM_W

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W

Bits 20:21 - Hour tens in BCD format

pub fn hu(&mut self) -> HU_W

Bits 16:19 - Hour units in BCD format

pub fn msk2(&mut self) -> MSK2_W

Bit 15 - Alarm B minutes mask

pub fn mnt(&mut self) -> MNT_W

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&mut self) -> MNU_W

Bits 8:11 - Minute units in BCD format

pub fn msk1(&mut self) -> MSK1_W

Bit 7 - Alarm B seconds mask

pub fn st(&mut self) -> ST_W

Bits 4:6 - Second tens in BCD format

pub fn su(&mut self) -> SU_W

Bits 0:3 - Second units in BCD format

impl W<u32, Reg<u32, _WPR>>

pub fn key(&mut self) -> KEY_W

Bits 0:7 - Write protection key

impl W<u32, Reg<u32, _SHIFTR>>

pub fn add1s(&mut self) -> ADD1S_W

Bit 31 - Add one second

pub fn subfs(&mut self) -> SUBFS_W

Bits 0:14 - Subtract a fraction of a second

impl W<u32, Reg<u32, _CALR>>

pub fn calp(&mut self) -> CALP_W

Bit 15 - Increase frequency of RTC by 488.5 ppm

pub fn calw8(&mut self) -> CALW8_W

Bit 14 - Use a 8-second calibration cycle period

pub fn calw16(&mut self) -> CALW16_W

Bit 13 - Use a 16-second calibration cycle period

pub fn calm(&mut self) -> CALM_W

Bits 0:8 - Calibration minus

impl W<u32, Reg<u32, _TAMPCR>>

pub fn tamp2mf(&mut self) -> TAMP2MF_W

Bit 21 - Tamper 2 mask flag

pub fn tamp2noerase(&mut self) -> TAMP2NOERASE_W

Bit 20 - Tamper 2 no erase

pub fn tamp2ie(&mut self) -> TAMP2IE_W

Bit 19 - Tamper 2 interrupt enable

pub fn tamp1mf(&mut self) -> TAMP1MF_W

Bit 18 - Tamper 1 mask flag

pub fn tamp1noerase(&mut self) -> TAMP1NOERASE_W

Bit 17 - Tamper 1 no erase

pub fn tamp1ie(&mut self) -> TAMP1IE_W

Bit 16 - Tamper 1 interrupt enable

pub fn tamppudis(&mut self) -> TAMPPUDIS_W

Bit 15 - RTC_TAMPx pull-up disable

pub fn tampprch(&mut self) -> TAMPPRCH_W

Bits 13:14 - RTC_TAMPx precharge duration

pub fn tampflt(&mut self) -> TAMPFLT_W

Bits 11:12 - RTC_TAMPx filter count

pub fn tampfreq(&mut self) -> TAMPFREQ_W

Bits 8:10 - Tamper sampling frequency

pub fn tampts(&mut self) -> TAMPTS_W

Bit 7 - Activate timestamp on tamper detection event

pub fn tamp2trg(&mut self) -> TAMP2TRG_W

Bit 4 - Active level for RTC_TAMP2 input

pub fn tamp2e(&mut self) -> TAMP2E_W

Bit 3 - RTC_TAMP2 input detection enable

pub fn tampie(&mut self) -> TAMPIE_W

Bit 2 - Tamper interrupt enable

pub fn tamp1trg(&mut self) -> TAMP1TRG_W

Bit 1 - Active level for RTC_TAMP1 input

pub fn tamp1e(&mut self) -> TAMP1E_W

Bit 0 - RTC_TAMP1 input detection enable

pub fn tamp3mf(&mut self) -> TAMP3MF_W

Bit 24 - Tamper 3 mask flag

pub fn tamp3noerase(&mut self) -> TAMP3NOERASE_W

Bit 23 - Tamper 3 no erase

pub fn tamp3ie(&mut self) -> TAMP3IE_W

Bit 22 - Tamper 3 interrupt enable

pub fn tamp3trg(&mut self) -> TAMP3TRG_W

Bit 6 - Active level for RTC_TAMP3 input

pub fn tamp3e(&mut self) -> TAMP3E_W

Bit 5 - RTC_TAMP3 detection enable

impl W<u32, Reg<u32, _ALRMASSR>>

pub fn maskss(&mut self) -> MASKSS_W

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&mut self) -> SS_W

Bits 0:14 - Sub seconds value

impl W<u32, Reg<u32, _ALRMBSSR>>

pub fn maskss(&mut self) -> MASKSS_W

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&mut self) -> SS_W

Bits 0:14 - Sub seconds value

impl W<u32, Reg<u32, _OR>>

pub fn rtc_out_rmp(&mut self) -> RTC_OUT_RMP_W

Bit 1 - RTC_ALARM on PC13 output type

pub fn rtc_alarm_type(&mut self) -> RTC_ALARM_TYPE_W

Bit 0 - RTC_ALARM on PC13 output type

impl W<u32, Reg<u32, _BKPR>>

pub fn bkp(&mut self) -> BKP_W

Bits 0:31 - BKP

impl W<u32, Reg<u32, _CR1>>

pub fn m1(&mut self) -> M1_W

Bit 28 - Word length

pub fn eobie(&mut self) -> EOBIE_W

Bit 27 - End of Block interrupt enable

pub fn rtoie(&mut self) -> RTOIE_W

Bit 26 - Receiver timeout interrupt enable

pub fn over8(&mut self) -> OVER8_W

Bit 15 - Oversampling mode

pub fn cmie(&mut self) -> CMIE_W

Bit 14 - Character match interrupt enable

pub fn mme(&mut self) -> MME_W

Bit 13 - Mute mode enable

pub fn m0(&mut self) -> M0_W

Bit 12 - Word length

pub fn wake(&mut self) -> WAKE_W

Bit 11 - Receiver wakeup method

pub fn pce(&mut self) -> PCE_W

Bit 10 - Parity control enable

pub fn ps(&mut self) -> PS_W

Bit 9 - Parity selection

pub fn peie(&mut self) -> PEIE_W

Bit 8 - PE interrupt enable

pub fn txeie(&mut self) -> TXEIE_W

Bit 7 - interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W

Bit 5 - RXNE interrupt enable

pub fn idleie(&mut self) -> IDLEIE_W

Bit 4 - IDLE interrupt enable

pub fn te(&mut self) -> TE_W

Bit 3 - Transmitter enable

pub fn re(&mut self) -> RE_W

Bit 2 - Receiver enable

pub fn uesm(&mut self) -> UESM_W

Bit 1 - USART enable in Stop mode

pub fn ue(&mut self) -> UE_W

Bit 0 - USART enable

pub fn deat(&mut self) -> DEAT_W

Bits 21:25 - Driver Enable assertion time

pub fn dedt(&mut self) -> DEDT_W

Bits 16:20 - Driver Enable de-assertion time

impl W<u32, Reg<u32, _CR2>>

pub fn rtoen(&mut self) -> RTOEN_W

Bit 23 - Receiver timeout enable

pub fn abren(&mut self) -> ABREN_W

Bit 20 - Auto baud rate enable

pub fn msbfirst(&mut self) -> MSBFIRST_W

Bit 19 - Most significant bit first

pub fn datainv(&mut self) -> DATAINV_W

Bit 18 - Binary data inversion

pub fn txinv(&mut self) -> TXINV_W

Bit 17 - TX pin active level inversion

pub fn rxinv(&mut self) -> RXINV_W

Bit 16 - RX pin active level inversion

pub fn swap(&mut self) -> SWAP_W

Bit 15 - Swap TX/RX pins

pub fn linen(&mut self) -> LINEN_W

Bit 14 - LIN mode enable

pub fn stop(&mut self) -> STOP_W

Bits 12:13 - STOP bits

pub fn clken(&mut self) -> CLKEN_W

Bit 11 - Clock enable

pub fn cpol(&mut self) -> CPOL_W

Bit 10 - Clock polarity

pub fn cpha(&mut self) -> CPHA_W

Bit 9 - Clock phase

pub fn lbcl(&mut self) -> LBCL_W

Bit 8 - Last bit clock pulse

pub fn lbdie(&mut self) -> LBDIE_W

Bit 6 - LIN break detection interrupt enable

pub fn lbdl(&mut self) -> LBDL_W

Bit 5 - LIN break detection length

pub fn addm7(&mut self) -> ADDM7_W

Bit 4 - 7-bit Address Detection/4-bit Address Detection

pub fn add(&mut self) -> ADD_W

Bits 24:31 - Address of the USART node

pub fn abrmod(&mut self) -> ABRMOD_W

Bits 21:22 - Auto baud rate mode

impl W<u32, Reg<u32, _CR3>>

pub fn wufie(&mut self) -> WUFIE_W

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&mut self) -> WUS_W

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn scarcnt(&mut self) -> SCARCNT_W

Bits 17:19 - Smartcard auto-retry count

pub fn dep(&mut self) -> DEP_W

Bit 15 - Driver enable polarity selection

pub fn dem(&mut self) -> DEM_W

Bit 14 - Driver enable mode

pub fn ddre(&mut self) -> DDRE_W

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&mut self) -> OVRDIS_W

Bit 12 - Overrun Disable

pub fn onebit(&mut self) -> ONEBIT_W

Bit 11 - One sample bit method enable

pub fn ctsie(&mut self) -> CTSIE_W

Bit 10 - CTS interrupt enable

pub fn ctse(&mut self) -> CTSE_W

Bit 9 - CTS enable

pub fn rtse(&mut self) -> RTSE_W

Bit 8 - RTS enable

pub fn dmat(&mut self) -> DMAT_W

Bit 7 - DMA enable transmitter

pub fn dmar(&mut self) -> DMAR_W

Bit 6 - DMA enable receiver

pub fn scen(&mut self) -> SCEN_W

Bit 5 - Smartcard mode enable

pub fn nack(&mut self) -> NACK_W

Bit 4 - Smartcard NACK enable

pub fn hdsel(&mut self) -> HDSEL_W

Bit 3 - Half-duplex selection

pub fn irlp(&mut self) -> IRLP_W

Bit 2 - Ir low-power

pub fn iren(&mut self) -> IREN_W

Bit 1 - Ir mode enable

pub fn eie(&mut self) -> EIE_W

Bit 0 - Error interrupt enable

impl W<u32, Reg<u32, _BRR>>

pub fn brr(&mut self) -> BRR_W

Bits 0:15 - DIV_Mantissa

impl W<u32, Reg<u32, _GTPR>>

pub fn gt(&mut self) -> GT_W

Bits 8:15 - Guard time value

pub fn psc(&mut self) -> PSC_W

Bits 0:7 - Prescaler value

impl W<u32, Reg<u32, _RTOR>>

pub fn blen(&mut self) -> BLEN_W

Bits 24:31 - Block Length

pub fn rto(&mut self) -> RTO_W

Bits 0:23 - Receiver timeout value

impl W<u32, Reg<u32, _RQR>>

pub fn txfrq(&mut self) -> TXFRQ_W

Bit 4 - Transmit data flush request

pub fn rxfrq(&mut self) -> RXFRQ_W

Bit 3 - Receive data flush request

pub fn mmrq(&mut self) -> MMRQ_W

Bit 2 - Mute mode request

pub fn sbkrq(&mut self) -> SBKRQ_W

Bit 1 - Send break request

pub fn abrrq(&mut self) -> ABRRQ_W

Bit 0 - Auto baud rate request

impl W<u32, Reg<u32, _ICR>>

pub fn wucf(&mut self) -> WUCF_W

Bit 20 - Wakeup from Stop mode clear flag

pub fn cmcf(&mut self) -> CMCF_W

Bit 17 - Character match clear flag

pub fn eobcf(&mut self) -> EOBCF_W

Bit 12 - End of block clear flag

pub fn rtocf(&mut self) -> RTOCF_W

Bit 11 - Receiver timeout clear flag

pub fn ctscf(&mut self) -> CTSCF_W

Bit 9 - CTS clear flag

pub fn lbdcf(&mut self) -> LBDCF_W

Bit 8 - LIN break detection clear flag

pub fn tccf(&mut self) -> TCCF_W

Bit 6 - Transmission complete clear flag

pub fn idlecf(&mut self) -> IDLECF_W

Bit 4 - Idle line detected clear flag

pub fn orecf(&mut self) -> ORECF_W

Bit 3 - Overrun error clear flag

pub fn ncf(&mut self) -> NCF_W

Bit 2 - Noise detected clear flag

pub fn fecf(&mut self) -> FECF_W

Bit 1 - Framing error clear flag

pub fn pecf(&mut self) -> PECF_W

Bit 0 - Parity error clear flag

impl W<u32, Reg<u32, _TDR>>

pub fn tdr(&mut self) -> TDR_W

Bits 0:8 - Transmit data value

impl W<u32, Reg<u32, _CR>>

pub fn ctph(&mut self) -> CTPH_W

Bits 28:31 - Charge transfer pulse high

pub fn ctpl(&mut self) -> CTPL_W

Bits 24:27 - Charge transfer pulse low

pub fn ssd(&mut self) -> SSD_W

Bits 17:23 - Spread spectrum deviation

pub fn sse(&mut self) -> SSE_W

Bit 16 - Spread spectrum enable

pub fn sspsc(&mut self) -> SSPSC_W

Bit 15 - Spread spectrum prescaler

pub fn pgpsc(&mut self) -> PGPSC_W

Bits 12:14 - pulse generator prescaler

pub fn mcv(&mut self) -> MCV_W

Bits 5:7 - Max count value

pub fn iodef(&mut self) -> IODEF_W

Bit 4 - I/O Default mode

pub fn syncpol(&mut self) -> SYNCPOL_W

Bit 3 - Synchronization pin polarity

pub fn am(&mut self) -> AM_W

Bit 2 - Acquisition mode

pub fn start(&mut self) -> START_W

Bit 1 - Start a new acquisition

pub fn tsce(&mut self) -> TSCE_W

Bit 0 - Touch sensing controller enable

impl W<u32, Reg<u32, _IER>>

pub fn mceie(&mut self) -> MCEIE_W

Bit 1 - Max count error interrupt enable

pub fn eoaie(&mut self) -> EOAIE_W

Bit 0 - End of acquisition interrupt enable

impl W<u32, Reg<u32, _ICR>>

pub fn mceic(&mut self) -> MCEIC_W

Bit 1 - Max count error interrupt clear

pub fn eoaic(&mut self) -> EOAIC_W

Bit 0 - End of acquisition interrupt clear

impl W<u32, Reg<u32, _ISR>>

pub fn mcef(&mut self) -> MCEF_W

Bit 1 - Max count error flag

pub fn eoaf(&mut self) -> EOAF_W

Bit 0 - End of acquisition flag

impl W<u32, Reg<u32, _IOHCR>>

pub fn g8_io4(&mut self) -> G8_IO4_W

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOASCR>>

pub fn g8_io4(&mut self) -> G8_IO4_W

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOSCR>>

pub fn g8_io4(&mut self) -> G8_IO4_W

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOCCR>>

pub fn g8_io4(&mut self) -> G8_IO4_W

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOGCSR>>

pub fn g8e(&mut self) -> G8E_W

Bit 7 - Analog I/O group x enable

pub fn g7e(&mut self) -> G7E_W

Bit 6 - Analog I/O group x enable

pub fn g6e(&mut self) -> G6E_W

Bit 5 - Analog I/O group x enable

pub fn g5e(&mut self) -> G5E_W

Bit 4 - Analog I/O group x enable

pub fn g4e(&mut self) -> G4E_W

Bit 3 - Analog I/O group x enable

pub fn g3e(&mut self) -> G3E_W

Bit 2 - Analog I/O group x enable

pub fn g2e(&mut self) -> G2E_W

Bit 1 - Analog I/O group x enable

pub fn g1e(&mut self) -> G1E_W

Bit 0 - Analog I/O group x enable

impl W<u32, Reg<u32, _KR>>

pub fn key(&mut self) -> KEY_W

Bits 0:15 - Key value (write only, read 0x0000)

impl W<u32, Reg<u32, _PR>>

pub fn pr(&mut self) -> PR_W

Bits 0:2 - Prescaler divider

impl W<u32, Reg<u32, _RLR>>

pub fn rl(&mut self) -> RL_W

Bits 0:11 - Watchdog counter reload value

impl W<u32, Reg<u32, _WINR>>

pub fn win(&mut self) -> WIN_W

Bits 0:11 - Watchdog counter window value

impl W<u32, Reg<u32, _CR>>

pub fn wdga(&mut self) -> WDGA_W

Bit 7 - Activation bit

pub fn t(&mut self) -> T_W

Bits 0:6 - 7-bit counter (MSB to LSB)

impl W<u32, Reg<u32, _CFR>>

pub fn ewi(&mut self) -> EWI_W

Bit 9 - Early wakeup interrupt

pub fn w(&mut self) -> W_W

Bits 0:6 - 7-bit window value

pub fn wdgtb(&mut self) -> WDGTB_W

Bits 7:8 - Timer base

impl W<u32, Reg<u32, _SR>>

pub fn ewif(&mut self) -> EWIF_W

Bit 0 - Early wakeup interrupt flag

impl W<u32, Reg<u32, _EP0R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP1R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP2R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP3R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP4R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP5R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP6R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _EP7R>>

pub fn ctr_rx(&mut self) -> CTR_RX_W

Bit 15 - CTR_RX

pub fn dtog_rx(&mut self) -> DTOG_RX_W

Bit 14 - DTOG_RX

pub fn stat_rx(&mut self) -> STAT_RX_W

Bits 12:13 - STAT_RX

pub fn setup(&mut self) -> SETUP_W

Bit 11 - SETUP

pub fn ep_type(&mut self) -> EP_TYPE_W

Bits 9:10 - EPTYPE

pub fn ep_kind(&mut self) -> EP_KIND_W

Bit 8 - EP_KIND

pub fn ctr_tx(&mut self) -> CTR_TX_W

Bit 7 - CTR_TX

pub fn dtog_tx(&mut self) -> DTOG_TX_W

Bit 6 - DTOG_TX

pub fn stat_tx(&mut self) -> STAT_TX_W

Bits 4:5 - STAT_TX

pub fn ea(&mut self) -> EA_W

Bits 0:3 - EA

impl W<u32, Reg<u32, _CNTR>>

pub fn ctrm(&mut self) -> CTRM_W

Bit 15 - CTRM

pub fn pmaovrm(&mut self) -> PMAOVRM_W

Bit 14 - PMAOVRM

pub fn errm(&mut self) -> ERRM_W

Bit 13 - ERRM

pub fn wkupm(&mut self) -> WKUPM_W

Bit 12 - WKUPM

pub fn suspm(&mut self) -> SUSPM_W

Bit 11 - SUSPM

pub fn resetm(&mut self) -> RESETM_W

Bit 10 - RESETM

pub fn sofm(&mut self) -> SOFM_W

Bit 9 - SOFM

pub fn esofm(&mut self) -> ESOFM_W

Bit 8 - ESOFM

pub fn l1reqm(&mut self) -> L1REQM_W

Bit 7 - L1REQM

pub fn l1resume(&mut self) -> L1RESUME_W

Bit 5 - L1RESUME

pub fn resume(&mut self) -> RESUME_W

Bit 4 - RESUME

pub fn fsusp(&mut self) -> FSUSP_W

Bit 3 - FSUSP

pub fn lpmode(&mut self) -> LPMODE_W

Bit 2 - LPMODE

pub fn pdwn(&mut self) -> PDWN_W

Bit 1 - PDWN

pub fn fres(&mut self) -> FRES_W

Bit 0 - FRES

impl W<u32, Reg<u32, _ISTR>>

pub fn ctr(&mut self) -> CTR_W

Bit 15 - CTR

pub fn pmaovr(&mut self) -> PMAOVR_W

Bit 14 - PMAOVR

pub fn err(&mut self) -> ERR_W

Bit 13 - ERR

pub fn wkup(&mut self) -> WKUP_W

Bit 12 - WKUP

pub fn susp(&mut self) -> SUSP_W

Bit 11 - SUSP

pub fn reset(&mut self) -> RESET_W

Bit 10 - RESET

pub fn sof(&mut self) -> SOF_W

Bit 9 - SOF

pub fn esof(&mut self) -> ESOF_W

Bit 8 - ESOF

pub fn l1req(&mut self) -> L1REQ_W

Bit 7 - L1REQ

pub fn dir(&mut self) -> DIR_W

Bit 4 - DIR

pub fn ep_id(&mut self) -> EP_ID_W

Bits 0:3 - EP_ID

impl W<u32, Reg<u32, _DADDR>>

pub fn ef(&mut self) -> EF_W

Bit 7 - EF

pub fn add(&mut self) -> ADD_W

Bits 0:6 - ADD

impl W<u32, Reg<u32, _BTABLE>>

pub fn btable(&mut self) -> BTABLE_W

Bits 3:15 - BTABLE

impl W<u32, Reg<u32, _LPMCSR>>

pub fn lpmack(&mut self) -> LPMACK_W

Bit 1 - LPMACK

pub fn lpmen(&mut self) -> LPMEN_W

Bit 0 - LPMEN

impl W<u32, Reg<u32, _BCDR>>

pub fn dppu(&mut self) -> DPPU_W

Bit 15 - DPPU

pub fn sden(&mut self) -> SDEN_W

Bit 3 - SDEN

pub fn pden(&mut self) -> PDEN_W

Bit 2 - PDEN

pub fn dcden(&mut self) -> DCDEN_W

Bit 1 - DCDEN

pub fn bcden(&mut self) -> BCDEN_W

Bit 0 - BCDEN

impl W<u32, Reg<u32, _CR>>

pub fn trim(&mut self) -> TRIM_W

Bits 8:13 - HSI48 oscillator smooth trimming

pub fn swsync(&mut self) -> SWSYNC_W

Bit 7 - Generate software SYNC event

pub fn autotrimen(&mut self) -> AUTOTRIMEN_W

Bit 6 - Automatic trimming enable

pub fn cen(&mut self) -> CEN_W

Bit 5 - Frequency error counter enable

pub fn esyncie(&mut self) -> ESYNCIE_W

Bit 3 - Expected SYNC interrupt enable

pub fn errie(&mut self) -> ERRIE_W

Bit 2 - Synchronization or trimming error interrupt enable

pub fn syncwarnie(&mut self) -> SYNCWARNIE_W

Bit 1 - SYNC warning interrupt enable

pub fn syncokie(&mut self) -> SYNCOKIE_W

Bit 0 - SYNC event OK interrupt enable

impl W<u32, Reg<u32, _CFGR>>

pub fn syncpol(&mut self) -> SYNCPOL_W

Bit 31 - SYNC polarity selection

pub fn syncsrc(&mut self) -> SYNCSRC_W

Bits 28:29 - SYNC signal source selection

pub fn syncdiv(&mut self) -> SYNCDIV_W

Bits 24:26 - SYNC divider

pub fn felim(&mut self) -> FELIM_W

Bits 16:23 - Frequency error limit

pub fn reload(&mut self) -> RELOAD_W

Bits 0:15 - Counter reload value

impl W<u32, Reg<u32, _ICR>>

pub fn esyncc(&mut self) -> ESYNCC_W

Bit 3 - Expected SYNC clear flag

pub fn errc(&mut self) -> ERRC_W

Bit 2 - Error clear flag

pub fn syncwarnc(&mut self) -> SYNCWARNC_W

Bit 1 - SYNC warning clear flag

pub fn syncokc(&mut self) -> SYNCOKC_W

Bit 0 - SYNC event OK clear flag

impl W<u32, Reg<u32, _CSSA>>

pub fn add(&mut self) -> ADD_W

Bits 8:23 - code segment start address

impl W<u32, Reg<u32, _CSL>>

pub fn leng(&mut self) -> LENG_W

Bits 8:21 - code segment length

impl W<u32, Reg<u32, _NVDSSA>>

pub fn add(&mut self) -> ADD_W

Bits 8:23 - Non-volatile data segment start address

impl W<u32, Reg<u32, _NVDSL>>

pub fn leng(&mut self) -> LENG_W

Bits 8:21 - Non-volatile data segment length

impl W<u32, Reg<u32, _VDSSA>>

pub fn add(&mut self) -> ADD_W

Bits 6:15 - Volatile data segment start address

impl W<u32, Reg<u32, _VDSL>>

pub fn leng(&mut self) -> LENG_W

Bits 6:15 - Non-volatile data segment length

impl W<u32, Reg<u32, _CR>>

pub fn vde(&mut self) -> VDE_W

Bit 2 - Volatile data execution

pub fn vds(&mut self) -> VDS_W

Bit 1 - Volatile data shared

pub fn fpa(&mut self) -> FPA_W

Bit 0 - Firewall pre alarm

impl W<u32, Reg<u32, _CR>>

pub fn pllon(&mut self) -> PLLON_W

Bit 24 - PLL enable bit

pub fn rtcpre(&mut self) -> RTCPRE_W

Bits 20:21 - TC/LCD prescaler

pub fn csshseon(&mut self) -> CSSHSEON_W

Bit 19 - Clock security system on HSE enable bit

pub fn hsebyp(&mut self) -> HSEBYP_W

Bit 18 - HSE clock bypass bit

pub fn hseon(&mut self) -> HSEON_W

Bit 16 - HSE clock enable bit

pub fn msion(&mut self) -> MSION_W

Bit 8 - MSI clock enable bit

pub fn hsi16diven(&mut self) -> HSI16DIVEN_W

Bit 3 - HSI16DIVEN

pub fn hsi16rdyf(&mut self) -> HSI16RDYF_W

Bit 2 - Internal high-speed clock ready flag

pub fn hsi16on(&mut self) -> HSI16ON_W

Bit 0 - 16 MHz high-speed internal clock enable

pub fn hsi16outen(&mut self) -> HSI16OUTEN_W

Bit 5 - 16 MHz high-speed internal clock output enable

impl W<u32, Reg<u32, _ICSCR>>

pub fn msitrim(&mut self) -> MSITRIM_W

Bits 24:31 - MSI clock trimming

pub fn msirange(&mut self) -> MSIRANGE_W

Bits 13:15 - MSI clock ranges

pub fn hsi16trim(&mut self) -> HSI16TRIM_W

Bits 8:12 - High speed internal clock trimming

impl W<u32, Reg<u32, _CRRCR>>

pub fn hsi48on(&mut self) -> HSI48ON_W

Bit 0 - 48MHz HSI clock enable bit

pub fn hsi48div6en(&mut self) -> HSI48DIV6EN_W

Bit 2 - 48 MHz HSI clock divided by 6 output enable

impl W<u32, Reg<u32, _CFGR>>

pub fn mcopre(&mut self) -> MCOPRE_W

Bits 28:30 - Microcontroller clock output prescaler

pub fn mcosel(&mut self) -> MCOSEL_W

Bits 24:27 - Microcontroller clock output selection

pub fn plldiv(&mut self) -> PLLDIV_W

Bits 22:23 - PLL output division

pub fn pllmul(&mut self) -> PLLMUL_W

Bits 18:21 - PLL multiplication factor

pub fn pllsrc(&mut self) -> PLLSRC_W

Bit 16 - PLL entry clock source

pub fn stopwuck(&mut self) -> STOPWUCK_W

Bit 15 - Wake-up from stop clock selection

pub fn ppre2(&mut self) -> PPRE2_W

Bits 11:13 - APB high-speed prescaler (APB2)

pub fn ppre1(&mut self) -> PPRE1_W

Bits 8:10 - APB low-speed prescaler (APB1)

pub fn hpre(&mut self) -> HPRE_W

Bits 4:7 - AHB prescaler

pub fn sw(&mut self) -> SW_W

Bits 0:1 - System clock switch

impl W<u32, Reg<u32, _IOPRSTR>>

pub fn iophrst(&mut self) -> IOPHRST_W

Bit 7 - I/O port H reset

pub fn iopdrst(&mut self) -> IOPDRST_W

Bit 3 - I/O port D reset

pub fn iopcrst(&mut self) -> IOPCRST_W

Bit 2 - I/O port A reset

pub fn iopbrst(&mut self) -> IOPBRST_W

Bit 1 - I/O port B reset

pub fn ioparst(&mut self) -> IOPARST_W

Bit 0 - I/O port A reset

pub fn ioperst(&mut self) -> IOPERST_W

Bit 4 - I/O port E reset

impl W<u32, Reg<u32, _AHBRSTR>>

pub fn cryprst(&mut self) -> CRYPRST_W

Bit 24 - Crypto module reset

pub fn rngrst(&mut self) -> RNGRST_W

Bit 20 - Random Number Generator module reset

pub fn touchrst(&mut self) -> TOUCHRST_W

Bit 16 - Touch Sensing reset

pub fn crcrst(&mut self) -> CRCRST_W

Bit 12 - Test integration module reset

pub fn mifrst(&mut self) -> MIFRST_W

Bit 8 - Memory interface reset

pub fn dmarst(&mut self) -> DMARST_W

Bit 0 - DMA reset

impl W<u32, Reg<u32, _APB2RSTR>>

pub fn dbgrst(&mut self) -> DBGRST_W

Bit 22 - DBG reset

pub fn usart1rst(&mut self) -> USART1RST_W

Bit 14 - USART1 reset

pub fn spi1rst(&mut self) -> SPI1RST_W

Bit 12 - SPI 1 reset

pub fn adcrst(&mut self) -> ADCRST_W

Bit 9 - ADC interface reset

pub fn tim22rst(&mut self) -> TIM22RST_W

Bit 5 - TIM22 timer reset

pub fn tim21rst(&mut self) -> TIM21RST_W

Bit 2 - TIM21 timer reset

pub fn syscfgrst(&mut self) -> SYSCFGRST_W

Bit 0 - System configuration controller reset

impl W<u32, Reg<u32, _APB1RSTR>>

pub fn lptim1rst(&mut self) -> LPTIM1RST_W

Bit 31 - Low power timer reset

pub fn dacrst(&mut self) -> DACRST_W

Bit 29 - DAC interface reset

pub fn pwrrst(&mut self) -> PWRRST_W

Bit 28 - Power interface reset

pub fn crsrst(&mut self) -> CRSRST_W

Bit 27 - Clock recovery system reset

pub fn usbrst(&mut self) -> USBRST_W

Bit 23 - USB reset

pub fn i2c2rst(&mut self) -> I2C2RST_W

Bit 22 - I2C2 reset

pub fn i2c1rst(&mut self) -> I2C1RST_W

Bit 21 - I2C1 reset

pub fn lpuart1rst(&mut self) -> LPUART1RST_W

Bit 18 - LPUART1 reset

pub fn lpuart12rst(&mut self) -> LPUART12RST_W

Bit 17 - UART2 reset

pub fn spi2rst(&mut self) -> SPI2RST_W

Bit 14 - SPI2 reset

pub fn wwdrst(&mut self) -> WWDRST_W

Bit 11 - Window watchdog reset

pub fn tim6rst(&mut self) -> TIM6RST_W

Bit 4 - Timer 6 reset

pub fn tim2rst(&mut self) -> TIM2RST_W

Bit 0 - Timer2 reset

pub fn tim3rst(&mut self) -> TIM3RST_W

Bit 1 - Timer3 reset

pub fn tim7rst(&mut self) -> TIM7RST_W

Bit 5 - Timer 7 reset

pub fn usart4rst(&mut self) -> USART4RST_W

Bit 19 - USART4 reset

pub fn usart5rst(&mut self) -> USART5RST_W

Bit 20 - USART5 reset

pub fn i2c3rst(&mut self) -> I2C3RST_W

Bit 30 - I2C3 reset

impl W<u32, Reg<u32, _IOPENR>>

pub fn iophen(&mut self) -> IOPHEN_W

Bit 7 - I/O port H clock enable bit

pub fn iopden(&mut self) -> IOPDEN_W

Bit 3 - I/O port D clock enable bit

pub fn iopcen(&mut self) -> IOPCEN_W

Bit 2 - IO port A clock enable bit

pub fn iopben(&mut self) -> IOPBEN_W

Bit 1 - IO port B clock enable bit

pub fn iopaen(&mut self) -> IOPAEN_W

Bit 0 - IO port A clock enable bit

pub fn iopeen(&mut self) -> IOPEEN_W

Bit 4 - I/O port E clock enable bit

impl W<u32, Reg<u32, _AHBENR>>

pub fn crypen(&mut self) -> CRYPEN_W

Bit 24 - Crypto clock enable bit

pub fn rngen(&mut self) -> RNGEN_W

Bit 20 - Random Number Generator clock enable bit

pub fn touchen(&mut self) -> TOUCHEN_W

Bit 16 - Touch Sensing clock enable bit

pub fn crcen(&mut self) -> CRCEN_W

Bit 12 - CRC clock enable bit

pub fn mifen(&mut self) -> MIFEN_W

Bit 8 - NVM interface clock enable bit

pub fn dmaen(&mut self) -> DMAEN_W

Bit 0 - DMA clock enable bit

impl W<u32, Reg<u32, _APB2ENR>>

pub fn dbgen(&mut self) -> DBGEN_W

Bit 22 - DBG clock enable bit

pub fn usart1en(&mut self) -> USART1EN_W

Bit 14 - USART1 clock enable bit

pub fn spi1en(&mut self) -> SPI1EN_W

Bit 12 - SPI1 clock enable bit

pub fn adcen(&mut self) -> ADCEN_W

Bit 9 - ADC clock enable bit

pub fn mifien(&mut self) -> MIFIEN_W

Bit 7 - MiFaRe Firewall clock enable bit

pub fn tim22en(&mut self) -> TIM22EN_W

Bit 5 - TIM22 timer clock enable bit

pub fn tim21en(&mut self) -> TIM21EN_W

Bit 2 - TIM21 timer clock enable bit

pub fn syscfgen(&mut self) -> SYSCFGEN_W

Bit 0 - System configuration controller clock enable bit

impl W<u32, Reg<u32, _APB1ENR>>

pub fn lptim1en(&mut self) -> LPTIM1EN_W

Bit 31 - Low power timer clock enable bit

pub fn dacen(&mut self) -> DACEN_W

Bit 29 - DAC interface clock enable bit

pub fn pwren(&mut self) -> PWREN_W

Bit 28 - Power interface clock enable bit

pub fn crsen(&mut self) -> CRSEN_W

Bit 27 - Clock recovery system clock enable bit

pub fn usben(&mut self) -> USBEN_W

Bit 23 - USB clock enable bit

pub fn i2c2en(&mut self) -> I2C2EN_W

Bit 22 - I2C2 clock enable bit

pub fn i2c1en(&mut self) -> I2C1EN_W

Bit 21 - I2C1 clock enable bit

pub fn lpuart1en(&mut self) -> LPUART1EN_W

Bit 18 - LPUART1 clock enable bit

pub fn usart2en(&mut self) -> USART2EN_W

Bit 17 - UART2 clock enable bit

pub fn spi2en(&mut self) -> SPI2EN_W

Bit 14 - SPI2 clock enable bit

pub fn wwdgen(&mut self) -> WWDGEN_W

Bit 11 - Window watchdog clock enable bit

pub fn tim6en(&mut self) -> TIM6EN_W

Bit 4 - Timer 6 clock enable bit

pub fn tim2en(&mut self) -> TIM2EN_W

Bit 0 - Timer2 clock enable bit

pub fn tim3en(&mut self) -> TIM3EN_W

Bit 1 - Timer3 clock enable bit

pub fn tim7en(&mut self) -> TIM7EN_W

Bit 5 - Timer 7 clock enable bit

pub fn usart4en(&mut self) -> USART4EN_W

Bit 19 - USART4 clock enable bit

pub fn usart5en(&mut self) -> USART5EN_W

Bit 20 - USART5 clock enable bit

pub fn i2c3en(&mut self) -> I2C3EN_W

Bit 30 - I2C3 clock enable bit

impl W<u32, Reg<u32, _IOPSMEN>>

pub fn iophsmen(&mut self) -> IOPHSMEN_W

Bit 7 - IOPHSMEN

pub fn iopdsmen(&mut self) -> IOPDSMEN_W

Bit 3 - IOPDSMEN

pub fn iopcsmen(&mut self) -> IOPCSMEN_W

Bit 2 - IOPCSMEN

pub fn iopbsmen(&mut self) -> IOPBSMEN_W

Bit 1 - IOPBSMEN

pub fn iopasmen(&mut self) -> IOPASMEN_W

Bit 0 - IOPASMEN

pub fn iopesmen(&mut self) -> IOPESMEN_W

Bit 4 - Port E clock enable during Sleep mode bit

impl W<u32, Reg<u32, _AHBSMENR>>

pub fn crypsmen(&mut self) -> CRYPSMEN_W

Bit 24 - Crypto clock enable during sleep mode bit

pub fn rngsmen(&mut self) -> RNGSMEN_W

Bit 20 - Random Number Generator clock enable during sleep mode bit

pub fn touchsmen(&mut self) -> TOUCHSMEN_W

Bit 16 - Touch Sensing clock enable during sleep mode bit

pub fn crcsmen(&mut self) -> CRCSMEN_W

Bit 12 - CRC clock enable during sleep mode bit

pub fn sramsmen(&mut self) -> SRAMSMEN_W

Bit 9 - SRAM interface clock enable during sleep mode bit

pub fn mifsmen(&mut self) -> MIFSMEN_W

Bit 8 - NVM interface clock enable during sleep mode bit

pub fn dmasmen(&mut self) -> DMASMEN_W

Bit 0 - DMA clock enable during sleep mode bit

impl W<u32, Reg<u32, _APB2SMENR>>

pub fn dbgsmen(&mut self) -> DBGSMEN_W

Bit 22 - DBG clock enable during sleep mode bit

pub fn usart1smen(&mut self) -> USART1SMEN_W

Bit 14 - USART1 clock enable during sleep mode bit

pub fn spi1smen(&mut self) -> SPI1SMEN_W

Bit 12 - SPI1 clock enable during sleep mode bit

pub fn adcsmen(&mut self) -> ADCSMEN_W

Bit 9 - ADC clock enable during sleep mode bit

pub fn tim22smen(&mut self) -> TIM22SMEN_W

Bit 5 - TIM22 timer clock enable during sleep mode bit

pub fn tim21smen(&mut self) -> TIM21SMEN_W

Bit 2 - TIM21 timer clock enable during sleep mode bit

pub fn syscfgsmen(&mut self) -> SYSCFGSMEN_W

Bit 0 - System configuration controller clock enable during sleep mode bit

impl W<u32, Reg<u32, _APB1SMENR>>

pub fn lptim1smen(&mut self) -> LPTIM1SMEN_W

Bit 31 - Low power timer clock enable during sleep mode bit

pub fn dacsmen(&mut self) -> DACSMEN_W

Bit 29 - DAC interface clock enable during sleep mode bit

pub fn pwrsmen(&mut self) -> PWRSMEN_W

Bit 28 - Power interface clock enable during sleep mode bit

pub fn crssmen(&mut self) -> CRSSMEN_W

Bit 27 - Clock recovery system clock enable during sleep mode bit

pub fn usbsmen(&mut self) -> USBSMEN_W

Bit 23 - USB clock enable during sleep mode bit

pub fn i2c2smen(&mut self) -> I2C2SMEN_W

Bit 22 - I2C2 clock enable during sleep mode bit

pub fn i2c1smen(&mut self) -> I2C1SMEN_W

Bit 21 - I2C1 clock enable during sleep mode bit

pub fn lpuart1smen(&mut self) -> LPUART1SMEN_W

Bit 18 - LPUART1 clock enable during sleep mode bit

pub fn usart2smen(&mut self) -> USART2SMEN_W

Bit 17 - UART2 clock enable during sleep mode bit

pub fn spi2smen(&mut self) -> SPI2SMEN_W

Bit 14 - SPI2 clock enable during sleep mode bit

pub fn wwdgsmen(&mut self) -> WWDGSMEN_W

Bit 11 - Window watchdog clock enable during sleep mode bit

pub fn tim6smen(&mut self) -> TIM6SMEN_W

Bit 4 - Timer 6 clock enable during sleep mode bit

pub fn tim2smen(&mut self) -> TIM2SMEN_W

Bit 0 - Timer2 clock enable during sleep mode bit

pub fn tim3smen(&mut self) -> TIM3SMEN_W

Bit 1 - Timer3 clock enable during Sleep mode bit

pub fn tim7smen(&mut self) -> TIM7SMEN_W

Bit 5 - Timer 7 clock enable during Sleep mode bit

pub fn usart4smen(&mut self) -> USART4SMEN_W

Bit 19 - USART4 clock enable during Sleep mode bit

pub fn usart5smen(&mut self) -> USART5SMEN_W

Bit 20 - USART5 clock enable during Sleep mode bit

pub fn i2c3smen(&mut self) -> I2C3SMEN_W

Bit 30 - 2C3 clock enable during Sleep mode bit

impl W<u32, Reg<u32, _CCIPR>>

pub fn hsi48msel(&mut self) -> HSI48MSEL_W

Bit 26 - 48 MHz HSI48 clock source selection bit

pub fn i2c3sel(&mut self) -> I2C3SEL_W

Bits 16:17 - I2C3 clock source selection bits

pub fn lptim1sel(&mut self) -> LPTIM1SEL_W

Bits 18:19 - Low Power Timer clock source selection bits

pub fn i2c1sel(&mut self) -> I2C1SEL_W

Bits 12:13 - I2C1 clock source selection bits

pub fn lpuart1sel(&mut self) -> LPUART1SEL_W

Bits 10:11 - LPUART1 clock source selection bits

pub fn usart2sel(&mut self) -> USART2SEL_W

Bits 2:3 - USART2 clock source selection bits

pub fn usart1sel(&mut self) -> USART1SEL_W

Bits 0:1 - USART1 clock source selection bits

impl W<u32, Reg<u32, _CSR>>

pub fn lpwrrstf(&mut self) -> LPWRRSTF_W

Bit 31 - Low-power reset flag

pub fn wwdgrstf(&mut self) -> WWDGRSTF_W

Bit 30 - Window watchdog reset flag

pub fn iwdgrstf(&mut self) -> IWDGRSTF_W

Bit 29 - Independent watchdog reset flag

pub fn sftrstf(&mut self) -> SFTRSTF_W

Bit 28 - Software reset flag

pub fn porrstf(&mut self) -> PORRSTF_W

Bit 27 - POR/PDR reset flag

pub fn pinrstf(&mut self) -> PINRSTF_W

Bit 26 - PIN reset flag

pub fn oblrstf(&mut self) -> OBLRSTF_W

Bit 25 - OBLRSTF

pub fn rmvf(&mut self) -> RMVF_W

Bit 24 - Remove reset flag

pub fn rtcrst(&mut self) -> RTCRST_W

Bit 19 - RTC software reset bit

pub fn rtcen(&mut self) -> RTCEN_W

Bit 18 - RTC clock enable bit

pub fn rtcsel(&mut self) -> RTCSEL_W

Bits 16:17 - RTC and LCD clock source selection bits

pub fn csslsed(&mut self) -> CSSLSED_W

Bit 14 - CSS on LSE failure detection flag

pub fn csslseon(&mut self) -> CSSLSEON_W

Bit 13 - CSSLSEON

pub fn lsedrv(&mut self) -> LSEDRV_W

Bits 11:12 - LSEDRV

pub fn lsebyp(&mut self) -> LSEBYP_W

Bit 10 - External low-speed oscillator bypass bit

pub fn lseon(&mut self) -> LSEON_W

Bit 8 - External low-speed oscillator enable bit

pub fn lsirdy(&mut self) -> LSIRDY_W

Bit 1 - Internal low-speed oscillator ready bit

pub fn lsion(&mut self) -> LSION_W

Bit 0 - Internal low-speed oscillator enable

impl W<u32, Reg<u32, _CFGR1>>

pub fn mem_mode(&mut self) -> MEM_MODE_W

Bits 0:1 - Memory mapping selection bits

pub fn ufb(&mut self) -> UFB_W

Bit 3 - User bank swapping

impl W<u32, Reg<u32, _CFGR2>>

pub fn i2c2_fmp(&mut self) -> I2C2_FMP_W

Bit 13 - I2C2 Fm+ drive capability enable bit

pub fn i2c1_fmp(&mut self) -> I2C1_FMP_W

Bit 12 - I2C1 Fm+ drive capability enable bit

pub fn i2c_pb9_fmp(&mut self) -> I2C_PB9_FMP_W

Bit 11 - Fm+ drive capability on PB9 enable bit

pub fn i2c_pb8_fmp(&mut self) -> I2C_PB8_FMP_W

Bit 10 - Fm+ drive capability on PB8 enable bit

pub fn i2c_pb7_fmp(&mut self) -> I2C_PB7_FMP_W

Bit 9 - Fm+ drive capability on PB7 enable bit

pub fn i2c_pb6_fmp(&mut self) -> I2C_PB6_FMP_W

Bit 8 - Fm+ drive capability on PB6 enable bit

pub fn i2c3_fmp(&mut self) -> I2C3_FMP_W

Bit 14 - I2C3 Fm+ drive capability enable bit

pub fn fwdis(&mut self) -> FWDIS_W

Bit 0 - Firewall disable bit

impl W<u32, Reg<u32, _EXTICR1>>

pub fn exti3(&mut self) -> EXTI3_W

Bits 12:15 - EXTI x configuration (x = 0 to 3)

pub fn exti2(&mut self) -> EXTI2_W

Bits 8:11 - EXTI x configuration (x = 0 to 3)

pub fn exti1(&mut self) -> EXTI1_W

Bits 4:7 - EXTI x configuration (x = 0 to 3)

pub fn exti0(&mut self) -> EXTI0_W

Bits 0:3 - EXTI x configuration (x = 0 to 3)

impl W<u32, Reg<u32, _EXTICR2>>

pub fn exti7(&mut self) -> EXTI7_W

Bits 12:15 - EXTI x configuration (x = 4 to 7)

pub fn exti6(&mut self) -> EXTI6_W

Bits 8:11 - EXTI x configuration (x = 4 to 7)

pub fn exti5(&mut self) -> EXTI5_W

Bits 4:7 - EXTI x configuration (x = 4 to 7)

pub fn exti4(&mut self) -> EXTI4_W

Bits 0:3 - EXTI x configuration (x = 4 to 7)

impl W<u32, Reg<u32, _EXTICR3>>

pub fn exti11(&mut self) -> EXTI11_W

Bits 12:15 - EXTI x configuration (x = 8 to 11)

pub fn exti10(&mut self) -> EXTI10_W

Bits 8:11 - EXTI10

pub fn exti9(&mut self) -> EXTI9_W

Bits 4:7 - EXTI x configuration (x = 8 to 11)

pub fn exti8(&mut self) -> EXTI8_W

Bits 0:3 - EXTI x configuration (x = 8 to 11)

impl W<u32, Reg<u32, _EXTICR4>>

pub fn exti15(&mut self) -> EXTI15_W

Bits 12:15 - EXTI x configuration (x = 12 to 15)

pub fn exti14(&mut self) -> EXTI14_W

Bits 8:11 - EXTI14

pub fn exti13(&mut self) -> EXTI13_W

Bits 4:7 - EXTI13

pub fn exti12(&mut self) -> EXTI12_W

Bits 0:3 - EXTI12

impl W<u32, Reg<u32, _CFGR3>>

pub fn enbuf_sensor_adc(&mut self) -> ENBUF_SENSOR_ADC_W

Bit 9 - Sensor reference for ADC enable bit

pub fn sel_vref_out(&mut self) -> SEL_VREF_OUT_W

Bits 4:5 - BGAP_ADC connection bit

pub fn enref_hsi48(&mut self) -> ENREF_HSI48_W

Bit 13 - VREFINT reference for HSI48 oscillator enable bit

pub fn ref_lock(&mut self) -> REF_LOCK_W

Bit 31 - SYSCFG_CFGR3 lock bit

pub fn enbuf_vrefint_comp2(&mut self) -> ENBUF_VREFINT_COMP2_W

Bit 12 - VREFINT reference for COMP2 scaler enable bit

pub fn enbuf_vrefint_adc(&mut self) -> ENBUF_VREFINT_ADC_W

Bit 8 - VREFINT reference for ADC enable bit

pub fn en_vrefint(&mut self) -> EN_VREFINT_W

Bit 0 - VREFINT enable and scaler control for COMP2 enable bit

impl W<u32, Reg<u32, _COMP1_CSR>>

pub fn comp1polarity(&mut self) -> COMP1POLARITY_W

Bit 15 - Comparator 1 polarity selection bit

pub fn comp1lptimin1(&mut self) -> COMP1LPTIMIN1_W

Bit 12 - Comparator 1 LPTIM input propagation bit

pub fn comp1wm(&mut self) -> COMP1WM_W

Bit 8 - Comparator 1 window mode selection bit

pub fn comp1innsel(&mut self) -> COMP1INNSEL_W

Bits 4:5 - Comparator 1 Input Minus connection configuration bit

pub fn comp1en(&mut self) -> COMP1EN_W

Bit 0 - Comparator 1 enable bit

impl W<u32, Reg<u32, _COMP2_CSR>>

pub fn comp2polarity(&mut self) -> COMP2POLARITY_W

Bit 15 - Comparator 2 polarity selection bit

pub fn comp2lptimin1(&mut self) -> COMP2LPTIMIN1_W

Bit 13 - Comparator 2 LPTIM input 1 propagation bit

pub fn comp2lptimin2(&mut self) -> COMP2LPTIMIN2_W

Bit 12 - Comparator 2 LPTIM input 2 propagation bit

pub fn comp2inpsel(&mut self) -> COMP2INPSEL_W

Bits 8:10 - Comparator 2 Input Plus connection configuration bit

pub fn comp2innsel(&mut self) -> COMP2INNSEL_W

Bits 4:6 - Comparator 2 Input Minus connection configuration bit

pub fn comp2speed(&mut self) -> COMP2SPEED_W

Bit 3 - Comparator 2 power mode selection bit

pub fn comp2en(&mut self) -> COMP2EN_W

Bit 0 - Comparator 2 enable bit

impl W<u32, Reg<u32, _CR1>>

pub fn bidimode(&mut self) -> BIDIMODE_W

Bit 15 - Bidirectional data mode enable

pub fn bidioe(&mut self) -> BIDIOE_W

Bit 14 - Output enable in bidirectional mode

pub fn crcen(&mut self) -> CRCEN_W

Bit 13 - Hardware CRC calculation enable

pub fn crcnext(&mut self) -> CRCNEXT_W

Bit 12 - CRC transfer next

pub fn dff(&mut self) -> DFF_W

Bit 11 - Data frame format

pub fn rxonly(&mut self) -> RXONLY_W

Bit 10 - Receive only

pub fn ssm(&mut self) -> SSM_W

Bit 9 - Software slave management

pub fn ssi(&mut self) -> SSI_W

Bit 8 - Internal slave select

pub fn lsbfirst(&mut self) -> LSBFIRST_W

Bit 7 - Frame format

pub fn spe(&mut self) -> SPE_W

Bit 6 - SPI enable

pub fn br(&mut self) -> BR_W

Bits 3:5 - Baud rate control

pub fn mstr(&mut self) -> MSTR_W

Bit 2 - Master selection

pub fn cpol(&mut self) -> CPOL_W

Bit 1 - Clock polarity

pub fn cpha(&mut self) -> CPHA_W

Bit 0 - Clock phase

impl W<u32, Reg<u32, _CR2>>

pub fn rxdmaen(&mut self) -> RXDMAEN_W

Bit 0 - Rx buffer DMA enable

pub fn txdmaen(&mut self) -> TXDMAEN_W

Bit 1 - Tx buffer DMA enable

pub fn ssoe(&mut self) -> SSOE_W

Bit 2 - SS output enable

pub fn frf(&mut self) -> FRF_W

Bit 4 - Frame format

pub fn errie(&mut self) -> ERRIE_W

Bit 5 - Error interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W

Bit 6 - RX buffer not empty interrupt enable

pub fn txeie(&mut self) -> TXEIE_W

Bit 7 - Tx buffer empty interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn crcerr(&mut self) -> CRCERR_W

Bit 4 - CRC error flag

impl W<u32, Reg<u32, _DR>>

pub fn dr(&mut self) -> DR_W

Bits 0:15 - Data register

impl W<u32, Reg<u32, _CRCPR>>

pub fn crcpoly(&mut self) -> CRCPOLY_W

Bits 0:15 - CRC polynomial register

impl W<u32, Reg<u32, _I2SCFGR>>

pub fn i2smod(&mut self) -> I2SMOD_W

Bit 11 - I2S mode selection

pub fn i2se(&mut self) -> I2SE_W

Bit 10 - I2S Enable

pub fn i2scfg(&mut self) -> I2SCFG_W

Bits 8:9 - I2S configuration mode

pub fn pcmsync(&mut self) -> PCMSYNC_W

Bit 7 - PCM frame synchronization

pub fn i2sstd(&mut self) -> I2SSTD_W

Bits 4:5 - I2S standard selection

pub fn ckpol(&mut self) -> CKPOL_W

Bit 3 - Steady state clock polarity

pub fn datlen(&mut self) -> DATLEN_W

Bits 1:2 - Data length to be transferred

pub fn chlen(&mut self) -> CHLEN_W

Bit 0 - Channel length (number of bits per audio channel)

impl W<u32, Reg<u32, _I2SPR>>

pub fn mckoe(&mut self) -> MCKOE_W

Bit 9 - Master clock output enable

pub fn odd(&mut self) -> ODD_W

Bit 8 - Odd factor for the prescaler

pub fn i2sdiv(&mut self) -> I2SDIV_W

Bits 0:7 - I2S Linear prescaler

impl W<u32, Reg<u32, _CR1>>

pub fn pe(&mut self) -> PE_W

Bit 0 - Peripheral enable

pub fn txie(&mut self) -> TXIE_W

Bit 1 - TX Interrupt enable

pub fn rxie(&mut self) -> RXIE_W

Bit 2 - RX Interrupt enable

pub fn addrie(&mut self) -> ADDRIE_W

Bit 3 - Address match interrupt enable (slave only)

pub fn nackie(&mut self) -> NACKIE_W

Bit 4 - Not acknowledge received interrupt enable

pub fn stopie(&mut self) -> STOPIE_W

Bit 5 - STOP detection Interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 6 - Transfer Complete interrupt enable

pub fn errie(&mut self) -> ERRIE_W

Bit 7 - Error interrupts enable

pub fn dnf(&mut self) -> DNF_W

Bits 8:11 - Digital noise filter

pub fn anfoff(&mut self) -> ANFOFF_W

Bit 12 - Analog noise filter OFF

pub fn txdmaen(&mut self) -> TXDMAEN_W

Bit 14 - DMA transmission requests enable

pub fn rxdmaen(&mut self) -> RXDMAEN_W

Bit 15 - DMA reception requests enable

pub fn sbc(&mut self) -> SBC_W

Bit 16 - Slave byte control

pub fn nostretch(&mut self) -> NOSTRETCH_W

Bit 17 - Clock stretching disable

pub fn wupen(&mut self) -> WUPEN_W

Bit 18 - Wakeup from STOP enable

pub fn gcen(&mut self) -> GCEN_W

Bit 19 - General call enable

pub fn smbhen(&mut self) -> SMBHEN_W

Bit 20 - SMBus Host address enable

pub fn smbden(&mut self) -> SMBDEN_W

Bit 21 - SMBus Device Default address enable

pub fn alerten(&mut self) -> ALERTEN_W

Bit 22 - SMBUS alert enable

pub fn pecen(&mut self) -> PECEN_W

Bit 23 - PEC enable

impl W<u32, Reg<u32, _CR2>>

pub fn pecbyte(&mut self) -> PECBYTE_W

Bit 26 - Packet error checking byte

pub fn autoend(&mut self) -> AUTOEND_W

Bit 25 - Automatic end mode (master mode)

pub fn reload(&mut self) -> RELOAD_W

Bit 24 - NBYTES reload mode

pub fn nbytes(&mut self) -> NBYTES_W

Bits 16:23 - Number of bytes

pub fn nack(&mut self) -> NACK_W

Bit 15 - NACK generation (slave mode)

pub fn stop(&mut self) -> STOP_W

Bit 14 - Stop generation (master mode)

pub fn start(&mut self) -> START_W

Bit 13 - Start generation

pub fn head10r(&mut self) -> HEAD10R_W

Bit 12 - 10-bit address header only read direction (master receiver mode)

pub fn add10(&mut self) -> ADD10_W

Bit 11 - 10-bit addressing mode (master mode)

pub fn rd_wrn(&mut self) -> RD_WRN_W

Bit 10 - Transfer direction (master mode)

pub fn sadd(&mut self) -> SADD_W

Bits 0:9 - Slave address bit (master mode)

impl W<u32, Reg<u32, _OAR1>>

pub fn oa1(&mut self) -> OA1_W

Bits 0:9 - Interface address

pub fn oa1mode(&mut self) -> OA1MODE_W

Bit 10 - Own Address 1 10-bit mode

pub fn oa1en(&mut self) -> OA1EN_W

Bit 15 - Own Address 1 enable

impl W<u32, Reg<u32, _OAR2>>

pub fn oa2(&mut self) -> OA2_W

Bits 1:7 - Interface address

pub fn oa2msk(&mut self) -> OA2MSK_W

Bits 8:10 - Own Address 2 masks

pub fn oa2en(&mut self) -> OA2EN_W

Bit 15 - Own Address 2 enable

impl W<u32, Reg<u32, _TIMINGR>>

pub fn scll(&mut self) -> SCLL_W

Bits 0:7 - SCL low period (master mode)

pub fn sclh(&mut self) -> SCLH_W

Bits 8:15 - SCL high period (master mode)

pub fn sdadel(&mut self) -> SDADEL_W

Bits 16:19 - Data hold time

pub fn scldel(&mut self) -> SCLDEL_W

Bits 20:23 - Data setup time

pub fn presc(&mut self) -> PRESC_W

Bits 28:31 - Timing prescaler

impl W<u32, Reg<u32, _TIMEOUTR>>

pub fn timeouta(&mut self) -> TIMEOUTA_W

Bits 0:11 - Bus timeout A

pub fn tidle(&mut self) -> TIDLE_W

Bit 12 - Idle clock timeout detection

pub fn timouten(&mut self) -> TIMOUTEN_W

Bit 15 - Clock timeout enable

pub fn timeoutb(&mut self) -> TIMEOUTB_W

Bits 16:27 - Bus timeout B

pub fn texten(&mut self) -> TEXTEN_W

Bit 31 - Extended clock timeout enable

impl W<u32, Reg<u32, _ISR>>

pub fn txis(&mut self) -> TXIS_W

Bit 1 - Transmit interrupt status (transmitters)

pub fn txe(&mut self) -> TXE_W

Bit 0 - Transmit data register empty (transmitters)

impl W<u32, Reg<u32, _ICR>>

pub fn alertcf(&mut self) -> ALERTCF_W

Bit 13 - Alert flag clear

pub fn timoutcf(&mut self) -> TIMOUTCF_W

Bit 12 - Timeout detection flag clear

pub fn peccf(&mut self) -> PECCF_W

Bit 11 - PEC Error flag clear

pub fn ovrcf(&mut self) -> OVRCF_W

Bit 10 - Overrun/Underrun flag clear

pub fn arlocf(&mut self) -> ARLOCF_W

Bit 9 - Arbitration lost flag clear

pub fn berrcf(&mut self) -> BERRCF_W

Bit 8 - Bus error flag clear

pub fn stopcf(&mut self) -> STOPCF_W

Bit 5 - Stop detection flag clear

pub fn nackcf(&mut self) -> NACKCF_W

Bit 4 - Not Acknowledge flag clear

pub fn addrcf(&mut self) -> ADDRCF_W

Bit 3 - Address Matched flag clear

impl W<u32, Reg<u32, _TXDR>>

pub fn txdata(&mut self) -> TXDATA_W

Bits 0:7 - 8-bit transmit data

impl W<u32, Reg<u32, _CR>>

pub fn lpds(&mut self) -> LPDS_W

Bit 0 - Low-power deep sleep

pub fn pdds(&mut self) -> PDDS_W

Bit 1 - Power down deepsleep

pub fn cwuf(&mut self) -> CWUF_W

Bit 2 - Clear wakeup flag

pub fn csbf(&mut self) -> CSBF_W

Bit 3 - Clear standby flag

pub fn pvde(&mut self) -> PVDE_W

Bit 4 - Power voltage detector enable

pub fn pls(&mut self) -> PLS_W

Bits 5:7 - PVD level selection

pub fn dbp(&mut self) -> DBP_W

Bit 8 - Disable backup domain write protection

pub fn ulp(&mut self) -> ULP_W

Bit 9 - Ultra-low-power mode

pub fn fwu(&mut self) -> FWU_W

Bit 10 - Fast wakeup

pub fn vos(&mut self) -> VOS_W

Bits 11:12 - Voltage scaling range selection

pub fn ds_ee_koff(&mut self) -> DS_EE_KOFF_W

Bit 13 - Deep sleep mode with Flash memory kept off

pub fn lprun(&mut self) -> LPRUN_W

Bit 14 - Low power run mode

pub fn lpsdsr(&mut self) -> LPSDSR_W

Bit 0 - Low-power deepsleep/Sleep/Low-power run

impl W<u32, Reg<u32, _CSR>>

pub fn ewup2(&mut self) -> EWUP2_W

Bit 9 - Enable WKUP pin 2

pub fn ewup1(&mut self) -> EWUP1_W

Bit 8 - Enable WKUP pin 1

pub fn ewup3(&mut self) -> EWUP3_W

Bit 10 - Enable WKUP pin 3

impl W<u32, Reg<u32, _ACR>>

pub fn latency(&mut self) -> LATENCY_W

Bit 0 - Latency

pub fn prften(&mut self) -> PRFTEN_W

Bit 1 - Prefetch enable

pub fn sleep_pd(&mut self) -> SLEEP_PD_W

Bit 3 - Flash mode during Sleep

pub fn run_pd(&mut self) -> RUN_PD_W

Bit 4 - Flash mode during Run

pub fn disab_buf(&mut self) -> DISAB_BUF_W

Bit 5 - Disable Buffer

pub fn pre_read(&mut self) -> PRE_READ_W

Bit 6 - Pre-read data address

impl W<u32, Reg<u32, _PECR>>

pub fn pelock(&mut self) -> PELOCK_W

Bit 0 - FLASH_PECR and data EEPROM lock

pub fn prglock(&mut self) -> PRGLOCK_W

Bit 1 - Program memory lock

pub fn optlock(&mut self) -> OPTLOCK_W

Bit 2 - Option bytes block lock

pub fn prog(&mut self) -> PROG_W

Bit 3 - Program memory selection

pub fn data(&mut self) -> DATA_W

Bit 4 - Data EEPROM selection

pub fn fix(&mut self) -> FIX_W

Bit 8 - Fixed time data write for Byte, Half Word and Word programming

pub fn erase(&mut self) -> ERASE_W

Bit 9 - Page or Double Word erase mode

pub fn fprg(&mut self) -> FPRG_W

Bit 10 - Half Page/Double Word programming mode

pub fn parallelbank(&mut self) -> PARALLELBANK_W

Bit 15 - Parallel bank mode

pub fn eopie(&mut self) -> EOPIE_W

Bit 16 - End of programming interrupt enable

pub fn errie(&mut self) -> ERRIE_W

Bit 17 - Error interrupt enable

pub fn obl_launch(&mut self) -> OBL_LAUNCH_W

Bit 18 - Launch the option byte loading

impl W<u32, Reg<u32, _PDKEYR>>

pub fn pdkeyr(&mut self) -> PDKEYR_W

Bits 0:31 - RUN_PD in FLASH_ACR key

impl W<u32, Reg<u32, _PEKEYR>>

pub fn pekeyr(&mut self) -> PEKEYR_W

Bits 0:31 - FLASH_PEC and data EEPROM key

impl W<u32, Reg<u32, _PRGKEYR>>

pub fn prgkeyr(&mut self) -> PRGKEYR_W

Bits 0:31 - Program memory key

impl W<u32, Reg<u32, _OPTKEYR>>

pub fn optkeyr(&mut self) -> OPTKEYR_W

Bits 0:31 - Option byte key

impl W<u32, Reg<u32, _SR>>

pub fn eop(&mut self) -> EOP_W

Bit 1 - End of operation

pub fn wrperr(&mut self) -> WRPERR_W

Bit 8 - Write protected error

pub fn pgaerr(&mut self) -> PGAERR_W

Bit 9 - Programming alignment error

pub fn sizerr(&mut self) -> SIZERR_W

Bit 10 - Size error

pub fn optverr(&mut self) -> OPTVERR_W

Bit 11 - Option validity error

pub fn rderr(&mut self) -> RDERR_W

Bit 14 - RDERR

pub fn notzeroerr(&mut self) -> NOTZEROERR_W

Bit 16 - NOTZEROERR

pub fn fwwerr(&mut self) -> FWWERR_W

Bit 17 - FWWERR

impl W<u32, Reg<u32, _IMR>>

pub fn im0(&mut self) -> IM0_W

Bit 0 - Interrupt Mask on line 0

pub fn im1(&mut self) -> IM1_W

Bit 1 - Interrupt Mask on line 1

pub fn im2(&mut self) -> IM2_W

Bit 2 - Interrupt Mask on line 2

pub fn im3(&mut self) -> IM3_W

Bit 3 - Interrupt Mask on line 3

pub fn im4(&mut self) -> IM4_W

Bit 4 - Interrupt Mask on line 4

pub fn im5(&mut self) -> IM5_W

Bit 5 - Interrupt Mask on line 5

pub fn im6(&mut self) -> IM6_W

Bit 6 - Interrupt Mask on line 6

pub fn im7(&mut self) -> IM7_W

Bit 7 - Interrupt Mask on line 7

pub fn im8(&mut self) -> IM8_W

Bit 8 - Interrupt Mask on line 8

pub fn im9(&mut self) -> IM9_W

Bit 9 - Interrupt Mask on line 9

pub fn im10(&mut self) -> IM10_W

Bit 10 - Interrupt Mask on line 10

pub fn im11(&mut self) -> IM11_W

Bit 11 - Interrupt Mask on line 11

pub fn im12(&mut self) -> IM12_W

Bit 12 - Interrupt Mask on line 12

pub fn im13(&mut self) -> IM13_W

Bit 13 - Interrupt Mask on line 13

pub fn im14(&mut self) -> IM14_W

Bit 14 - Interrupt Mask on line 14

pub fn im15(&mut self) -> IM15_W

Bit 15 - Interrupt Mask on line 15

pub fn im16(&mut self) -> IM16_W

Bit 16 - Interrupt Mask on line 16

pub fn im17(&mut self) -> IM17_W

Bit 17 - Interrupt Mask on line 17

pub fn im18(&mut self) -> IM18_W

Bit 18 - Interrupt Mask on line 18

pub fn im19(&mut self) -> IM19_W

Bit 19 - Interrupt Mask on line 19

pub fn im20(&mut self) -> IM20_W

Bit 20 - Interrupt Mask on line 20

pub fn im21(&mut self) -> IM21_W

Bit 21 - Interrupt Mask on line 21

pub fn im22(&mut self) -> IM22_W

Bit 22 - Interrupt Mask on line 22

pub fn im23(&mut self) -> IM23_W

Bit 23 - Interrupt Mask on line 23

pub fn im24(&mut self) -> IM24_W

Bit 24 - Interrupt Mask on line 24

pub fn im25(&mut self) -> IM25_W

Bit 25 - Interrupt Mask on line 25

pub fn im26(&mut self) -> IM26_W

Bit 26 - Interrupt Mask on line 27

pub fn im28(&mut self) -> IM28_W

Bit 28 - Interrupt Mask on line 27

pub fn im29(&mut self) -> IM29_W

Bit 29 - Interrupt Mask on line 27

impl W<u32, Reg<u32, _EMR>>

pub fn em0(&mut self) -> EM0_W

Bit 0 - Event Mask on line 0

pub fn em1(&mut self) -> EM1_W

Bit 1 - Event Mask on line 1

pub fn em2(&mut self) -> EM2_W

Bit 2 - Event Mask on line 2

pub fn em3(&mut self) -> EM3_W

Bit 3 - Event Mask on line 3

pub fn em4(&mut self) -> EM4_W

Bit 4 - Event Mask on line 4

pub fn em5(&mut self) -> EM5_W

Bit 5 - Event Mask on line 5

pub fn em6(&mut self) -> EM6_W

Bit 6 - Event Mask on line 6

pub fn em7(&mut self) -> EM7_W

Bit 7 - Event Mask on line 7

pub fn em8(&mut self) -> EM8_W

Bit 8 - Event Mask on line 8

pub fn em9(&mut self) -> EM9_W

Bit 9 - Event Mask on line 9

pub fn em10(&mut self) -> EM10_W

Bit 10 - Event Mask on line 10

pub fn em11(&mut self) -> EM11_W

Bit 11 - Event Mask on line 11

pub fn em12(&mut self) -> EM12_W

Bit 12 - Event Mask on line 12

pub fn em13(&mut self) -> EM13_W

Bit 13 - Event Mask on line 13

pub fn em14(&mut self) -> EM14_W

Bit 14 - Event Mask on line 14

pub fn em15(&mut self) -> EM15_W

Bit 15 - Event Mask on line 15

pub fn em16(&mut self) -> EM16_W

Bit 16 - Event Mask on line 16

pub fn em17(&mut self) -> EM17_W

Bit 17 - Event Mask on line 17

pub fn em18(&mut self) -> EM18_W

Bit 18 - Event Mask on line 18

pub fn em19(&mut self) -> EM19_W

Bit 19 - Event Mask on line 19

pub fn em20(&mut self) -> EM20_W

Bit 20 - Event Mask on line 20

pub fn em21(&mut self) -> EM21_W

Bit 21 - Event Mask on line 21

pub fn em22(&mut self) -> EM22_W

Bit 22 - Event Mask on line 22

pub fn em23(&mut self) -> EM23_W

Bit 23 - Event Mask on line 23

pub fn em24(&mut self) -> EM24_W

Bit 24 - Event Mask on line 24

pub fn em25(&mut self) -> EM25_W

Bit 25 - Event Mask on line 25

pub fn em26(&mut self) -> EM26_W

Bit 26 - Event Mask on line 26

pub fn em28(&mut self) -> EM28_W

Bit 28 - Event Mask on line 28

pub fn em29(&mut self) -> EM29_W

Bit 29 - Event Mask on line 29

impl W<u32, Reg<u32, _RTSR>>

pub fn rt0(&mut self) -> RT0_W

Bit 0 - Rising trigger event configuration of line 0

pub fn rt1(&mut self) -> RT1_W

Bit 1 - Rising trigger event configuration of line 1

pub fn rt2(&mut self) -> RT2_W

Bit 2 - Rising trigger event configuration of line 2

pub fn rt3(&mut self) -> RT3_W

Bit 3 - Rising trigger event configuration of line 3

pub fn rt4(&mut self) -> RT4_W

Bit 4 - Rising trigger event configuration of line 4

pub fn rt5(&mut self) -> RT5_W

Bit 5 - Rising trigger event configuration of line 5

pub fn rt6(&mut self) -> RT6_W

Bit 6 - Rising trigger event configuration of line 6

pub fn rt7(&mut self) -> RT7_W

Bit 7 - Rising trigger event configuration of line 7

pub fn rt8(&mut self) -> RT8_W

Bit 8 - Rising trigger event configuration of line 8

pub fn rt9(&mut self) -> RT9_W

Bit 9 - Rising trigger event configuration of line 9

pub fn rt10(&mut self) -> RT10_W

Bit 10 - Rising trigger event configuration of line 10

pub fn rt11(&mut self) -> RT11_W

Bit 11 - Rising trigger event configuration of line 11

pub fn rt12(&mut self) -> RT12_W

Bit 12 - Rising trigger event configuration of line 12

pub fn rt13(&mut self) -> RT13_W

Bit 13 - Rising trigger event configuration of line 13

pub fn rt14(&mut self) -> RT14_W

Bit 14 - Rising trigger event configuration of line 14

pub fn rt15(&mut self) -> RT15_W

Bit 15 - Rising trigger event configuration of line 15

pub fn rt16(&mut self) -> RT16_W

Bit 16 - Rising trigger event configuration of line 16

pub fn rt17(&mut self) -> RT17_W

Bit 17 - Rising trigger event configuration of line 17

pub fn rt19(&mut self) -> RT19_W

Bit 19 - Rising trigger event configuration of line 19

pub fn rt20(&mut self) -> RT20_W

Bit 20 - Rising trigger event configuration of line 20

pub fn rt21(&mut self) -> RT21_W

Bit 21 - Rising trigger event configuration of line 21

pub fn rt22(&mut self) -> RT22_W

Bit 22 - Rising trigger event configuration of line 22

impl W<u32, Reg<u32, _FTSR>>

pub fn ft0(&mut self) -> FT0_W

Bit 0 - Falling trigger event configuration of line 0

pub fn ft1(&mut self) -> FT1_W

Bit 1 - Falling trigger event configuration of line 1

pub fn ft2(&mut self) -> FT2_W

Bit 2 - Falling trigger event configuration of line 2

pub fn ft3(&mut self) -> FT3_W

Bit 3 - Falling trigger event configuration of line 3

pub fn ft4(&mut self) -> FT4_W

Bit 4 - Falling trigger event configuration of line 4

pub fn ft5(&mut self) -> FT5_W

Bit 5 - Falling trigger event configuration of line 5

pub fn ft6(&mut self) -> FT6_W

Bit 6 - Falling trigger event configuration of line 6

pub fn ft7(&mut self) -> FT7_W

Bit 7 - Falling trigger event configuration of line 7

pub fn ft8(&mut self) -> FT8_W

Bit 8 - Falling trigger event configuration of line 8

pub fn ft9(&mut self) -> FT9_W

Bit 9 - Falling trigger event configuration of line 9

pub fn ft10(&mut self) -> FT10_W

Bit 10 - Falling trigger event configuration of line 10

pub fn ft11(&mut self) -> FT11_W

Bit 11 - Falling trigger event configuration of line 11

pub fn ft12(&mut self) -> FT12_W

Bit 12 - Falling trigger event configuration of line 12

pub fn ft13(&mut self) -> FT13_W

Bit 13 - Falling trigger event configuration of line 13

pub fn ft14(&mut self) -> FT14_W

Bit 14 - Falling trigger event configuration of line 14

pub fn ft15(&mut self) -> FT15_W

Bit 15 - Falling trigger event configuration of line 15

pub fn ft16(&mut self) -> FT16_W

Bit 16 - Falling trigger event configuration of line 16

pub fn ft17(&mut self) -> FT17_W

Bit 17 - Falling trigger event configuration of line 17

pub fn ft19(&mut self) -> FT19_W

Bit 19 - Falling trigger event configuration of line 19

pub fn ft20(&mut self) -> FT20_W

Bit 20 - Falling trigger event configuration of line 20

pub fn ft21(&mut self) -> FT21_W

Bit 21 - Falling trigger event configuration of line 21

pub fn ft22(&mut self) -> FT22_W

Bit 22 - Falling trigger event configuration of line 22

impl W<u32, Reg<u32, _SWIER>>

pub fn swi0(&mut self) -> SWI0_W

Bit 0 - Software Interrupt on line 0

pub fn swi1(&mut self) -> SWI1_W

Bit 1 - Software Interrupt on line 1

pub fn swi2(&mut self) -> SWI2_W

Bit 2 - Software Interrupt on line 2

pub fn swi3(&mut self) -> SWI3_W

Bit 3 - Software Interrupt on line 3

pub fn swi4(&mut self) -> SWI4_W

Bit 4 - Software Interrupt on line 4

pub fn swi5(&mut self) -> SWI5_W

Bit 5 - Software Interrupt on line 5

pub fn swi6(&mut self) -> SWI6_W

Bit 6 - Software Interrupt on line 6

pub fn swi7(&mut self) -> SWI7_W

Bit 7 - Software Interrupt on line 7

pub fn swi8(&mut self) -> SWI8_W

Bit 8 - Software Interrupt on line 8

pub fn swi9(&mut self) -> SWI9_W

Bit 9 - Software Interrupt on line 9

pub fn swi10(&mut self) -> SWI10_W

Bit 10 - Software Interrupt on line 10

pub fn swi11(&mut self) -> SWI11_W

Bit 11 - Software Interrupt on line 11

pub fn swi12(&mut self) -> SWI12_W

Bit 12 - Software Interrupt on line 12

pub fn swi13(&mut self) -> SWI13_W

Bit 13 - Software Interrupt on line 13

pub fn swi14(&mut self) -> SWI14_W

Bit 14 - Software Interrupt on line 14

pub fn swi15(&mut self) -> SWI15_W

Bit 15 - Software Interrupt on line 15

pub fn swi16(&mut self) -> SWI16_W

Bit 16 - Software Interrupt on line 16

pub fn swi17(&mut self) -> SWI17_W

Bit 17 - Software Interrupt on line 17

pub fn swi19(&mut self) -> SWI19_W

Bit 19 - Software Interrupt on line 19

pub fn swi20(&mut self) -> SWI20_W

Bit 20 - Software Interrupt on line 20

pub fn swi21(&mut self) -> SWI21_W

Bit 21 - Software Interrupt on line 21

pub fn swi22(&mut self) -> SWI22_W

Bit 22 - Software Interrupt on line 22

impl W<u32, Reg<u32, _PR>>

pub fn pif0(&mut self) -> PIF0_W

Bit 0 - Pending bit 0

pub fn pif1(&mut self) -> PIF1_W

Bit 1 - Pending bit 1

pub fn pif2(&mut self) -> PIF2_W

Bit 2 - Pending bit 2

pub fn pif3(&mut self) -> PIF3_W

Bit 3 - Pending bit 3

pub fn pif4(&mut self) -> PIF4_W

Bit 4 - Pending bit 4

pub fn pif5(&mut self) -> PIF5_W

Bit 5 - Pending bit 5

pub fn pif6(&mut self) -> PIF6_W

Bit 6 - Pending bit 6

pub fn pif7(&mut self) -> PIF7_W

Bit 7 - Pending bit 7

pub fn pif8(&mut self) -> PIF8_W

Bit 8 - Pending bit 8

pub fn pif9(&mut self) -> PIF9_W

Bit 9 - Pending bit 9

pub fn pif10(&mut self) -> PIF10_W

Bit 10 - Pending bit 10

pub fn pif11(&mut self) -> PIF11_W

Bit 11 - Pending bit 11

pub fn pif12(&mut self) -> PIF12_W

Bit 12 - Pending bit 12

pub fn pif13(&mut self) -> PIF13_W

Bit 13 - Pending bit 13

pub fn pif14(&mut self) -> PIF14_W

Bit 14 - Pending bit 14

pub fn pif15(&mut self) -> PIF15_W

Bit 15 - Pending bit 15

pub fn pif16(&mut self) -> PIF16_W

Bit 16 - Pending bit 16

pub fn pif17(&mut self) -> PIF17_W

Bit 17 - Pending bit 17

pub fn pif19(&mut self) -> PIF19_W

Bit 19 - Pending bit 19

pub fn pif20(&mut self) -> PIF20_W

Bit 20 - Pending bit 20

pub fn pif21(&mut self) -> PIF21_W

Bit 21 - Pending bit 21

pub fn pif22(&mut self) -> PIF22_W

Bit 22 - Pending bit 22

impl W<u32, Reg<u32, _ISR>>

pub fn adrdy(&mut self) -> ADRDY_W

Bit 0 - ADC ready

pub fn eosmp(&mut self) -> EOSMP_W

Bit 1 - End of sampling flag

pub fn eoc(&mut self) -> EOC_W

Bit 2 - End of conversion flag

pub fn eos(&mut self) -> EOS_W

Bit 3 - End of sequence flag

pub fn ovr(&mut self) -> OVR_W

Bit 4 - ADC overrun

pub fn awd(&mut self) -> AWD_W

Bit 7 - Analog watchdog flag

pub fn eocal(&mut self) -> EOCAL_W

Bit 11 - End Of Calibration flag

impl W<u32, Reg<u32, _IER>>

pub fn adrdyie(&mut self) -> ADRDYIE_W

Bit 0 - ADC ready interrupt enable

pub fn eosmpie(&mut self) -> EOSMPIE_W

Bit 1 - End of sampling flag interrupt enable

pub fn eocie(&mut self) -> EOCIE_W

Bit 2 - End of conversion interrupt enable

pub fn eosie(&mut self) -> EOSIE_W

Bit 3 - End of conversion sequence interrupt enable

pub fn ovrie(&mut self) -> OVRIE_W

Bit 4 - Overrun interrupt enable

pub fn awdie(&mut self) -> AWDIE_W

Bit 7 - Analog watchdog interrupt enable

pub fn eocalie(&mut self) -> EOCALIE_W

Bit 11 - End of calibration interrupt enable

impl W<u32, Reg<u32, _CR>>

pub fn aden(&mut self) -> ADEN_W

Bit 0 - ADC enable command

pub fn addis(&mut self) -> ADDIS_W

Bit 1 - ADC disable command

pub fn adstart(&mut self) -> ADSTART_W

Bit 2 - ADC start conversion command

pub fn adstp(&mut self) -> ADSTP_W

Bit 4 - ADC stop conversion command

pub fn advregen(&mut self) -> ADVREGEN_W

Bit 28 - ADC Voltage Regulator Enable

pub fn adcal(&mut self) -> ADCAL_W

Bit 31 - ADC calibration

impl W<u32, Reg<u32, _CFGR1>>

pub fn awdch(&mut self) -> AWDCH_W

Bits 26:30 - Analog watchdog channel selection

pub fn awden(&mut self) -> AWDEN_W

Bit 23 - Analog watchdog enable

pub fn awdsgl(&mut self) -> AWDSGL_W

Bit 22 - Enable the watchdog on a single channel or on all channels

pub fn discen(&mut self) -> DISCEN_W

Bit 16 - Discontinuous mode

pub fn autoff(&mut self) -> AUTOFF_W

Bit 15 - Auto-off mode

pub fn wait(&mut self) -> WAIT_W

Bit 14 - Auto-delayed conversion mode

pub fn cont(&mut self) -> CONT_W

Bit 13 - Single / continuous conversion mode

pub fn ovrmod(&mut self) -> OVRMOD_W

Bit 12 - Overrun management mode

pub fn exten(&mut self) -> EXTEN_W

Bits 10:11 - External trigger enable and polarity selection

pub fn extsel(&mut self) -> EXTSEL_W

Bits 6:8 - External trigger selection

pub fn align(&mut self) -> ALIGN_W

Bit 5 - Data alignment

pub fn res(&mut self) -> RES_W

Bits 3:4 - Data resolution

pub fn scandir(&mut self) -> SCANDIR_W

Bit 2 - Scan sequence direction

pub fn dmacfg(&mut self) -> DMACFG_W

Bit 1 - Direct memery access configuration

pub fn dmaen(&mut self) -> DMAEN_W

Bit 0 - Direct memory access enable

impl W<u32, Reg<u32, _CFGR2>>

pub fn ovse(&mut self) -> OVSE_W

Bit 0 - Oversampler Enable

pub fn ovsr(&mut self) -> OVSR_W

Bits 2:4 - Oversampling ratio

pub fn ovss(&mut self) -> OVSS_W

Bits 5:8 - Oversampling shift

pub fn tovs(&mut self) -> TOVS_W

Bit 9 - Triggered Oversampling

pub fn ckmode(&mut self) -> CKMODE_W

Bits 30:31 - ADC clock mode

impl W<u32, Reg<u32, _SMPR>>

pub fn smp(&mut self) -> SMP_W

Bits 0:2 - Sampling time selection

impl W<u32, Reg<u32, _TR>>

pub fn ht(&mut self) -> HT_W

Bits 16:27 - Analog watchdog higher threshold

pub fn lt(&mut self) -> LT_W

Bits 0:11 - Analog watchdog lower threshold

impl W<u32, Reg<u32, _CHSELR>>

pub fn chsel18(&mut self) -> CHSEL18_W

Bit 18 - Channel-x selection

pub fn chsel17(&mut self) -> CHSEL17_W

Bit 17 - Channel-x selection

pub fn chsel16(&mut self) -> CHSEL16_W

Bit 16 - Channel-x selection

pub fn chsel15(&mut self) -> CHSEL15_W

Bit 15 - Channel-x selection

pub fn chsel14(&mut self) -> CHSEL14_W

Bit 14 - Channel-x selection

pub fn chsel13(&mut self) -> CHSEL13_W

Bit 13 - Channel-x selection

pub fn chsel12(&mut self) -> CHSEL12_W

Bit 12 - Channel-x selection

pub fn chsel11(&mut self) -> CHSEL11_W

Bit 11 - Channel-x selection

pub fn chsel10(&mut self) -> CHSEL10_W

Bit 10 - Channel-x selection

pub fn chsel9(&mut self) -> CHSEL9_W

Bit 9 - Channel-x selection

pub fn chsel8(&mut self) -> CHSEL8_W

Bit 8 - Channel-x selection

pub fn chsel7(&mut self) -> CHSEL7_W

Bit 7 - Channel-x selection

pub fn chsel6(&mut self) -> CHSEL6_W

Bit 6 - Channel-x selection

pub fn chsel5(&mut self) -> CHSEL5_W

Bit 5 - Channel-x selection

pub fn chsel4(&mut self) -> CHSEL4_W

Bit 4 - Channel-x selection

pub fn chsel3(&mut self) -> CHSEL3_W

Bit 3 - Channel-x selection

pub fn chsel2(&mut self) -> CHSEL2_W

Bit 2 - Channel-x selection

pub fn chsel1(&mut self) -> CHSEL1_W

Bit 1 - Channel-x selection

pub fn chsel0(&mut self) -> CHSEL0_W

Bit 0 - Channel-x selection

impl W<u32, Reg<u32, _CALFACT>>

pub fn calfact(&mut self) -> CALFACT_W

Bits 0:6 - Calibration factor

impl W<u32, Reg<u32, _CCR>>

pub fn presc(&mut self) -> PRESC_W

Bits 18:21 - ADC prescaler

pub fn vrefen(&mut self) -> VREFEN_W

Bit 22 - VREFINT enable

pub fn tsen(&mut self) -> TSEN_W

Bit 23 - Temperature sensor enable

pub fn lfmen(&mut self) -> LFMEN_W

Bit 25 - Low Frequency Mode enable

pub fn vlcden(&mut self) -> VLCDEN_W

Bit 24 - VLCD reading circuitry enable

impl W<u32, Reg<u32, _CR>>

pub fn dbg_stop(&mut self) -> DBG_STOP_W

Bit 1 - Debug Stop Mode

pub fn dbg_standby(&mut self) -> DBG_STANDBY_W

Bit 2 - Debug Standby Mode

pub fn dbg_sleep(&mut self) -> DBG_SLEEP_W

Bit 0 - Debug Sleep Mode

impl W<u32, Reg<u32, _APB1_FZ>>

pub fn dbg_timer2_stop(&mut self) -> DBG_TIMER2_STOP_W

Bit 0 - Debug Timer 2 stopped when Core is halted

pub fn dbg_timer6_stop(&mut self) -> DBG_TIMER6_STOP_W

Bit 4 - Debug Timer 6 stopped when Core is halted

pub fn dbg_rtc_stop(&mut self) -> DBG_RTC_STOP_W

Bit 10 - Debug RTC stopped when Core is halted

pub fn dbg_wwdg_stop(&mut self) -> DBG_WWDG_STOP_W

Bit 11 - Debug Window Wachdog stopped when Core is halted

pub fn dbg_iwdg_stop(&mut self) -> DBG_IWDG_STOP_W

Bit 12 - Debug Independent Wachdog stopped when Core is halted

pub fn dbg_i2c1_stop(&mut self) -> DBG_I2C1_STOP_W

Bit 21 - I2C1 SMBUS timeout mode stopped when core is halted

pub fn dbg_i2c2_stop(&mut self) -> DBG_I2C2_STOP_W

Bit 22 - I2C2 SMBUS timeout mode stopped when core is halted

pub fn dbg_lptimer_stop(&mut self) -> DBG_LPTIMER_STOP_W

Bit 31 - LPTIM1 counter stopped when core is halted

impl W<u32, Reg<u32, _APB2_FZ>>

pub fn dbg_timer21_stop(&mut self) -> DBG_TIMER21_STOP_W

Bit 2 - Debug Timer 21 stopped when Core is halted

pub fn dbg_timer22_sto(&mut self) -> DBG_TIMER22_STO_W

Bit 6 - Debug Timer 22 stopped when Core is halted

impl W<u32, Reg<u32, _CR1>>

pub fn ckd(&mut self) -> CKD_W

Bits 8:9 - Clock division

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn cms(&mut self) -> CMS_W

Bits 5:6 - Center-aligned mode selection

pub fn dir(&mut self) -> DIR_W

Bit 4 - Direction

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

impl W<u32, Reg<u32, _CR2>>

pub fn ti1s(&mut self) -> TI1S_W

Bit 7 - TI1 selection

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

pub fn ccds(&mut self) -> CCDS_W

Bit 3 - Capture/compare DMA selection

impl W<u32, Reg<u32, _SMCR>>

pub fn etp(&mut self) -> ETP_W

Bit 15 - External trigger polarity

pub fn ece(&mut self) -> ECE_W

Bit 14 - External clock enable

pub fn etps(&mut self) -> ETPS_W

Bits 12:13 - External trigger prescaler

pub fn etf(&mut self) -> ETF_W

Bits 8:11 - External trigger filter

pub fn msm(&mut self) -> MSM_W

Bit 7 - Master/Slave mode

pub fn ts(&mut self) -> TS_W

Bits 4:6 - Trigger selection

pub fn sms(&mut self) -> SMS_W

Bits 0:2 - Slave mode selection

impl W<u32, Reg<u32, _DIER>>

pub fn tde(&mut self) -> TDE_W

Bit 14 - Trigger DMA request enable

pub fn cc4de(&mut self) -> CC4DE_W

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&mut self) -> CC3DE_W

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&mut self) -> CC2DE_W

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&mut self) -> CC1DE_W

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&mut self) -> UDE_W

Bit 8 - Update DMA request enable

pub fn tie(&mut self) -> TIE_W

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&mut self) -> CC4IE_W

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&mut self) -> CC3IE_W

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn cc4of(&mut self) -> CC4OF_W

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&mut self) -> CC3OF_W

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&mut self) -> CC2OF_W

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W

Bit 6 - Trigger interrupt flag

pub fn cc4if(&mut self) -> CC4IF_W

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&mut self) -> CC3IF_W

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn tg(&mut self) -> TG_W

Bit 6 - Trigger generation

pub fn cc4g(&mut self) -> CC4G_W

Bit 4 - Capture/compare 4 generation

pub fn cc3g(&mut self) -> CC3G_W

Bit 3 - Capture/compare 3 generation

pub fn cc2g(&mut self) -> CC2G_W

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>

pub fn oc2ce(&mut self) -> OC2CE_W

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&mut self) -> OC2M_W

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&mut self) -> OC1CE_W

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&mut self) -> OC1M_W

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>

pub fn ic2f(&mut self) -> IC2F_W

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR2_OUTPUT>>

pub fn oc4ce(&mut self) -> OC4CE_W

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&mut self) -> OC4M_W

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&mut self) -> OC4PE_W

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&mut self) -> OC4FE_W

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&mut self) -> CC4S_W

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&mut self) -> OC3CE_W

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&mut self) -> OC3M_W

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&mut self) -> OC3PE_W

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&mut self) -> OC3FE_W

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&mut self) -> CC3S_W

Bits 0:1 - Capture/Compare 3 selection

impl W<u32, Reg<u32, _CCMR2_INPUT>>

pub fn ic4f(&mut self) -> IC4F_W

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&mut self) -> IC4PSC_W

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&mut self) -> CC4S_W

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&mut self) -> IC3F_W

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&mut self) -> IC3PSC_W

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&mut self) -> CC3S_W

Bits 0:1 - Capture/Compare 3 selection

impl W<u32, Reg<u32, _CCER>>

pub fn cc4np(&mut self) -> CC4NP_W

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc4p(&mut self) -> CC4P_W

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&mut self) -> CC4E_W

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&mut self) -> CC3NP_W

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3p(&mut self) -> CC3P_W

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&mut self) -> CC3E_W

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&mut self) -> CC2NP_W

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _DCR>>

pub fn dbl(&mut self) -> DBL_W

Bits 8:12 - DMA burst length

pub fn dba(&mut self) -> DBA_W

Bits 0:4 - DMA base address

impl W<u32, Reg<u32, _DMAR>>

pub fn dmab(&mut self) -> DMAB_W

Bits 0:15 - DMA register for burst accesses

impl W<u32, Reg<u32, _OR>>

pub fn etr_rmp(&mut self) -> ETR_RMP_W

Bits 0:2 - Timer2 ETR remap

pub fn ti4_rmp(&mut self) -> TI4_RMP_W

Bits 3:4 - Internal trigger

impl W<u16, Reg<u16, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - Low counter value

impl W<u16, Reg<u16, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Low Auto-reload value

impl W<u16, Reg<u16, _CCR>>

pub fn ccr(&mut self) -> CCR_W

Bits 0:15 - Low Capture/Compare 1 value

impl W<u32, Reg<u32, _CR1>>

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

impl W<u32, Reg<u32, _CR2>>

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

impl W<u32, Reg<u32, _DIER>>

pub fn ude(&mut self) -> UDE_W

Bit 8 - Update DMA request enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - Low counter value

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Low Auto-reload value

impl W<u32, Reg<u32, _CR1>>

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn dir(&mut self) -> DIR_W

Bit 4 - Direction

pub fn cms(&mut self) -> CMS_W

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn ckd(&mut self) -> CKD_W

Bits 8:9 - Clock division

impl W<u32, Reg<u32, _CR2>>

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

impl W<u32, Reg<u32, _SMCR>>

pub fn sms(&mut self) -> SMS_W

Bits 0:2 - Slave mode selection

pub fn ts(&mut self) -> TS_W

Bits 4:6 - Trigger selection

pub fn msm(&mut self) -> MSM_W

Bit 7 - Master/Slave mode

pub fn etf(&mut self) -> ETF_W

Bits 8:11 - External trigger filter

pub fn etps(&mut self) -> ETPS_W

Bits 12:13 - External trigger prescaler

pub fn ece(&mut self) -> ECE_W

Bit 14 - External clock enable

pub fn etp(&mut self) -> ETP_W

Bit 15 - External trigger polarity

impl W<u32, Reg<u32, _DIER>>

pub fn tie(&mut self) -> TIE_W

Bit 6 - Trigger interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn cc2of(&mut self) -> CC2OF_W

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W

Bit 6 - Trigger interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn tg(&mut self) -> TG_W

Bit 6 - Trigger generation

pub fn cc2g(&mut self) -> CC2G_W

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>

pub fn oc2m(&mut self) -> OC2M_W

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1m(&mut self) -> OC1M_W

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>

pub fn ic2f(&mut self) -> IC2F_W

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCER>>

pub fn cc2np(&mut self) -> CC2NP_W

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - counter value

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Auto-reload value

impl W<u32, Reg<u32, _CCR>>

pub fn ccr(&mut self) -> CCR_W

Bits 0:15 - Capture/Compare 1 value

impl W<u32, Reg<u32, _OR>>

pub fn etr_rmp(&mut self) -> ETR_RMP_W

Bits 0:1 - Timer21 ETR remap

pub fn ti1_rmp(&mut self) -> TI1_RMP_W

Bits 2:4 - Timer21 TI1

pub fn ti2_rmp(&mut self) -> TI2_RMP_W

Bit 5 - Timer21 TI2

impl W<u32, Reg<u32, _CR1>>

pub fn cen(&mut self) -> CEN_W

Bit 0 - Counter enable

pub fn udis(&mut self) -> UDIS_W

Bit 1 - Update disable

pub fn urs(&mut self) -> URS_W

Bit 2 - Update request source

pub fn opm(&mut self) -> OPM_W

Bit 3 - One-pulse mode

pub fn dir(&mut self) -> DIR_W

Bit 4 - Direction

pub fn cms(&mut self) -> CMS_W

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&mut self) -> ARPE_W

Bit 7 - Auto-reload preload enable

pub fn ckd(&mut self) -> CKD_W

Bits 8:9 - Clock division

impl W<u32, Reg<u32, _CR2>>

pub fn mms(&mut self) -> MMS_W

Bits 4:6 - Master mode selection

impl W<u32, Reg<u32, _SMCR>>

pub fn sms(&mut self) -> SMS_W

Bits 0:2 - Slave mode selection

pub fn ts(&mut self) -> TS_W

Bits 4:6 - Trigger selection

pub fn msm(&mut self) -> MSM_W

Bit 7 - Master/Slave mode

pub fn etf(&mut self) -> ETF_W

Bits 8:11 - External trigger filter

pub fn etps(&mut self) -> ETPS_W

Bits 12:13 - External trigger prescaler

pub fn ece(&mut self) -> ECE_W

Bit 14 - External clock enable

pub fn etp(&mut self) -> ETP_W

Bit 15 - External trigger polarity

impl W<u32, Reg<u32, _DIER>>

pub fn tie(&mut self) -> TIE_W

Bit 6 - Trigger interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>

pub fn cc2of(&mut self) -> CC2OF_W

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W

Bit 6 - Trigger interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>

pub fn tg(&mut self) -> TG_W

Bit 6 - Trigger generation

pub fn cc2g(&mut self) -> CC2G_W

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>

pub fn oc2m(&mut self) -> OC2M_W

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1m(&mut self) -> OC1M_W

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>

pub fn ic2f(&mut self) -> IC2F_W

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCER>>

pub fn cc2np(&mut self) -> CC2NP_W

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _CNT>>

pub fn cnt(&mut self) -> CNT_W

Bits 0:15 - counter value

impl W<u32, Reg<u32, _PSC>>

pub fn psc(&mut self) -> PSC_W

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>

pub fn arr(&mut self) -> ARR_W

Bits 0:15 - Auto-reload value

impl W<u32, Reg<u32, _CCR>>

pub fn ccr(&mut self) -> CCR_W

Bits 0:15 - Capture/Compare 1 value

impl W<u32, Reg<u32, _OR>>

pub fn etr_rmp(&mut self) -> ETR_RMP_W

Bits 0:1 - Timer22 ETR remap

pub fn ti1_rmp(&mut self) -> TI1_RMP_W

Bits 2:3 - Timer22 TI1

impl W<u32, Reg<u32, _CR1>>

pub fn m1(&mut self) -> M1_W

Bit 28 - Word length

pub fn cmie(&mut self) -> CMIE_W

Bit 14 - Character match interrupt enable

pub fn mme(&mut self) -> MME_W

Bit 13 - Mute mode enable

pub fn m0(&mut self) -> M0_W

Bit 12 - Word length

pub fn wake(&mut self) -> WAKE_W

Bit 11 - Receiver wakeup method

pub fn pce(&mut self) -> PCE_W

Bit 10 - Parity control enable

pub fn ps(&mut self) -> PS_W

Bit 9 - Parity selection

pub fn peie(&mut self) -> PEIE_W

Bit 8 - PE interrupt enable

pub fn txeie(&mut self) -> TXEIE_W

Bit 7 - interrupt enable

pub fn tcie(&mut self) -> TCIE_W

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W

Bit 5 - RXNE interrupt enable

pub fn idleie(&mut self) -> IDLEIE_W

Bit 4 - IDLE interrupt enable

pub fn te(&mut self) -> TE_W

Bit 3 - Transmitter enable

pub fn re(&mut self) -> RE_W

Bit 2 - Receiver enable

pub fn uesm(&mut self) -> UESM_W

Bit 1 - USART enable in Stop mode

pub fn ue(&mut self) -> UE_W

Bit 0 - USART enable

pub fn deat(&mut self) -> DEAT_W

Bits 21:25 - Driver Enable assertion time

pub fn dedt(&mut self) -> DEDT_W

Bits 16:20 - Driver Enable de-assertion time

impl W<u32, Reg<u32, _CR2>>

pub fn msbfirst(&mut self) -> MSBFIRST_W

Bit 19 - Most significant bit first

pub fn datainv(&mut self) -> DATAINV_W

Bit 18 - Binary data inversion

pub fn txinv(&mut self) -> TXINV_W

Bit 17 - TX pin active level inversion

pub fn rxinv(&mut self) -> RXINV_W

Bit 16 - RX pin active level inversion

pub fn swap(&mut self) -> SWAP_W

Bit 15 - Swap TX/RX pins

pub fn stop(&mut self) -> STOP_W

Bits 12:13 - STOP bits

pub fn clken(&mut self) -> CLKEN_W

Bit 11 - Clock enable

pub fn addm7(&mut self) -> ADDM7_W

Bit 4 - 7-bit Address Detection/4-bit Address Detection

pub fn add(&mut self) -> ADD_W

Bits 24:31 - Address of the USART node

impl W<u32, Reg<u32, _CR3>>

pub fn wufie(&mut self) -> WUFIE_W

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&mut self) -> WUS_W

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn dep(&mut self) -> DEP_W

Bit 15 - Driver enable polarity selection

pub fn dem(&mut self) -> DEM_W

Bit 14 - Driver enable mode

pub fn ddre(&mut self) -> DDRE_W

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&mut self) -> OVRDIS_W

Bit 12 - Overrun Disable

pub fn ctsie(&mut self) -> CTSIE_W

Bit 10 - CTS interrupt enable

pub fn ctse(&mut self) -> CTSE_W

Bit 9 - CTS enable

pub fn rtse(&mut self) -> RTSE_W

Bit 8 - RTS enable

pub fn dmat(&mut self) -> DMAT_W

Bit 7 - DMA enable transmitter

pub fn dmar(&mut self) -> DMAR_W

Bit 6 - DMA enable receiver

pub fn hdsel(&mut self) -> HDSEL_W

Bit 3 - Half-duplex selection

pub fn eie(&mut self) -> EIE_W

Bit 0 - Error interrupt enable

impl W<u32, Reg<u32, _BRR>>

pub fn brr(&mut self) -> BRR_W

Bits 0:19 - BRR

impl W<u32, Reg<u32, _RQR>>

pub fn rxfrq(&mut self) -> RXFRQ_W

Bit 3 - Receive data flush request

pub fn mmrq(&mut self) -> MMRQ_W

Bit 2 - Mute mode request

pub fn sbkrq(&mut self) -> SBKRQ_W

Bit 1 - Send break request

impl W<u32, Reg<u32, _ICR>>

pub fn wucf(&mut self) -> WUCF_W

Bit 20 - Wakeup from Stop mode clear flag

pub fn cmcf(&mut self) -> CMCF_W

Bit 17 - Character match clear flag

pub fn ctscf(&mut self) -> CTSCF_W

Bit 9 - CTS clear flag

pub fn tccf(&mut self) -> TCCF_W

Bit 6 - Transmission complete clear flag

pub fn idlecf(&mut self) -> IDLECF_W

Bit 4 - Idle line detected clear flag

pub fn orecf(&mut self) -> ORECF_W

Bit 3 - Overrun error clear flag

pub fn ncf(&mut self) -> NCF_W

Bit 2 - Noise detected clear flag

pub fn fecf(&mut self) -> FECF_W

Bit 1 - Framing error clear flag

pub fn pecf(&mut self) -> PECF_W

Bit 0 - Parity error clear flag

impl W<u32, Reg<u32, _TDR>>

pub fn tdr(&mut self) -> TDR_W

Bits 0:8 - Transmit data value

impl W<u32, Reg<u32, _CR>>

pub fn bias(&mut self) -> BIAS_W

Bits 5:6 - Bias selector

pub fn duty(&mut self) -> DUTY_W

Bits 2:4 - Duty selection

pub fn vsel(&mut self) -> VSEL_W

Bit 1 - Voltage source selection

pub fn lcden(&mut self) -> LCDEN_W

Bit 0 - LCD controller enable

impl W<u32, Reg<u32, _FCR>>

pub fn ps(&mut self) -> PS_W

Bits 22:25 - PS 16-bit prescaler

pub fn div(&mut self) -> DIV_W

Bits 18:21 - DIV clock divider

pub fn blink(&mut self) -> BLINK_W

Bits 16:17 - Blink mode selection

pub fn blinkf(&mut self) -> BLINKF_W

Bits 13:15 - Blink frequency selection

pub fn cc(&mut self) -> CC_W

Bits 10:12 - Contrast control

pub fn dead(&mut self) -> DEAD_W

Bits 7:9 - Dead time duration

pub fn pon(&mut self) -> PON_W

Bits 4:6 - Pulse ON duration

pub fn uddie(&mut self) -> UDDIE_W

Bit 3 - Update display done interrupt enable

pub fn sofie(&mut self) -> SOFIE_W

Bit 1 - Start of frame interrupt enable

pub fn hd(&mut self) -> HD_W

Bit 0 - High drive enable

impl W<u32, Reg<u32, _SR>>

pub fn udr(&mut self) -> UDR_W

Bit 2 - Update display request

impl W<u32, Reg<u32, _CLR>>

pub fn uddc(&mut self) -> UDDC_W

Bit 3 - Update display done clear

pub fn sofc(&mut self) -> SOFC_W

Bit 1 - Start of frame flag clear

impl W<u32, Reg<u32, _RAM_COM0>>

pub fn s30(&mut self) -> S30_W

Bit 30 - S30

pub fn s29(&mut self) -> S29_W

Bit 29 - S29

pub fn s28(&mut self) -> S28_W

Bit 28 - S28

pub fn s27(&mut self) -> S27_W

Bit 27 - S27

pub fn s26(&mut self) -> S26_W

Bit 26 - S26

pub fn s25(&mut self) -> S25_W

Bit 25 - S25

pub fn s24(&mut self) -> S24_W

Bit 24 - S24

pub fn s23(&mut self) -> S23_W

Bit 23 - S23

pub fn s22(&mut self) -> S22_W

Bit 22 - S22

pub fn s21(&mut self) -> S21_W

Bit 21 - S21

pub fn s20(&mut self) -> S20_W

Bit 20 - S20

pub fn s19(&mut self) -> S19_W

Bit 19 - S19

pub fn s18(&mut self) -> S18_W

Bit 18 - S18

pub fn s17(&mut self) -> S17_W

Bit 17 - S17

pub fn s16(&mut self) -> S16_W

Bit 16 - S16

pub fn s15(&mut self) -> S15_W

Bit 15 - S15

pub fn s14(&mut self) -> S14_W

Bit 14 - S14

pub fn s13(&mut self) -> S13_W

Bit 13 - S13

pub fn s12(&mut self) -> S12_W

Bit 12 - S12

pub fn s11(&mut self) -> S11_W

Bit 11 - S11

pub fn s10(&mut self) -> S10_W

Bit 10 - S10

pub fn s09(&mut self) -> S09_W

Bit 9 - S09

pub fn s08(&mut self) -> S08_W

Bit 8 - S08

pub fn s07(&mut self) -> S07_W

Bit 7 - S07

pub fn s06(&mut self) -> S06_W

Bit 6 - S06

pub fn s05(&mut self) -> S05_W

Bit 5 - S05

pub fn s04(&mut self) -> S04_W

Bit 4 - S04

pub fn s03(&mut self) -> S03_W

Bit 3 - S03

pub fn s02(&mut self) -> S02_W

Bit 2 - S02

pub fn s01(&mut self) -> S01_W

Bit 1 - S01

pub fn s00(&mut self) -> S00_W

Bit 0 - S00

impl W<u32, Reg<u32, _RAM_COM1>>

pub fn s31(&mut self) -> S31_W

Bit 31 - S31

pub fn s30(&mut self) -> S30_W

Bit 30 - S30

pub fn s29(&mut self) -> S29_W

Bit 29 - S29

pub fn s28(&mut self) -> S28_W

Bit 28 - S28

pub fn s27(&mut self) -> S27_W

Bit 27 - S27

pub fn s26(&mut self) -> S26_W

Bit 26 - S26

pub fn s25(&mut self) -> S25_W

Bit 25 - S25

pub fn s24(&mut self) -> S24_W

Bit 24 - S24

pub fn s23(&mut self) -> S23_W

Bit 23 - S23

pub fn s22(&mut self) -> S22_W

Bit 22 - S22

pub fn s21(&mut self) -> S21_W

Bit 21 - S21

pub fn s20(&mut self) -> S20_W

Bit 20 - S20

pub fn s19(&mut self) -> S19_W

Bit 19 - S19

pub fn s18(&mut self) -> S18_W

Bit 18 - S18

pub fn s17(&mut self) -> S17_W

Bit 17 - S17

pub fn s16(&mut self) -> S16_W

Bit 16 - S16

pub fn s15(&mut self) -> S15_W

Bit 15 - S15

pub fn s14(&mut self) -> S14_W

Bit 14 - S14

pub fn s13(&mut self) -> S13_W

Bit 13 - S13

pub fn s12(&mut self) -> S12_W

Bit 12 - S12

pub fn s11(&mut self) -> S11_W

Bit 11 - S11

pub fn s10(&mut self) -> S10_W

Bit 10 - S10

pub fn s09(&mut self) -> S09_W

Bit 9 - S09

pub fn s08(&mut self) -> S08_W

Bit 8 - S08

pub fn s07(&mut self) -> S07_W

Bit 7 - S07

pub fn s06(&mut self) -> S06_W

Bit 6 - S06

pub fn s05(&mut self) -> S05_W

Bit 5 - S05

pub fn s04(&mut self) -> S04_W

Bit 4 - S04

pub fn s03(&mut self) -> S03_W

Bit 3 - S03

pub fn s02(&mut self) -> S02_W

Bit 2 - S02

pub fn s01(&mut self) -> S01_W

Bit 1 - S01

pub fn s00(&mut self) -> S00_W

Bit 0 - S00

impl W<u32, Reg<u32, _RAM_COM2>>

pub fn s31(&mut self) -> S31_W

Bit 31 - S31

pub fn s30(&mut self) -> S30_W

Bit 30 - S30

pub fn s29(&mut self) -> S29_W

Bit 29 - S29

pub fn s28(&mut self) -> S28_W

Bit 28 - S28

pub fn s27(&mut self) -> S27_W

Bit 27 - S27

pub fn s26(&mut self) -> S26_W

Bit 26 - S26

pub fn s25(&mut self) -> S25_W

Bit 25 - S25

pub fn s24(&mut self) -> S24_W

Bit 24 - S24

pub fn s23(&mut self) -> S23_W

Bit 23 - S23

pub fn s22(&mut self) -> S22_W

Bit 22 - S22

pub fn s21(&mut self) -> S21_W

Bit 21 - S21

pub fn s20(&mut self) -> S20_W

Bit 20 - S20

pub fn s19(&mut self) -> S19_W

Bit 19 - S19

pub fn s18(&mut self) -> S18_W

Bit 18 - S18

pub fn s17(&mut self) -> S17_W

Bit 17 - S17

pub fn s16(&mut self) -> S16_W

Bit 16 - S16

pub fn s15(&mut self) -> S15_W

Bit 15 - S15

pub fn s14(&mut self) -> S14_W

Bit 14 - S14

pub fn s13(&mut self) -> S13_W

Bit 13 - S13

pub fn s12(&mut self) -> S12_W

Bit 12 - S12

pub fn s11(&mut self) -> S11_W

Bit 11 - S11

pub fn s10(&mut self) -> S10_W

Bit 10 - S10

pub fn s09(&mut self) -> S09_W

Bit 9 - S09

pub fn s08(&mut self) -> S08_W

Bit 8 - S08

pub fn s07(&mut self) -> S07_W

Bit 7 - S07

pub fn s06(&mut self) -> S06_W

Bit 6 - S06

pub fn s05(&mut self) -> S05_W

Bit 5 - S05

pub fn s04(&mut self) -> S04_W

Bit 4 - S04

pub fn s03(&mut self) -> S03_W

Bit 3 - S03

pub fn s02(&mut self) -> S02_W

Bit 2 - S02

pub fn s01(&mut self) -> S01_W

Bit 1 - S01

pub fn s00(&mut self) -> S00_W

Bit 0 - S00

impl W<u32, Reg<u32, _RAM_COM3>>

pub fn s31(&mut self) -> S31_W

Bit 31 - S31

pub fn s30(&mut self) -> S30_W

Bit 30 - S30

pub fn s29(&mut self) -> S29_W

Bit 29 - S29

pub fn s28(&mut self) -> S28_W

Bit 28 - S28

pub fn s27(&mut self) -> S27_W

Bit 27 - S27

pub fn s26(&mut self) -> S26_W

Bit 26 - S26

pub fn s25(&mut self) -> S25_W

Bit 25 - S25

pub fn s24(&mut self) -> S24_W

Bit 24 - S24

pub fn s23(&mut self) -> S23_W

Bit 23 - S23

pub fn s22(&mut self) -> S22_W

Bit 22 - S22

pub fn s21(&mut self) -> S21_W

Bit 21 - S21

pub fn s20(&mut self) -> S20_W

Bit 20 - S20

pub fn s19(&mut self) -> S19_W

Bit 19 - S19

pub fn s18(&mut self) -> S18_W

Bit 18 - S18

pub fn s17(&mut self) -> S17_W

Bit 17 - S17

pub fn s16(&mut self) -> S16_W

Bit 16 - S16

pub fn s15(&mut self) -> S15_W

Bit 15 - S15

pub fn s14(&mut self) -> S14_W

Bit 14 - S14

pub fn s13(&mut self) -> S13_W

Bit 13 - S13

pub fn s12(&mut self) -> S12_W

Bit 12 - S12

pub fn s11(&mut self) -> S11_W

Bit 11 - S11

pub fn s10(&mut self) -> S10_W

Bit 10 - S10

pub fn s09(&mut self) -> S09_W

Bit 9 - S09

pub fn s08(&mut self) -> S08_W

Bit 8 - S08

pub fn s07(&mut self) -> S07_W

Bit 7 - S07

pub fn s06(&mut self) -> S06_W

Bit 6 - S06

pub fn s05(&mut self) -> S05_W

Bit 5 - S05

pub fn s04(&mut self) -> S04_W

Bit 4 - S04

pub fn s03(&mut self) -> S03_W

Bit 3 - S03

pub fn s02(&mut self) -> S02_W

Bit 2 - S02

pub fn s01(&mut self) -> S01_W

Bit 1 - S01

pub fn s00(&mut self) -> S00_W

Bit 0 - S00

impl W<u32, Reg<u32, _RAM_COM4>>

pub fn s31(&mut self) -> S31_W

Bit 31 - S31

pub fn s30(&mut self) -> S30_W

Bit 30 - S30

pub fn s29(&mut self) -> S29_W

Bit 29 - S29

pub fn s28(&mut self) -> S28_W

Bit 28 - S28

pub fn s27(&mut self) -> S27_W

Bit 27 - S27

pub fn s26(&mut self) -> S26_W

Bit 26 - S26

pub fn s25(&mut self) -> S25_W

Bit 25 - S25

pub fn s24(&mut self) -> S24_W

Bit 24 - S24

pub fn s23(&mut self) -> S23_W

Bit 23 - S23

pub fn s22(&mut self) -> S22_W

Bit 22 - S22

pub fn s21(&mut self) -> S21_W

Bit 21 - S21

pub fn s20(&mut self) -> S20_W

Bit 20 - S20

pub fn s19(&mut self) -> S19_W

Bit 19 - S19

pub fn s18(&mut self) -> S18_W

Bit 18 - S18

pub fn s17(&mut self) -> S17_W

Bit 17 - S17

pub fn s16(&mut self) -> S16_W

Bit 16 - S16

pub fn s15(&mut self) -> S15_W

Bit 15 - S15

pub fn s14(&mut self) -> S14_W

Bit 14 - S14

pub fn s13(&mut self) -> S13_W

Bit 13 - S13

pub fn s12(&mut self) -> S12_W

Bit 12 - S12

pub fn s11(&mut self) -> S11_W

Bit 11 - S11

pub fn s10(&mut self) -> S10_W

Bit 10 - S10

pub fn s09(&mut self) -> S09_W

Bit 9 - S09

pub fn s08(&mut self) -> S08_W

Bit 8 - S08

pub fn s07(&mut self) -> S07_W

Bit 7 - S07

pub fn s06(&mut self) -> S06_W

Bit 6 - S06

pub fn s05(&mut self) -> S05_W

Bit 5 - S05

pub fn s04(&mut self) -> S04_W

Bit 4 - S04

pub fn s03(&mut self) -> S03_W

Bit 3 - S03

pub fn s02(&mut self) -> S02_W

Bit 2 - S02

pub fn s01(&mut self) -> S01_W

Bit 1 - S01

pub fn s00(&mut self) -> S00_W

Bit 0 - S00

impl W<u32, Reg<u32, _RAM_COM5>>

pub fn s31(&mut self) -> S31_W

Bit 31 - S31

pub fn s30(&mut self) -> S30_W

Bit 30 - S30

pub fn s29(&mut self) -> S29_W

Bit 29 - S29

pub fn s28(&mut self) -> S28_W

Bit 28 - S28

pub fn s27(&mut self) -> S27_W

Bit 27 - S27

pub fn s26(&mut self) -> S26_W

Bit 26 - S26

pub fn s25(&mut self) -> S25_W

Bit 25 - S25

pub fn s24(&mut self) -> S24_W

Bit 24 - S24

pub fn s23(&mut self) -> S23_W

Bit 23 - S23

pub fn s22(&mut self) -> S22_W

Bit 22 - S22

pub fn s21(&mut self) -> S21_W

Bit 21 - S21

pub fn s20(&mut self) -> S20_W

Bit 20 - S20

pub fn s19(&mut self) -> S19_W

Bit 19 - S19

pub fn s18(&mut self) -> S18_W

Bit 18 - S18

pub fn s17(&mut self) -> S17_W

Bit 17 - S17

pub fn s16(&mut self) -> S16_W

Bit 16 - S16

pub fn s15(&mut self) -> S15_W

Bit 15 - S15

pub fn s14(&mut self) -> S14_W

Bit 14 - S14

pub fn s13(&mut self) -> S13_W

Bit 13 - S13

pub fn s12(&mut self) -> S12_W

Bit 12 - S12

pub fn s11(&mut self) -> S11_W

Bit 11 - S11

pub fn s10(&mut self) -> S10_W

Bit 10 - S10

pub fn s09(&mut self) -> S09_W

Bit 9 - S09

pub fn s08(&mut self) -> S08_W

Bit 8 - S08

pub fn s07(&mut self) -> S07_W

Bit 7 - S07

pub fn s06(&mut self) -> S06_W

Bit 6 - S06

pub fn s05(&mut self) -> S05_W

Bit 5 - S05

pub fn s04(&mut self) -> S04_W

Bit 4 - S04

pub fn s03(&mut self) -> S03_W

Bit 3 - S03

pub fn s02(&mut self) -> S02_W

Bit 2 - S02

pub fn s01(&mut self) -> S01_W

Bit 1 - S01

pub fn s00(&mut self) -> S00_W

Bit 0 - S00

impl W<u32, Reg<u32, _RAM_COM6>>

pub fn s31(&mut self) -> S31_W

Bit 31 - S31

pub fn s30(&mut self) -> S30_W

Bit 30 - S30

pub fn s29(&mut self) -> S29_W

Bit 29 - S29

pub fn s28(&mut self) -> S28_W

Bit 28 - S28

pub fn s27(&mut self) -> S27_W

Bit 27 - S27

pub fn s26(&mut self) -> S26_W

Bit 26 - S26

pub fn s25(&mut self) -> S25_W

Bit 25 - S25

pub fn s24(&mut self) -> S24_W

Bit 24 - S24

pub fn s23(&mut self) -> S23_W

Bit 23 - S23

pub fn s22(&mut self) -> S22_W

Bit 22 - S22

pub fn s21(&mut self) -> S21_W

Bit 21 - S21

pub fn s20(&mut self) -> S20_W

Bit 20 - S20

pub fn s19(&mut self) -> S19_W

Bit 19 - S19

pub fn s18(&mut self) -> S18_W

Bit 18 - S18

pub fn s17(&mut self) -> S17_W

Bit 17 - S17

pub fn s16(&mut self) -> S16_W

Bit 16 - S16

pub fn s15(&mut self) -> S15_W

Bit 15 - S15

pub fn s14(&mut self) -> S14_W

Bit 14 - S14

pub fn s13(&mut self) -> S13_W

Bit 13 - S13

pub fn s12(&mut self) -> S12_W

Bit 12 - S12

pub fn s11(&mut self) -> S11_W

Bit 11 - S11

pub fn s10(&mut self) -> S10_W

Bit 10 - S10

pub fn s09(&mut self) -> S09_W

Bit 9 - S09

pub fn s08(&mut self) -> S08_W

Bit 8 - S08

pub fn s07(&mut self) -> S07_W

Bit 7 - S07

pub fn s06(&mut self) -> S06_W

Bit 6 - S06

pub fn s05(&mut self) -> S05_W

Bit 5 - S05

pub fn s04(&mut self) -> S04_W

Bit 4 - S04

pub fn s03(&mut self) -> S03_W

Bit 3 - S03

pub fn s02(&mut self) -> S02_W

Bit 2 - S02

pub fn s01(&mut self) -> S01_W

Bit 1 - S01

pub fn s00(&mut self) -> S00_W

Bit 0 - S00

impl W<u32, Reg<u32, _RAM_COM7>>

pub fn s31(&mut self) -> S31_W

Bit 31 - S31

pub fn s30(&mut self) -> S30_W

Bit 30 - S30

pub fn s29(&mut self) -> S29_W

Bit 29 - S29

pub fn s28(&mut self) -> S28_W

Bit 28 - S28

pub fn s27(&mut self) -> S27_W

Bit 27 - S27

pub fn s26(&mut self) -> S26_W

Bit 26 - S26

pub fn s25(&mut self) -> S25_W

Bit 25 - S25

pub fn s24(&mut self) -> S24_W

Bit 24 - S24

pub fn s23(&mut self) -> S23_W

Bit 23 - S23

pub fn s22(&mut self) -> S22_W

Bit 22 - S22

pub fn s21(&mut self) -> S21_W

Bit 21 - S21

pub fn s20(&mut self) -> S20_W

Bit 20 - S20

pub fn s19(&mut self) -> S19_W

Bit 19 - S19

pub fn s18(&mut self) -> S18_W

Bit 18 - S18

pub fn s17(&mut self) -> S17_W

Bit 17 - S17

pub fn s16(&mut self) -> S16_W

Bit 16 - S16

pub fn s15(&mut self) -> S15_W

Bit 15 - S15

pub fn s14(&mut self) -> S14_W

Bit 14 - S14

pub fn s13(&mut self) -> S13_W

Bit 13 - S13

pub fn s12(&mut self) -> S12_W

Bit 12 - S12

pub fn s11(&mut self) -> S11_W

Bit 11 - S11

pub fn s10(&mut self) -> S10_W

Bit 10 - S10

pub fn s09(&mut self) -> S09_W

Bit 9 - S09

pub fn s08(&mut self) -> S08_W

Bit 8 - S08

pub fn s07(&mut self) -> S07_W

Bit 7 - S07

pub fn s06(&mut self) -> S06_W

Bit 6 - S06

pub fn s05(&mut self) -> S05_W

Bit 5 - S05

pub fn s04(&mut self) -> S04_W

Bit 4 - S04

pub fn s03(&mut self) -> S03_W

Bit 3 - S03

pub fn s02(&mut self) -> S02_W

Bit 2 - S02

pub fn s01(&mut self) -> S01_W

Bit 1 - S01

pub fn s00(&mut self) -> S00_W

Bit 0 - S00

impl W<u32, Reg<u32, _CSR>>

pub fn enable(&mut self) -> ENABLE_W

Bit 0 - Counter enable

pub fn tickint(&mut self) -> TICKINT_W

Bit 1 - SysTick exception request enable

pub fn clksource(&mut self) -> CLKSOURCE_W

Bit 2 - Clock source selection

pub fn countflag(&mut self) -> COUNTFLAG_W

Bit 16 - COUNTFLAG

impl W<u32, Reg<u32, _RVR>>

pub fn reload(&mut self) -> RELOAD_W

Bits 0:23 - RELOAD value

impl W<u32, Reg<u32, _CVR>>

pub fn current(&mut self) -> CURRENT_W

Bits 0:23 - Current counter value

impl W<u32, Reg<u32, _CALIB>>

pub fn tenms(&mut self) -> TENMS_W

Bits 0:23 - Calibration value

pub fn skew(&mut self) -> SKEW_W

Bit 30 - SKEW flag: Indicates whether the TENMS value is exact

pub fn noref(&mut self) -> NOREF_W

Bit 31 - NOREF flag. Reads as zero