Module xspi

Available on crate feature xspi only.

Quad or Octo SPI bus

STM32H7 parts support either Quad or Octo SPI using dedicated peripheral(s).

Interface	Parts	# IO lines
Quad Spi	stm32h742/743/750/753/745/747/755/757	1-bit, 2-bit or 4-bit
Octo Spi	stm32h723/725/730/733/735/7a3/7b0/7b3	1-bit, 2-bit, 4-bit or 8-bit

Usage

This driver supports using the xSPI peripheral in indirect mode. This allows the peripheral to be used to read and write from an address over a SPI/QUADSPI/OCTOSPI interface.

The QUADSPI interface can be configured to operate on either of the two available banks.

use stm32h7xx_hal::xspi;

// Get the device peripherals and instantiate IO pins.
let dp = ...;
let (sck, io0, io1, io2, io3) = ...;

let mut qspi = dp.QUADSPI.bank1((sck, io0, io1, io2, io3), 3.MHz(), &ccdr.clocks,
                                ccdr.peripheral.QSPI);

// Configure QSPI to operate in 4-bit mode.
qspi.configure_mode(xspi::QspiMode::FourBit).unwrap();

// Write data to address 0x00 on the QSPI interface.
qspi.write(0x00, &[0xAB, 0xCD]).unwrap();

For OCTOSPI there are two peripherals, which can be initialised separately.

use stm32h7xx_hal::{xspi, xspi::OctospiWord as XW};

// Get the device peripherals and instantiate IO pins.
let dp = ...;
let _ = ...;

let mut octospi = dp.OCTOSPI1.octospi_unchecked(12.MHz(), &ccdr.clocks,
                                ccdr.peripheral.OCTOSPI1);

// Configure OCTOSPI to operate in 8-bit mode.
octospi.configure_mode(xspi::OctospiMode::EightBit).unwrap();

// Example RDID Read Indentification
let mut read: [u8; 3] = [0; 3];
octospi
    .read_extended(XW::U16(0x9F60), XW::U32(0), XW::None, 4, &mut read)
    .unwrap();

Configuration

A Config struct is used to configure the xSPI.

use stm32h7xx_hal::xspi;
let config = xspi::Config::new(12.MHz()).fifo_threshold(16);

Hyperbus

This driver supports a memory-mapped Hyperbus mode for the OCTOSPI peripheral.

let config = HyperbusConfig::new(80.MHz())
    .device_size_bytes(24) // 16 Mbyte
    .refresh_interval(4.us())
    .read_write_recovery(4) // 50ns
    .access_initial_latency(6);

let hyperram = dp.OCTOSPI1.octospi_hyperbus_unchecked(
    config,
    &ccdr.clocks,
    ccdr.peripheral.OCTOSPI1,
);

// Initialise and convert raw pointer to slice
let ram_ptr: *mut u32 = hyperram.init();
let ram = unsafe { slice::from_raw_parts_mut(ram_ptr, size_u32) };

Examples

• Simple QSPI example
• QSPI memory usage
• QSPI using MDMA
• OCTOSPI memory usage
• OCTOSPI HyperRAM

Limitations

This driver currently only supports indirect operation mode of the xSPI interface. Automatic polling or memory-mapped modes are not supported, except for the OCTOSPI Hyperbus mode.

Using different operational modes (1-bit/2-bit/4-bit etc.) for different phases of a single transaction is not supported. It is possible to change operational mode between transactions by calling configure_mode.

Structs

Config

A structure for specifying the XSPI configuration.

Qspi

Generic type for Quad or Octo SPI

Enums

Bank

Indicates a specific QUADSPI bank to use.

BankError

BankSelect

Indicates one of the two existing QUADSPI bank.

Event

Interrupt events

QspiError

Indicates an error with the XSPI peripheral.

QspiMode

Represents operation modes of the XSPI interface.

QspiWord

Instruction, Address or Alternate Byte word used by the XSPI interface

SamplingEdge

Sampling mode for the XSPI interface

Traits

XspiExt