Module stm32h7xx_hal::stm32::sdmmc1::idmactrlr [−][src]
The receive and transmit FIFOs can be read or written as 32-bit wide registers. The FIFOs contain 32 entries on 32 sequential addresses. This allows the CPU to use its load and store multiple operands to read from/write to the FIFO.
Structs
| IDMABACT_W | Write proxy for field |
| IDMABMODE_W | Write proxy for field |
| IDMAEN_W | Write proxy for field |
Type Definitions
| IDMABACT_R | Reader of field |
| IDMABMODE_R | Reader of field |
| IDMAEN_R | Reader of field |
| R | Reader of register IDMACTRLR |
| W | Writer for register IDMACTRLR |