Struct stm32h7xx_hal::stm32::ethernet_mac::RegisterBlock[−][src]

#[repr(C)]pub struct RegisterBlock {
    pub maccr: Reg<u32, _MACCR>,
    pub macecr: Reg<u32, _MACECR>,
    pub macpfr: Reg<u32, _MACPFR>,
    pub macwtr: Reg<u32, _MACWTR>,
    pub macht0r: Reg<u32, _MACHT0R>,
    pub macht1r: Reg<u32, _MACHT1R>,
    pub macvtr: Reg<u32, _MACVTR>,
    pub macvhtr: Reg<u32, _MACVHTR>,
    pub macvir: Reg<u32, _MACVIR>,
    pub macivir: Reg<u32, _MACIVIR>,
    pub macqtx_fcr: Reg<u32, _MACQTXFCR>,
    pub macrx_fcr: Reg<u32, _MACRXFCR>,
    pub macisr: Reg<u32, _MACISR>,
    pub macier: Reg<u32, _MACIER>,
    pub macrx_tx_sr: Reg<u32, _MACRXTXSR>,
    pub macpcsr: Reg<u32, _MACPCSR>,
    pub macrwkpfr: Reg<u32, _MACRWKPFR>,
    pub maclcsr: Reg<u32, _MACLCSR>,
    pub macltcr: Reg<u32, _MACLTCR>,
    pub macletr: Reg<u32, _MACLETR>,
    pub mac1ustcr: Reg<u32, _MAC1USTCR>,
    pub macvr: Reg<u32, _MACVR>,
    pub macdr: Reg<u32, _MACDR>,
    pub machwf1r: Reg<u32, _MACHWF1R>,
    pub machwf2r: Reg<u32, _MACHWF2R>,
    pub macmdioar: Reg<u32, _MACMDIOAR>,
    pub macmdiodr: Reg<u32, _MACMDIODR>,
    pub maca0hr: Reg<u32, _MACA0HR>,
    pub maca0lr: Reg<u32, _MACA0LR>,
    pub maca1hr: Reg<u32, _MACA1HR>,
    pub maca1lr: Reg<u32, _MACA1LR>,
    pub maca2hr: Reg<u32, _MACA2HR>,
    pub maca2lr: Reg<u32, _MACA2LR>,
    pub maca3hr: Reg<u32, _MACA3HR>,
    pub maca3lr: Reg<u32, _MACA3LR>,
    pub mmc_control: Reg<u32, _MMC_CONTROL>,
    pub mmc_rx_interrupt: Reg<u32, _MMC_RX_INTERRUPT>,
    pub mmc_tx_interrupt: Reg<u32, _MMC_TX_INTERRUPT>,
    pub mmc_rx_interrupt_mask: Reg<u32, _MMC_RX_INTERRUPT_MASK>,
    pub mmc_tx_interrupt_mask: Reg<u32, _MMC_TX_INTERRUPT_MASK>,
    pub tx_single_collision_good_packets: Reg<u32, _TX_SINGLE_COLLISION_GOOD_PACKETS>,
    pub tx_multiple_collision_good_packets: Reg<u32, _TX_MULTIPLE_COLLISION_GOOD_PACKETS>,
    pub tx_packet_count_good: Reg<u32, _TX_PACKET_COUNT_GOOD>,
    pub rx_crc_error_packets: Reg<u32, _RX_CRC_ERROR_PACKETS>,
    pub rx_alignment_error_packets: Reg<u32, _RX_ALIGNMENT_ERROR_PACKETS>,
    pub rx_unicast_packets_good: Reg<u32, _RX_UNICAST_PACKETS_GOOD>,
    pub tx_lpi_usec_cntr: Reg<u32, _TX_LPI_USEC_CNTR>,
    pub tx_lpi_tran_cntr: Reg<u32, _TX_LPI_TRAN_CNTR>,
    pub rx_lpi_usec_cntr: Reg<u32, _RX_LPI_USEC_CNTR>,
    pub rx_lpi_tran_cntr: Reg<u32, _RX_LPI_TRAN_CNTR>,
    pub macl3l4c0r: Reg<u32, _MACL3L4C0R>,
    pub macl4a0r: Reg<u32, _MACL4A0R>,
    pub macl3a00r: Reg<u32, _MACL3A00R>,
    pub macl3a10r: Reg<u32, _MACL3A10R>,
    pub macl3a20: Reg<u32, _MACL3A20>,
    pub macl3a30: Reg<u32, _MACL3A30>,
    pub macl3l4c1r: Reg<u32, _MACL3L4C1R>,
    pub macl4a1r: Reg<u32, _MACL4A1R>,
    pub macl3a01r: Reg<u32, _MACL3A01R>,
    pub macl3a11r: Reg<u32, _MACL3A11R>,
    pub macl3a21r: Reg<u32, _MACL3A21R>,
    pub macl3a31r: Reg<u32, _MACL3A31R>,
    pub macarpar: Reg<u32, _MACARPAR>,
    pub mactscr: Reg<u32, _MACTSCR>,
    pub macssir: Reg<u32, _MACSSIR>,
    pub macstsr: Reg<u32, _MACSTSR>,
    pub macstnr: Reg<u32, _MACSTNR>,
    pub macstsur: Reg<u32, _MACSTSUR>,
    pub macstnur: Reg<u32, _MACSTNUR>,
    pub mactsar: Reg<u32, _MACTSAR>,
    pub mactssr: Reg<u32, _MACTSSR>,
    pub mactx_tssnr: Reg<u32, _MACTXTSSNR>,
    pub mactx_tsssr: Reg<u32, _MACTXTSSSR>,
    pub macacr: Reg<u32, _MACACR>,
    pub macatsnr: Reg<u32, _MACATSNR>,
    pub macatssr: Reg<u32, _MACATSSR>,
    pub mactsiacr: Reg<u32, _MACTSIACR>,
    pub mactseacr: Reg<u32, _MACTSEACR>,
    pub mactsicnr: Reg<u32, _MACTSICNR>,
    pub mactsecnr: Reg<u32, _MACTSECNR>,
    pub macppscr: Reg<u32, _MACPPSCR>,
    pub macppsttsr: Reg<u32, _MACPPSTTSR>,
    pub macppsttnr: Reg<u32, _MACPPSTTNR>,
    pub macppsir: Reg<u32, _MACPPSIR>,
    pub macppswr: Reg<u32, _MACPPSWR>,
    pub macpocr: Reg<u32, _MACPOCR>,
    pub macspi0r: Reg<u32, _MACSPI0R>,
    pub macspi1r: Reg<u32, _MACSPI1R>,
    pub macspi2r: Reg<u32, _MACSPI2R>,
    pub maclmir: Reg<u32, _MACLMIR>,
    // some fields omitted
}

Register block

Fields

maccr: Reg<u32, _MACCR>

0x00 - Operating mode configuration register

macecr: Reg<u32, _MACECR>

0x04 - Extended operating mode configuration register

macpfr: Reg<u32, _MACPFR>

0x08 - Packet filtering control register

macwtr: Reg<u32, _MACWTR>

0x0c - Watchdog timeout register

macht0r: Reg<u32, _MACHT0R>

0x10 - Hash Table 0 register

macht1r: Reg<u32, _MACHT1R>

0x14 - Hash Table 1 register

macvtr: Reg<u32, _MACVTR>

0x50 - VLAN tag register

macvhtr: Reg<u32, _MACVHTR>

0x58 - VLAN Hash table register

macvir: Reg<u32, _MACVIR>

0x60 - VLAN inclusion register

macivir: Reg<u32, _MACIVIR>

0x64 - Inner VLAN inclusion register

macqtx_fcr: Reg<u32, _MACQTXFCR>

0x70 - Tx Queue flow control register

macrx_fcr: Reg<u32, _MACRXFCR>

0x90 - Rx flow control register

macisr: Reg<u32, _MACISR>

0xb0 - Interrupt status register

macier: Reg<u32, _MACIER>

0xb4 - Interrupt enable register

macrx_tx_sr: Reg<u32, _MACRXTXSR>

0xb8 - Rx Tx status register

macpcsr: Reg<u32, _MACPCSR>

0xc0 - PMT control status register

macrwkpfr: Reg<u32, _MACRWKPFR>

0xc4 - Remove wakeup packet filter register

maclcsr: Reg<u32, _MACLCSR>

0xd0 - LPI control status register

macltcr: Reg<u32, _MACLTCR>

0xd4 - LPI timers control register

macletr: Reg<u32, _MACLETR>

0xd8 - LPI entry timer register

mac1ustcr: Reg<u32, _MAC1USTCR>

0xdc - 1-microsecond-tick counter register

macvr: Reg<u32, _MACVR>

0x110 - Version register

macdr: Reg<u32, _MACDR>

0x114 - Debug register

machwf1r: Reg<u32, _MACHWF1R>

0x120 - HW feature 1 register

machwf2r: Reg<u32, _MACHWF2R>

0x124 - HW feature 2 register

macmdioar: Reg<u32, _MACMDIOAR>

0x200 - MDIO address register

macmdiodr: Reg<u32, _MACMDIODR>

0x204 - MDIO data register

maca0hr: Reg<u32, _MACA0HR>

0x300 - Address 0 high register

maca0lr: Reg<u32, _MACA0LR>

0x304 - Address 0 low register

maca1hr: Reg<u32, _MACA1HR>

0x308 - Address 1 high register

maca1lr: Reg<u32, _MACA1LR>

0x30c - Address 1 low register

maca2hr: Reg<u32, _MACA2HR>

0x310 - Address 2 high register

maca2lr: Reg<u32, _MACA2LR>

0x314 - Address 2 low register

maca3hr: Reg<u32, _MACA3HR>

0x318 - Address 3 high register

maca3lr: Reg<u32, _MACA3LR>

0x31c - Address 3 low register

mmc_control: Reg<u32, _MMC_CONTROL>

0x700 - MMC control register

mmc_rx_interrupt: Reg<u32, _MMC_RX_INTERRUPT>

0x704 - MMC Rx interrupt register

mmc_tx_interrupt: Reg<u32, _MMC_TX_INTERRUPT>

0x708 - MMC Tx interrupt register

mmc_rx_interrupt_mask: Reg<u32, _MMC_RX_INTERRUPT_MASK>

0x70c - MMC Rx interrupt mask register

mmc_tx_interrupt_mask: Reg<u32, _MMC_TX_INTERRUPT_MASK>

0x710 - MMC Tx interrupt mask register

tx_single_collision_good_packets: Reg<u32, _TX_SINGLE_COLLISION_GOOD_PACKETS>

0x74c - Tx single collision good packets register

tx_multiple_collision_good_packets: Reg<u32, _TX_MULTIPLE_COLLISION_GOOD_PACKETS>

0x750 - Tx multiple collision good packets register

tx_packet_count_good: Reg<u32, _TX_PACKET_COUNT_GOOD>

0x768 - Tx packet count good register

rx_crc_error_packets: Reg<u32, _RX_CRC_ERROR_PACKETS>

0x794 - Rx CRC error packets register

rx_alignment_error_packets: Reg<u32, _RX_ALIGNMENT_ERROR_PACKETS>

0x798 - Rx alignment error packets register

rx_unicast_packets_good: Reg<u32, _RX_UNICAST_PACKETS_GOOD>

0x7c4 - Rx unicast packets good register

tx_lpi_usec_cntr: Reg<u32, _TX_LPI_USEC_CNTR>

0x7ec - Tx LPI microsecond timer register

tx_lpi_tran_cntr: Reg<u32, _TX_LPI_TRAN_CNTR>

0x7f0 - Tx LPI transition counter register

rx_lpi_usec_cntr: Reg<u32, _RX_LPI_USEC_CNTR>

0x7f4 - Rx LPI microsecond counter register

rx_lpi_tran_cntr: Reg<u32, _RX_LPI_TRAN_CNTR>

0x7f8 - Rx LPI transition counter register

macl3l4c0r: Reg<u32, _MACL3L4C0R>

0x900 - L3 and L4 control 0 register

macl4a0r: Reg<u32, _MACL4A0R>

0x904 - Layer4 address filter 0 register

macl3a00r: Reg<u32, _MACL3A00R>

0x910 - MACL3A00R

macl3a10r: Reg<u32, _MACL3A10R>

0x914 - Layer3 address 1 filter 0 register

macl3a20: Reg<u32, _MACL3A20>

0x918 - Layer3 Address 2 filter 0 register

macl3a30: Reg<u32, _MACL3A30>

0x91c - Layer3 Address 3 filter 0 register

macl3l4c1r: Reg<u32, _MACL3L4C1R>

0x930 - L3 and L4 control 1 register

macl4a1r: Reg<u32, _MACL4A1R>

0x934 - Layer 4 address filter 1 register

macl3a01r: Reg<u32, _MACL3A01R>

0x940 - Layer3 address 0 filter 1 Register

macl3a11r: Reg<u32, _MACL3A11R>

0x944 - Layer3 address 1 filter 1 register

macl3a21r: Reg<u32, _MACL3A21R>

0x948 - Layer3 address 2 filter 1 Register

macl3a31r: Reg<u32, _MACL3A31R>

0x94c - Layer3 address 3 filter 1 register

macarpar: Reg<u32, _MACARPAR>

0xae0 - ARP address register

mactscr: Reg<u32, _MACTSCR>

0xb00 - Timestamp control Register

macssir: Reg<u32, _MACSSIR>

0xb04 - Sub-second increment register

macstsr: Reg<u32, _MACSTSR>

0xb08 - System time seconds register

macstnr: Reg<u32, _MACSTNR>

0xb0c - System time nanoseconds register

macstsur: Reg<u32, _MACSTSUR>

0xb10 - System time seconds update register

macstnur: Reg<u32, _MACSTNUR>

0xb14 - System time nanoseconds update register

mactsar: Reg<u32, _MACTSAR>

0xb18 - Timestamp addend register

mactssr: Reg<u32, _MACTSSR>

0xb20 - Timestamp status register

mactx_tssnr: Reg<u32, _MACTXTSSNR>

0xb30 - Tx timestamp status nanoseconds register

mactx_tsssr: Reg<u32, _MACTXTSSSR>

0xb34 - Tx timestamp status seconds register

macacr: Reg<u32, _MACACR>

0xb40 - Auxiliary control register

macatsnr: Reg<u32, _MACATSNR>

0xb48 - Auxiliary timestamp nanoseconds register

macatssr: Reg<u32, _MACATSSR>

0xb4c - Auxiliary timestamp seconds register

mactsiacr: Reg<u32, _MACTSIACR>

0xb50 - Timestamp Ingress asymmetric correction register

mactseacr: Reg<u32, _MACTSEACR>

0xb54 - Timestamp Egress asymmetric correction register

mactsicnr: Reg<u32, _MACTSICNR>

0xb58 - Timestamp Ingress correction nanosecond register

mactsecnr: Reg<u32, _MACTSECNR>

0xb5c - Timestamp Egress correction nanosecond register

macppscr: Reg<u32, _MACPPSCR>

0xb70 - PPS control register

macppsttsr: Reg<u32, _MACPPSTTSR>

0xb80 - PPS target time seconds register

macppsttnr: Reg<u32, _MACPPSTTNR>

0xb84 - PPS target time nanoseconds register

macppsir: Reg<u32, _MACPPSIR>

0xb88 - PPS interval register

macppswr: Reg<u32, _MACPPSWR>

0xb8c - PPS width register

macpocr: Reg<u32, _MACPOCR>

0xbc0 - PTP Offload control register

macspi0r: Reg<u32, _MACSPI0R>

0xbc4 - PTP Source Port Identity 0 Register

macspi1r: Reg<u32, _MACSPI1R>

0xbc8 - PTP Source port identity 1 register

macspi2r: Reg<u32, _MACSPI2R>

0xbcc - PTP Source port identity 2 register

maclmir: Reg<u32, _MACLMIR>

0xbd0 - Log message interval register

Auto Trait Implementations

`impl Send for RegisterBlock`

`impl !Sync for RegisterBlock`

`impl Unpin for RegisterBlock`

Blanket Implementations

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`pub fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`pub fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`pub fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`pub fn from(t: T) -> T`[src]

`impl<T, U> Into for T where U: From<T>,` [src]

`pub fn into(self) -> U`[src]

`impl<T> Same<T> for T`

`type Output = T`

Should always be Self

`impl<T, U> TryFrom for T where U: Into<T>,` [src]

`type Error = Infallible`

The type returned in the event of a conversion error.

`pub fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>`[src]

`impl<T, U> TryInto for T where U: TryFrom<T>,` [src]

`type Error = >::Error`

The type returned in the event of a conversion error.

Struct stm32h7xx_hal::stm32::ethernet_mac::RegisterBlock[−][src]

Fields

Auto Trait Implementations

`impl Send for RegisterBlock`

`impl !Sync for RegisterBlock`

`impl Unpin for RegisterBlock`

Blanket Implementations

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`pub fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`pub fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`pub fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`pub fn from(t: T) -> T`[src]

`impl<T, U> Into<U> for T where U: From<T>,` [src]

`pub fn into(self) -> U`[src]

`impl<T> Same<T> for T`

`type Output = T`

`impl<T, U> TryFrom<U> for T where U: Into<T>,` [src]

`type Error = Infallible`

`pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>`[src]

`impl<T, U> TryInto<U> for T where U: TryFrom<T>,` [src]

`type Error = <U as TryFrom<T>>::Error`

`pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>`[src]

Struct stm32h7xx_hal::stm32::ethernet_mac::RegisterBlock[−][src]

Fields

Auto Trait Implementations

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

Blanket Implementations

impl<T> Any for T where T: 'static + ?Sized, [src]

pub fn type_id(&self) -> TypeId[src]

impl<T> Borrow<T> for T where T: ?Sized, [src]

pub fn borrow(&self) -> &T[src]

impl<T> BorrowMut<T> for T where T: ?Sized, [src]

pub fn borrow_mut(&mut self) -> &mut T[src]

impl<T> From<T> for T[src]

pub fn from(t: T) -> T[src]

impl<T, U> Into<U> for T where U: From<T>, [src]

pub fn into(self) -> U[src]

impl<T> Same<T> for T

type Output = T

impl<T, U> TryFrom<U> for T where U: Into<T>, [src]

type Error = Infallible

pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>[src]

impl<T, U> TryInto<U> for T where U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>[src]

`impl Send for RegisterBlock`

`impl !Sync for RegisterBlock`

`impl Unpin for RegisterBlock`

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`pub fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`pub fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`pub fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`pub fn from(t: T) -> T`[src]

`impl<T, U> Into<U> for T where U: From<T>,` [src]

`pub fn into(self) -> U`[src]

`impl<T> Same<T> for T`

`type Output = T`

`impl<T, U> TryFrom<U> for T where U: Into<T>,` [src]

`type Error = Infallible`

`pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>`[src]

`impl<T, U> TryInto<U> for T where U: TryFrom<T>,` [src]

`type Error = <U as TryFrom<T>>::Error`

`pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>`[src]