Enum stm32h7xx_hal::stm32::bdma::isr::GIF1_A[][src]

pub enum GIF1_A {
    NOEVENT,
    EVENT,
}

Channel x global interrupt flag (x = 1..8) This bit is set by hardware. It is cleared by software writing 1 to the corresponding bit in the DMA_IFCR register.

Value on reset: 0

Variants

NOEVENT

0: No TE, HT or TC event on channel x

EVENT

1: A TE, HT or TC event occurred on channel x

Trait Implementations

impl Clone for GIF1_A[src]

impl Copy for GIF1_A[src]

impl Debug for GIF1_A[src]

impl PartialEq<GIF1_A> for GIF1_A[src]

impl StructuralPartialEq for GIF1_A[src]

Auto Trait Implementations

impl Send for GIF1_A

impl Sync for GIF1_A

impl Unpin for GIF1_A

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
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impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.