Module stm32h7xx_hal::pac::iwdg::pr [−][src]
Prescaler register
Structs
PR_W | Write proxy for field |
Enums
PR_A | Prescaler divider These bits are write access protected see Section23.3.6: Register access protection. They are written by software to select the prescaler divider feeding the counter clock. PVU bit of IWDG_SR must be reset in order to be able to change the prescaler divider. Note: Reading this register returns the prescaler value from the VDD voltage domain. This value may not be up to date/valid if a write operation to this register is ongoing. For this reason the value read from this register is valid only when the PVU bit in the IWDG_SR register is reset. |
Type Definitions
PR_R | Reader of field |
R | Reader of register PR |
W | Writer for register PR |