Struct stm32h7xx_hal::device::dmamux2::ccr::DMAREQ_ID_W[−][src]

pub struct DMAREQ_ID_W<'a> { /* fields omitted */ }

Write proxy for field DMAREQ_ID

Implementations

impl<'a> DMAREQ_ID_W<'a>[src]

pub fn variant(self, variant: DMAREQ_ID_A) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Writes variant to the field

pub fn none(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

No signal selected as request input

pub fn dmamux2_req_gen0(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal dmamux2_req_gen0 selected as request input

pub fn dmamux2_req_gen1(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal dmamux2_req_gen1 selected as request input

pub fn dmamux2_req_gen2(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal dmamux2_req_gen2 selected as request input

pub fn dmamux2_req_gen3(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal dmamux2_req_gen3 selected as request input

pub fn dmamux2_req_gen4(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal dmamux2_req_gen4 selected as request input

pub fn dmamux2_req_gen5(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal dmamux2_req_gen5 selected as request input

pub fn dmamux2_req_gen6(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal dmamux2_req_gen6 selected as request input

pub fn dmamux2_req_gen7(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal dmamux2_req_gen7 selected as request input

pub fn lpuart1_rx_dma(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal lpuart1_rx_dma selected as request input

pub fn lpuart1_tx_dma(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal lpuart1_tx_dma selected as request input

pub fn spi6_rx_dma(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal spi6_rx_dma selected as request input

pub fn spi6_tx_dma(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal spi6_tx_dma selected as request input

pub fn i2c4_rx_dma(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal i2c4_rx_dma selected as request input

pub fn i2c4_tx_dma(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal i2c4_tx_dma selected as request input

pub fn sai4_a_dma(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal sai4_a_dma selected as request input

pub fn sai4_b_dma(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal sai4_b_dma selected as request input

pub fn adc3_dma(self) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Signal adc3_dma selected as request input

pub unsafe fn bits(self, value: u8) -> &'a mut W<u32, Reg<u32, _CCR>>[src]

Writes raw bits to the field

Auto Trait Implementations

impl<'a> Send for DMAREQ_ID_W<'a>

impl<'a> !Sync for DMAREQ_ID_W<'a>

impl<'a> Unpin for DMAREQ_ID_W<'a>

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, [src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.