Module stm32h7xx_hal::device::dma2d::bgpfccr [−][src]
DMA2D background PFC control register
Structs
AI_W | Write proxy for field |
ALPHA_W | Write proxy for field |
AM_W | Write proxy for field |
CCM_W | Write proxy for field |
CM_W | Write proxy for field |
CS_W | Write proxy for field |
RBS_W | Write proxy for field |
START_W | Write proxy for field |
Enums
AI_A | Alpha Inverted This bit inverts the alpha value. Once the transfer has started, this bit is read-only. |
AM_A | Alpha mode These bits define which alpha channel value to be used for the background image. These bits can only be written when data transfers are disabled. Once the transfer has started, they are read-only. others: meaningless |
CCM_A | CLUT Color mode These bits define the color format of the CLUT. This register can only be written when the transfer is disabled. Once the CLUT transfer has started, this bit is read-only. |
CM_A | Color mode These bits define the color format of the foreground image. These bits can only be written when data transfers are disabled. Once the transfer has started, they are read-only. others: meaningless |
RBS_A | Red Blue Swap This bit allows to swap the R & B to support BGR or ABGR color formats. Once the transfer has started, this bit is read-only. |
START_A | Start This bit is set to start the automatic loading of the CLUT. This bit is automatically reset: ** at the end of the transfer ** when the transfer is aborted by the user application by setting the ABORT bit in the DMA2D_CR ** when a transfer error occurs ** when the transfer has not started due to a configuration error or another transfer operation already on going (data transfer or automatic BackGround CLUT transfer). |
Type Definitions
AI_R | Reader of field |
ALPHA_R | Reader of field |
AM_R | Reader of field |
CCM_R | Reader of field |
CM_R | Reader of field |
CS_R | Reader of field |
R | Reader of register BGPFCCR |
RBS_R | Reader of field |
START_R | Reader of field |
W | Writer for register BGPFCCR |