Struct stm32h7x3::rcc::c1_ahb4enr::R
[−]
[src]
pub struct R { /* fields omitted */ }
Value read from the register
Methods
impl R
[src]
fn bits(&self) -> u32
[src]
Value of the register as raw bits
fn gpioaen(&self) -> GPIOAENR
[src]
Bit 0 - 0GPIO peripheral clock enable
fn gpioben(&self) -> GPIOBENR
[src]
Bit 1 - 0GPIO peripheral clock enable
fn gpiocen(&self) -> GPIOCENR
[src]
Bit 2 - 0GPIO peripheral clock enable
fn gpioden(&self) -> GPIODENR
[src]
Bit 3 - 0GPIO peripheral clock enable
fn gpioeen(&self) -> GPIOEENR
[src]
Bit 4 - 0GPIO peripheral clock enable
fn gpiofen(&self) -> GPIOFENR
[src]
Bit 5 - 0GPIO peripheral clock enable
fn gpiogen(&self) -> GPIOGENR
[src]
Bit 6 - 0GPIO peripheral clock enable
fn gpiohen(&self) -> GPIOHENR
[src]
Bit 7 - 0GPIO peripheral clock enable
fn gpioien(&self) -> GPIOIENR
[src]
Bit 8 - 0GPIO peripheral clock enable
fn gpiojen(&self) -> GPIOJENR
[src]
Bit 9 - 0GPIO peripheral clock enable
fn gpioken(&self) -> GPIOKENR
[src]
Bit 10 - 0GPIO peripheral clock enable
fn crcen(&self) -> CRCENR
[src]
Bit 19 - CRC peripheral clock enable
fn bdmaen(&self) -> BDMAENR
[src]
Bit 21 - BDMA and DMAMUX2 Clock Enable
fn adc3en(&self) -> ADC3ENR
[src]
Bit 24 - ADC3 Peripheral Clocks Enable
fn hsemen(&self) -> HSEMENR
[src]
Bit 25 - HSEM peripheral clock enable
fn bkpramen(&self) -> BKPRAMENR
[src]
Bit 28 - Backup RAM Clock Enable