Struct stm32h7x3::fmc::FMC_BTR3

pub struct FMC_BTR3 { /* fields omitted */ }

This register contains the control information of each memory bank, used for SRAMs, PSRAM and NOR Flash memories.If the EXTMOD bit is set in the FMC_BCRx register, then this register is partitioned for write and read access, that is, 2 registers are available: one to configure read accesses (this register) and one to configure write accesses (FMC_BWTRx registers).

Methods

impl FMC_BTR3

fn modify<F>(&self, f: F) where
    F: FnOnce(&R, &'w mut W) -> &'w mut W, 

Modifies the contents of the register

fn read(&self) -> R

Reads the contents of the register

fn write<F>(&self, f: F) where
    F: FnOnce(&mut W) -> &mut W, 

Writes to the register

fn reset(&self)

Writes the reset value to the register