Struct stm32h7x3::fmc::FMC_SR

pub struct FMC_SR { /* fields omitted */ }

This register contains information about the FIFO status and interrupt. The FMC features a FIFO that is used when writing to memories to transfer up to 16 words of data.This is used to quickly write to the FIFO and free the AXI bus for transactions to peripherals other than the FMC, while the FMC is draining its FIFO into the memory. One of these register bits indicates the status of the FIFO, for ECC purposes.The ECC is calculated while the data are written to the memory. To read the correct ECC, the software must consequently wait until the FIFO is empty.

Methods

impl FMC_SR

fn modify<F>(&self, f: F) where
    F: FnOnce(&R, &'w mut W) -> &'w mut W, 

Modifies the contents of the register

fn read(&self) -> R

Reads the contents of the register

fn write<F>(&self, f: F) where
    F: FnOnce(&mut W) -> &mut W, 

Writes to the register

fn reset(&self)

Writes the reset value to the register