Struct stm32h743::pwr::PWR_CR2

pub struct PWR_CR2 { /* fields omitted */ }

This register is not reset by wakeup from Standby mode, RESET signal and VDD POR. It is only reset by VSW POR and VSWRST reset. This register shall not be accessed when VSWRST bit in RCC_BDCR register resets the VSW domain.After reset, PWR_CR2 register is write-protected. Prior to modifying its content, the DBP bit in PWR_CR1 register must be set to disable the write protection.

Methods

impl PWR_CR2

pub fn modify<F>(&self, f: F) where
    F: FnOnce(&R, &'w mut W) -> &'w mut W, 

Modifies the contents of the register

pub fn read(&self) -> R

Reads the contents of the register

pub fn write<F>(&self, f: F) where
    F: FnOnce(&mut W) -> &mut W, 

Writes to the register

pub fn reset(&self)

Writes the reset value to the register

Trait Implementations