Struct stm32h743::otg1_hs_host::RegisterBlock [] [src]

#[repr(C)]
pub struct RegisterBlock { pub otg_hs_hcfg: OTG_HS_HCFG, pub otg_hs_hfir: OTG_HS_HFIR, pub otg_hs_hfnum: OTG_HS_HFNUM, pub otg_hs_hptxsts: OTG_HS_HPTXSTS, pub otg_hs_haint: OTG_HS_HAINT, pub otg_hs_haintmsk: OTG_HS_HAINTMSK, pub otg_hs_hprt: OTG_HS_HPRT, pub otg_hs_hcchar0: OTG_HS_HCCHAR0, pub otg_hs_hcsplt0: OTG_HS_HCSPLT0, pub otg_hs_hcint0: OTG_HS_HCINT0, pub otg_hs_hcintmsk0: OTG_HS_HCINTMSK0, pub otg_hs_hctsiz0: OTG_HS_HCTSIZ0, pub otg_hs_hcdma0: OTG_HS_HCDMA0, pub otg_hs_hcchar1: OTG_HS_HCCHAR1, pub otg_hs_hcsplt1: OTG_HS_HCSPLT1, pub otg_hs_hcint1: OTG_HS_HCINT1, pub otg_hs_hcintmsk1: OTG_HS_HCINTMSK1, pub otg_hs_hctsiz1: OTG_HS_HCTSIZ1, pub otg_hs_hcdma1: OTG_HS_HCDMA1, pub otg_hs_hcchar2: OTG_HS_HCCHAR2, pub otg_hs_hcsplt2: OTG_HS_HCSPLT2, pub otg_hs_hcint2: OTG_HS_HCINT2, pub otg_hs_hcintmsk2: OTG_HS_HCINTMSK2, pub otg_hs_hctsiz2: OTG_HS_HCTSIZ2, pub otg_hs_hcdma2: OTG_HS_HCDMA2, pub otg_hs_hcchar3: OTG_HS_HCCHAR3, pub otg_hs_hcsplt3: OTG_HS_HCSPLT3, pub otg_hs_hcint3: OTG_HS_HCINT3, pub otg_hs_hcintmsk3: OTG_HS_HCINTMSK3, pub otg_hs_hctsiz3: OTG_HS_HCTSIZ3, pub otg_hs_hcdma3: OTG_HS_HCDMA3, pub otg_hs_hcchar4: OTG_HS_HCCHAR4, pub otg_hs_hcsplt4: OTG_HS_HCSPLT4, pub otg_hs_hcint4: OTG_HS_HCINT4, pub otg_hs_hcintmsk4: OTG_HS_HCINTMSK4, pub otg_hs_hctsiz4: OTG_HS_HCTSIZ4, pub otg_hs_hcdma4: OTG_HS_HCDMA4, pub otg_hs_hcchar5: OTG_HS_HCCHAR5, pub otg_hs_hcsplt5: OTG_HS_HCSPLT5, pub otg_hs_hcint5: OTG_HS_HCINT5, pub otg_hs_hcintmsk5: OTG_HS_HCINTMSK5, pub otg_hs_hctsiz5: OTG_HS_HCTSIZ5, pub otg_hs_hcdma5: OTG_HS_HCDMA5, pub otg_hs_hcchar6: OTG_HS_HCCHAR6, pub otg_hs_hcsplt6: OTG_HS_HCSPLT6, pub otg_hs_hcint6: OTG_HS_HCINT6, pub otg_hs_hcintmsk6: OTG_HS_HCINTMSK6, pub otg_hs_hctsiz6: OTG_HS_HCTSIZ6, pub otg_hs_hcdma6: OTG_HS_HCDMA6, pub otg_hs_hcchar7: OTG_HS_HCCHAR7, pub otg_hs_hcsplt7: OTG_HS_HCSPLT7, pub otg_hs_hcint7: OTG_HS_HCINT7, pub otg_hs_hcintmsk7: OTG_HS_HCINTMSK7, pub otg_hs_hctsiz7: OTG_HS_HCTSIZ7, pub otg_hs_hcdma7: OTG_HS_HCDMA7, pub otg_hs_hcchar8: OTG_HS_HCCHAR8, pub otg_hs_hcsplt8: OTG_HS_HCSPLT8, pub otg_hs_hcint8: OTG_HS_HCINT8, pub otg_hs_hcintmsk8: OTG_HS_HCINTMSK8, pub otg_hs_hctsiz8: OTG_HS_HCTSIZ8, pub otg_hs_hcdma8: OTG_HS_HCDMA8, pub otg_hs_hcchar9: OTG_HS_HCCHAR9, pub otg_hs_hcsplt9: OTG_HS_HCSPLT9, pub otg_hs_hcint9: OTG_HS_HCINT9, pub otg_hs_hcintmsk9: OTG_HS_HCINTMSK9, pub otg_hs_hctsiz9: OTG_HS_HCTSIZ9, pub otg_hs_hcdma9: OTG_HS_HCDMA9, pub otg_hs_hcchar10: OTG_HS_HCCHAR10, pub otg_hs_hcsplt10: OTG_HS_HCSPLT10, pub otg_hs_hcint10: OTG_HS_HCINT10, pub otg_hs_hcintmsk10: OTG_HS_HCINTMSK10, pub otg_hs_hctsiz10: OTG_HS_HCTSIZ10, pub otg_hs_hcdma10: OTG_HS_HCDMA10, pub otg_hs_hcchar11: OTG_HS_HCCHAR11, pub otg_hs_hcsplt11: OTG_HS_HCSPLT11, pub otg_hs_hcint11: OTG_HS_HCINT11, pub otg_hs_hcintmsk11: OTG_HS_HCINTMSK11, pub otg_hs_hctsiz11: OTG_HS_HCTSIZ11, pub otg_hs_hcdma11: OTG_HS_HCDMA11, pub otg_hs_hcchar12: OTG_HS_HCCHAR12, pub otg_hs_hcsplt12: OTG_HS_HCSPLT12, pub otg_hs_hcint12: OTG_HS_HCINT12, pub otg_hs_hcintmsk12: OTG_HS_HCINTMSK12, pub otg_hs_hctsiz12: OTG_HS_HCTSIZ12, pub otg_hs_hcdma12: OTG_HS_HCDMA12, pub otg_hs_hcchar13: OTG_HS_HCCHAR13, pub otg_hs_hcsplt13: OTG_HS_HCSPLT13, pub otg_hs_hcint13: OTG_HS_HCINT13, pub otg_hs_hcintmsk13: OTG_HS_HCINTMSK13, pub otg_hs_hctsiz13: OTG_HS_HCTSIZ13, pub otg_hs_hcdma13: OTG_HS_HCDMA13, pub otg_hs_hcchar14: OTG_HS_HCCHAR14, pub otg_hs_hcsplt14: OTG_HS_HCSPLT14, pub otg_hs_hcint14: OTG_HS_HCINT14, pub otg_hs_hcintmsk14: OTG_HS_HCINTMSK14, pub otg_hs_hctsiz14: OTG_HS_HCTSIZ14, pub otg_hs_hcdma14: OTG_HS_HCDMA14, pub otg_hs_hcchar15: OTG_HS_HCCHAR15, pub otg_hs_hcsplt15: OTG_HS_HCSPLT15, pub otg_hs_hcint15: OTG_HS_HCINT15, pub otg_hs_hcintmsk15: OTG_HS_HCINTMSK15, pub otg_hs_hctsiz15: OTG_HS_HCTSIZ15, pub otg_hs_hcdma15: OTG_HS_HCDMA15, // some fields omitted }

Register block

Fields

0x00 - OTG_HS host configuration register

0x04 - OTG_HS Host frame interval register

0x08 - OTG_HS host frame number/frame time remaining register

0x10 - OTG_HS_Host periodic transmit FIFO/queue status register

0x14 - OTG_HS Host all channels interrupt register

0x18 - OTG_HS host all channels interrupt mask register

0x40 - OTG_HS host port control and status register

0x100 - OTG_HS host channel-0 characteristics register

0x104 - OTG_HS host channel-0 split control register

0x108 - OTG_HS host channel-11 interrupt register

0x10c - OTG_HS host channel-11 interrupt mask register

0x110 - OTG_HS host channel-11 transfer size register

0x114 - OTG_HS host channel-0 DMA address register

0x120 - OTG_HS host channel-1 characteristics register

0x124 - OTG_HS host channel-1 split control register

0x128 - OTG_HS host channel-1 interrupt register

0x12c - OTG_HS host channel-1 interrupt mask register

0x130 - OTG_HS host channel-1 transfer size register

0x134 - OTG_HS host channel-1 DMA address register

0x140 - OTG_HS host channel-2 characteristics register

0x144 - OTG_HS host channel-2 split control register

0x148 - OTG_HS host channel-2 interrupt register

0x14c - OTG_HS host channel-2 interrupt mask register

0x150 - OTG_HS host channel-2 transfer size register

0x154 - OTG_HS host channel-2 DMA address register

0x160 - OTG_HS host channel-3 characteristics register

0x164 - OTG_HS host channel-3 split control register

0x168 - OTG_HS host channel-3 interrupt register

0x16c - OTG_HS host channel-3 interrupt mask register

0x170 - OTG_HS host channel-3 transfer size register

0x174 - OTG_HS host channel-3 DMA address register

0x180 - OTG_HS host channel-4 characteristics register

0x184 - OTG_HS host channel-4 split control register

0x188 - OTG_HS host channel-4 interrupt register

0x18c - OTG_HS host channel-4 interrupt mask register

0x190 - OTG_HS host channel-4 transfer size register

0x194 - OTG_HS host channel-4 DMA address register

0x1a0 - OTG_HS host channel-5 characteristics register

0x1a4 - OTG_HS host channel-5 split control register

0x1a8 - OTG_HS host channel-5 interrupt register

0x1ac - OTG_HS host channel-5 interrupt mask register

0x1b0 - OTG_HS host channel-5 transfer size register

0x1b4 - OTG_HS host channel-5 DMA address register

0x1c0 - OTG_HS host channel-6 characteristics register

0x1c4 - OTG_HS host channel-6 split control register

0x1c8 - OTG_HS host channel-6 interrupt register

0x1cc - OTG_HS host channel-6 interrupt mask register

0x1d0 - OTG_HS host channel-6 transfer size register

0x1d4 - OTG_HS host channel-6 DMA address register

0x1e0 - OTG_HS host channel-7 characteristics register

0x1e4 - OTG_HS host channel-7 split control register

0x1e8 - OTG_HS host channel-7 interrupt register

0x1ec - OTG_HS host channel-7 interrupt mask register

0x1f0 - OTG_HS host channel-7 transfer size register

0x1f4 - OTG_HS host channel-7 DMA address register

0x200 - OTG_HS host channel-8 characteristics register

0x204 - OTG_HS host channel-8 split control register

0x208 - OTG_HS host channel-8 interrupt register

0x20c - OTG_HS host channel-8 interrupt mask register

0x210 - OTG_HS host channel-8 transfer size register

0x214 - OTG_HS host channel-8 DMA address register

0x220 - OTG_HS host channel-9 characteristics register

0x224 - OTG_HS host channel-9 split control register

0x228 - OTG_HS host channel-9 interrupt register

0x22c - OTG_HS host channel-9 interrupt mask register

0x230 - OTG_HS host channel-9 transfer size register

0x234 - OTG_HS host channel-9 DMA address register

0x240 - OTG_HS host channel-10 characteristics register

0x244 - OTG_HS host channel-10 split control register

0x248 - OTG_HS host channel-10 interrupt register

0x24c - OTG_HS host channel-10 interrupt mask register

0x250 - OTG_HS host channel-10 transfer size register

0x254 - OTG_HS host channel-10 DMA address register

0x260 - OTG_HS host channel-11 characteristics register

0x264 - OTG_HS host channel-11 split control register

0x268 - OTG_HS host channel-11 interrupt register

0x26c - OTG_HS host channel-11 interrupt mask register

0x270 - OTG_HS host channel-11 transfer size register

0x274 - OTG_HS host channel-11 DMA address register

0x278 - OTG_HS host channel-12 characteristics register

0x27c - OTG_HS host channel-12 split control register

0x280 - OTG_HS host channel-12 interrupt register

0x284 - OTG_HS host channel-12 interrupt mask register

0x288 - OTG_HS host channel-12 transfer size register

0x28c - OTG_HS host channel-12 DMA address register

0x290 - OTG_HS host channel-13 characteristics register

0x294 - OTG_HS host channel-13 split control register

0x298 - OTG_HS host channel-13 interrupt register

0x29c - OTG_HS host channel-13 interrupt mask register

0x2a0 - OTG_HS host channel-13 transfer size register

0x2a4 - OTG_HS host channel-13 DMA address register

0x2a8 - OTG_HS host channel-14 characteristics register

0x2ac - OTG_HS host channel-14 split control register

0x2b0 - OTG_HS host channel-14 interrupt register

0x2b4 - OTG_HS host channel-14 interrupt mask register

0x2b8 - OTG_HS host channel-14 transfer size register

0x2bc - OTG_HS host channel-14 DMA address register

0x2c0 - OTG_HS host channel-15 characteristics register

0x2c4 - OTG_HS host channel-15 split control register

0x2c8 - OTG_HS host channel-15 interrupt register

0x2cc - OTG_HS host channel-15 interrupt mask register

0x2d0 - OTG_HS host channel-15 transfer size register

0x2d4 - OTG_HS host channel-15 DMA address register

Trait Implementations

Auto Trait Implementations

impl Send for RegisterBlock

impl !Sync for RegisterBlock