Struct stm32h743::i2c1::i2c_cr1::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
pub fn bits(&self) -> u32[src]
Value of the register as raw bits
pub fn pe(&self) -> PER[src]
Bit 0 - Peripheral enable Note: When PE=0, the I2C SCL and SDA lines are released. Internal state machines and status bits are put back to their reset value. When cleared, PE must be kept low for at least 3 APB clock cycles.
pub fn txie(&self) -> TXIER[src]
Bit 1 - TX Interrupt enable
pub fn rxie(&self) -> RXIER[src]
Bit 2 - RX Interrupt enable
pub fn addrie(&self) -> ADDRIER[src]
Bit 3 - Address match Interrupt enable (slave only)
pub fn nackie(&self) -> NACKIER[src]
Bit 4 - Not acknowledge received Interrupt enable
pub fn stopie(&self) -> STOPIER[src]
Bit 5 - STOP detection Interrupt enable
pub fn tcie(&self) -> TCIER[src]
Bit 6 - Transfer Complete interrupt enable Note: Any of these events will generate an interrupt: Transfer Complete (TC) Transfer Complete Reload (TCR)
pub fn errie(&self) -> ERRIER[src]
Bit 7 - Error interrupts enable Note: Any of these errors generate an interrupt: Arbitration Loss (ARLO) Bus Error detection (BERR) Overrun/Underrun (OVR) Timeout detection (TIMEOUT) PEC error detection (PECERR) Alert pin event detection (ALERT)
pub fn dnf(&self) -> DNFR[src]
Bits 8:11 - Digital noise filter These bits are used to configure the digital noise filter on SDA and SCL input. The digital filter will filter spikes with a length of up to DNF[3:0] * tI2CCLK ... Note: If the analog filter is also enabled, the digital filter is added to the analog filter. This filter can only be programmed when the I2C is disabled (PE = 0).
pub fn anfoff(&self) -> ANFOFFR[src]
Bit 12 - Analog noise filter OFF Note: This bit can only be programmed when the I2C is disabled (PE = 0).
pub fn txdmaen(&self) -> TXDMAENR[src]
Bit 14 - DMA transmission requests enable
pub fn rxdmaen(&self) -> RXDMAENR[src]
Bit 15 - DMA reception requests enable
pub fn sbc(&self) -> SBCR[src]
Bit 16 - Slave byte control This bit is used to enable hardware byte control in slave mode.
pub fn nostretch(&self) -> NOSTRETCHR[src]
Bit 17 - Clock stretching disable This bit is used to disable clock stretching in slave mode. It must be kept cleared in master mode. Note: This bit can only be programmed when the I2C is disabled (PE = 0).
pub fn wupen(&self) -> WUPENR[src]
Bit 18 - Wakeup from Stop mode enable Note: If the Wakeup from Stop mode feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation. Note: WUPEN can be set only when DNF = 0000
pub fn gcen(&self) -> GCENR[src]
Bit 19 - General call enable
pub fn smbhen(&self) -> SMBHENR[src]
Bit 20 - SMBus Host address enable Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.
pub fn smbden(&self) -> SMBDENR[src]
Bit 21 - SMBus Device Default address enable Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.
pub fn alerten(&self) -> ALERTENR[src]
Bit 22 - SMBus alert enable Device mode (SMBHEN=0): Host mode (SMBHEN=1): Note: When ALERTEN=0, the SMBA pin can be used as a standard GPIO. If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.
pub fn pecen(&self) -> PECENR[src]
Bit 23 - PEC enable Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.