Struct stm32h743::fdcan1::fdcan_ttie::W
[−]
[src]
pub struct W { /* fields omitted */ }Value to write to the register
Methods
impl W[src]
pub fn reset_value() -> W[src]
Reset value of the register
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self[src]
Writes raw bits to the register
pub fn sbce(&mut self) -> _SBCEW[src]
Bit 0 - Start of Basic Cycle Interrupt Enable
pub fn smce(&mut self) -> _SMCEW[src]
Bit 1 - Start of Matrix Cycle Interrupt Enable
pub fn csme(&mut self) -> _CSMEW[src]
Bit 2 - Change of Synchronization Mode Interrupt Enable
pub fn soge(&mut self) -> _SOGEW[src]
Bit 3 - Start of Gap Interrupt Enable
pub fn rtmie(&mut self) -> _RTMIEW[src]
Bit 4 - Register Time Mark Interrupt Enable
pub fn ttmie(&mut self) -> _TTMIEW[src]
Bit 5 - Trigger Time Mark Event Internal Interrupt Enable
pub fn swee(&mut self) -> _SWEEW[src]
Bit 6 - Stop Watch Event Interrupt Enable
pub fn gtwe(&mut self) -> _GTWEW[src]
Bit 7 - Global Time Wrap Interrupt Enable
pub fn gtde(&mut self) -> _GTDEW[src]
Bit 8 - Global Time Discontinuity Interrupt Enable
pub fn gtee(&mut self) -> _GTEEW[src]
Bit 9 - Global Time Error Interrupt Enable
pub fn txue(&mut self) -> _TXUEW[src]
Bit 10 - Tx Count Underflow Interrupt Enable
pub fn txoe(&mut self) -> _TXOEW[src]
Bit 11 - Tx Count Overflow Interrupt Enable
pub fn se1e(&mut self) -> _SE1EW[src]
Bit 12 - Scheduling Error 1 Interrupt Enable
pub fn se2e(&mut self) -> _SE2EW[src]
Bit 13 - Scheduling Error 2 Interrupt Enable
pub fn elce(&mut self) -> _ELCEW[src]
Bit 14 - Change Error Level Interrupt Enable
pub fn iwtge(&mut self) -> _IWTGEW[src]
Bit 15 - Initialization Watch Trigger Interrupt Enable
pub fn wte(&mut self) -> _WTEW[src]
Bit 16 - Watch Trigger Interrupt Enable
pub fn awe(&mut self) -> _AWEW[src]
Bit 17 - Application Watchdog Interrupt Enable
pub fn cere(&mut self) -> _CEREW[src]
Bit 18 - Configuration Error Interrupt Enable