Struct stm32h7::stm32h747cm7::sdmmc1::fifor::FIFOR_SPEC

pub struct FIFOR_SPEC;

The receive and transmit FIFOs can be only read or written as word (32-bit) wide registers. The FIFOs contain 16 entries on sequential addresses. This allows the CPU to use its load and store multiple operands to read from/write to the FIFO.When accessing SDMMC_FIFOR with half word or byte access an AHB bus fault is generated.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see fifor module

Trait Implementations

impl Readable for FIFOR_SPEC

read() method returns fifor::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for FIFOR_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for FIFOR_SPEC

reset() method sets FIFOR to value 0

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for FIFOR_SPEC

write(|w| ..) method takes fifor::W writer structure

type Writer = W

Writer type argument to write, et al.