pub struct CR2_SPEC;
Expand description
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.
This register you can read
, write_with_zero
, reset
, write
, modify
. See API.
For information about available fields see cr2 module
Trait Implementations
sourceimpl RegisterSpec for CR2_SPEC
impl RegisterSpec for CR2_SPEC
sourceimpl Resettable for CR2_SPEC
impl Resettable for CR2_SPEC
reset()
method sets CR2 to value 0
sourcefn reset_value() -> Self::Ux
fn reset_value() -> Self::Ux
Reset value of the register.
Auto Trait Implementations
impl RefUnwindSafe for CR2_SPEC
impl Send for CR2_SPEC
impl Sync for CR2_SPEC
impl Unpin for CR2_SPEC
impl UnwindSafe for CR2_SPEC
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more