Struct stm32h7::stm32h747cm7::i2c1::cr1::CR1_SPEC

pub struct CR1_SPEC;

Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see cr1 module

Trait Implementations

impl Readable for CR1_SPEC

read() method returns cr1::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for CR1_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for CR1_SPEC

reset() method sets CR1 to value 0

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for CR1_SPEC

write(|w| ..) method takes cr1::W writer structure

type Writer = W

Writer type argument to write, et al.