Struct stm32h7::stm32h743v::rng::sr::W

pub struct W(_);

Register SR writer

Implementations

impl W

pub fn ceis(&mut self) -> CEIS_W<'_, 5>

Bit 5 - Clock error interrupt status This bit is set at the same time as CECS. It is cleared by writing it to 0. An interrupt is pending if IE = 1 in the RNG_CR register. Note: This bit is meaningless if CED (Clock error detection) bit in RNG_CR is equal to 1.

pub fn seis(&mut self) -> SEIS_W<'_, 6>

Bit 6 - Seed error interrupt status This bit is set at the same time as SECS. It is cleared by writing it to 0. ** More than 64 consecutive bits at the same value (0 or 1) ** More than 32 consecutive alternances of 0 and 1 (0101010101…01) An interrupt is pending if IE = 1 in the RNG_CR register.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<SR_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<SR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<SR_SPEC>> for W

fn from(writer: W<SR_SPEC>) -> Self

Converts to this type from the input type.