Struct stm32h7::stm32h743v::pwr::cr2::CR2_SPEC

pub struct CR2_SPEC;

This register is not reset by wakeup from Standby mode, RESET signal and VDD POR. It is only reset by VSW POR and VSWRST reset. This register shall not be accessed when VSWRST bit in RCC_BDCR register resets the VSW domain.After reset, PWR_CR2 register is write-protected. Prior to modifying its content, the DBP bit in PWR_CR1 register must be set to disable the write protection.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see cr2 module

Trait Implementations

impl Readable for CR2_SPEC

read() method returns cr2::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for CR2_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for CR2_SPEC

reset() method sets CR2 to value 0

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for CR2_SPEC

write(|w| ..) method takes cr2::W writer structure

type Writer = W

Writer type argument to write, et al.