Struct stm32h7::stm32h743v::otg1_hs_device::RegisterBlock
source · [−]#[repr(C)]pub struct RegisterBlock {Show 70 fields
pub dcfg: Reg<DCFG_SPEC>,
pub dctl: Reg<DCTL_SPEC>,
pub dsts: Reg<DSTS_SPEC>,
pub diepmsk: Reg<DIEPMSK_SPEC>,
pub doepmsk: Reg<DOEPMSK_SPEC>,
pub daint: Reg<DAINT_SPEC>,
pub daintmsk: Reg<DAINTMSK_SPEC>,
pub dvbusdis: Reg<DVBUSDIS_SPEC>,
pub dvbuspulse: Reg<DVBUSPULSE_SPEC>,
pub dthrctl: Reg<DTHRCTL_SPEC>,
pub diepempmsk: Reg<DIEPEMPMSK_SPEC>,
pub deachint: Reg<DEACHINT_SPEC>,
pub deachintmsk: Reg<DEACHINTMSK_SPEC>,
pub diepctl0: Reg<DIEPCTL0_SPEC>,
pub diepint0: Reg<DIEPINT0_SPEC>,
pub dieptsiz0: Reg<DIEPTSIZ0_SPEC>,
pub diepdma1: Reg<DIEPDMA1_SPEC>,
pub dtxfsts0: Reg<DTXFSTS0_SPEC>,
pub diepctl1: Reg<DIEPCTL1_SPEC>,
pub diepint1: Reg<DIEPINT1_SPEC>,
pub dieptsiz1: Reg<DIEPTSIZ1_SPEC>,
pub diepdma2: Reg<DIEPDMA2_SPEC>,
pub dtxfsts1: Reg<DTXFSTS1_SPEC>,
pub diepctl2: Reg<DIEPCTL2_SPEC>,
pub diepint2: Reg<DIEPINT2_SPEC>,
pub dieptsiz2: Reg<DIEPTSIZ2_SPEC>,
pub diepdma3: Reg<DIEPDMA3_SPEC>,
pub dtxfsts2: Reg<DTXFSTS2_SPEC>,
pub diepctl3: Reg<DIEPCTL3_SPEC>,
pub diepint3: Reg<DIEPINT3_SPEC>,
pub dieptsiz3: Reg<DIEPTSIZ3_SPEC>,
pub diepdma4: Reg<DIEPDMA4_SPEC>,
pub dtxfsts3: Reg<DTXFSTS3_SPEC>,
pub diepctl4: Reg<DIEPCTL4_SPEC>,
pub diepint4: Reg<DIEPINT4_SPEC>,
pub dieptsiz4: Reg<DIEPTSIZ4_SPEC>,
pub diepdma5: Reg<DIEPDMA5_SPEC>,
pub dtxfsts4: Reg<DTXFSTS4_SPEC>,
pub dtxfsts6: Reg<DTXFSTS6_SPEC>,
pub dtxfsts7: Reg<DTXFSTS7_SPEC>,
pub dieptsiz5: Reg<DIEPTSIZ5_SPEC>,
pub dtxfsts5: Reg<DTXFSTS5_SPEC>,
pub diepctl6: Reg<DIEPCTL6_SPEC>,
pub diepint6: Reg<DIEPINT6_SPEC>,
pub diepctl7: Reg<DIEPCTL7_SPEC>,
pub diepint7: Reg<DIEPINT7_SPEC>,
pub doepctl0: Reg<DOEPCTL0_SPEC>,
pub doepint0: Reg<DOEPINT0_SPEC>,
pub doeptsiz0: Reg<DOEPTSIZ0_SPEC>,
pub doepctl1: Reg<DOEPCTL1_SPEC>,
pub doepint1: Reg<DOEPINT1_SPEC>,
pub doeptsiz1: Reg<DOEPTSIZ1_SPEC>,
pub doepctl2: Reg<DOEPCTL2_SPEC>,
pub doepint2: Reg<DOEPINT2_SPEC>,
pub doeptsiz2: Reg<DOEPTSIZ2_SPEC>,
pub doepctl3: Reg<DOEPCTL3_SPEC>,
pub doepint3: Reg<DOEPINT3_SPEC>,
pub doeptsiz3: Reg<DOEPTSIZ3_SPEC>,
pub doepctl4: Reg<DOEPCTL4_SPEC>,
pub doepint4: Reg<DOEPINT4_SPEC>,
pub doeptsiz4: Reg<DOEPTSIZ4_SPEC>,
pub doepctl5: Reg<DOEPCTL5_SPEC>,
pub doepint5: Reg<DOEPINT5_SPEC>,
pub doeptsiz5: Reg<DOEPTSIZ5_SPEC>,
pub doepctl6: Reg<DOEPCTL6_SPEC>,
pub doepint6: Reg<DOEPINT6_SPEC>,
pub doeptsiz6: Reg<DOEPTSIZ6_SPEC>,
pub doepctl7: Reg<DOEPCTL7_SPEC>,
pub doepint7: Reg<DOEPINT7_SPEC>,
pub doeptsiz7: Reg<DOEPTSIZ7_SPEC>,
/* private fields */
}
Expand description
Register block
Fields
dcfg: Reg<DCFG_SPEC>
0x00 - OTG_HS device configuration register
dctl: Reg<DCTL_SPEC>
0x04 - OTG_HS device control register
dsts: Reg<DSTS_SPEC>
0x08 - OTG_HS device status register
diepmsk: Reg<DIEPMSK_SPEC>
0x10 - OTG_HS device IN endpoint common interrupt mask register
doepmsk: Reg<DOEPMSK_SPEC>
0x14 - OTG_HS device OUT endpoint common interrupt mask register
daint: Reg<DAINT_SPEC>
0x18 - OTG_HS device all endpoints interrupt register
daintmsk: Reg<DAINTMSK_SPEC>
0x1c - OTG_HS all endpoints interrupt mask register
dvbusdis: Reg<DVBUSDIS_SPEC>
0x28 - OTG_HS device VBUS discharge time register
dvbuspulse: Reg<DVBUSPULSE_SPEC>
0x2c - OTG_HS device VBUS pulsing time register
dthrctl: Reg<DTHRCTL_SPEC>
0x30 - OTG_HS Device threshold control register
diepempmsk: Reg<DIEPEMPMSK_SPEC>
0x34 - OTG_HS device IN endpoint FIFO empty interrupt mask register
deachint: Reg<DEACHINT_SPEC>
0x38 - OTG_HS device each endpoint interrupt register
deachintmsk: Reg<DEACHINTMSK_SPEC>
0x3c - OTG_HS device each endpoint interrupt register mask
diepctl0: Reg<DIEPCTL0_SPEC>
0x100 - OTG device endpoint-0 control register
diepint0: Reg<DIEPINT0_SPEC>
0x108 - OTG device endpoint-0 interrupt register
dieptsiz0: Reg<DIEPTSIZ0_SPEC>
0x110 - OTG_HS device IN endpoint 0 transfer size register
diepdma1: Reg<DIEPDMA1_SPEC>
0x114 - OTG_HS device endpoint-1 DMA address register
dtxfsts0: Reg<DTXFSTS0_SPEC>
0x118 - OTG_HS device IN endpoint transmit FIFO status register
diepctl1: Reg<DIEPCTL1_SPEC>
0x120 - OTG device endpoint-1 control register
diepint1: Reg<DIEPINT1_SPEC>
0x128 - OTG device endpoint-1 interrupt register
dieptsiz1: Reg<DIEPTSIZ1_SPEC>
0x130 - OTG_HS device endpoint transfer size register
diepdma2: Reg<DIEPDMA2_SPEC>
0x134 - OTG_HS device endpoint-2 DMA address register
dtxfsts1: Reg<DTXFSTS1_SPEC>
0x138 - OTG_HS device IN endpoint transmit FIFO status register
diepctl2: Reg<DIEPCTL2_SPEC>
0x140 - OTG device endpoint-2 control register
diepint2: Reg<DIEPINT2_SPEC>
0x148 - OTG device endpoint-2 interrupt register
dieptsiz2: Reg<DIEPTSIZ2_SPEC>
0x150 - OTG_HS device endpoint transfer size register
diepdma3: Reg<DIEPDMA3_SPEC>
0x154 - OTG_HS device endpoint-3 DMA address register
dtxfsts2: Reg<DTXFSTS2_SPEC>
0x158 - OTG_HS device IN endpoint transmit FIFO status register
diepctl3: Reg<DIEPCTL3_SPEC>
0x160 - OTG device endpoint-3 control register
diepint3: Reg<DIEPINT3_SPEC>
0x168 - OTG device endpoint-3 interrupt register
dieptsiz3: Reg<DIEPTSIZ3_SPEC>
0x170 - OTG_HS device endpoint transfer size register
diepdma4: Reg<DIEPDMA4_SPEC>
0x174 - OTG_HS device endpoint-4 DMA address register
dtxfsts3: Reg<DTXFSTS3_SPEC>
0x178 - OTG_HS device IN endpoint transmit FIFO status register
diepctl4: Reg<DIEPCTL4_SPEC>
0x180 - OTG device endpoint-4 control register
diepint4: Reg<DIEPINT4_SPEC>
0x188 - OTG device endpoint-4 interrupt register
dieptsiz4: Reg<DIEPTSIZ4_SPEC>
0x190 - OTG_HS device endpoint transfer size register
diepdma5: Reg<DIEPDMA5_SPEC>
0x194 - OTG_HS device endpoint-5 DMA address register
dtxfsts4: Reg<DTXFSTS4_SPEC>
0x198 - OTG_HS device IN endpoint transmit FIFO status register
dtxfsts6: Reg<DTXFSTS6_SPEC>
0x1a4 - OTG_HS device IN endpoint transmit FIFO status register
dtxfsts7: Reg<DTXFSTS7_SPEC>
0x1ac - OTG_HS device IN endpoint transmit FIFO status register
dieptsiz5: Reg<DIEPTSIZ5_SPEC>
0x1b0 - OTG_HS device endpoint transfer size register
dtxfsts5: Reg<DTXFSTS5_SPEC>
0x1b8 - OTG_HS device IN endpoint transmit FIFO status register
diepctl6: Reg<DIEPCTL6_SPEC>
0x1c0 - OTG device endpoint-6 control register
diepint6: Reg<DIEPINT6_SPEC>
0x1c8 - OTG device endpoint-6 interrupt register
diepctl7: Reg<DIEPCTL7_SPEC>
0x1e0 - OTG device endpoint-7 control register
diepint7: Reg<DIEPINT7_SPEC>
0x1e8 - OTG device endpoint-7 interrupt register
doepctl0: Reg<DOEPCTL0_SPEC>
0x300 - OTG_HS device control OUT endpoint 0 control register
doepint0: Reg<DOEPINT0_SPEC>
0x308 - OTG_HS device endpoint-0 interrupt register
doeptsiz0: Reg<DOEPTSIZ0_SPEC>
0x310 - OTG_HS device endpoint-0 transfer size register
doepctl1: Reg<DOEPCTL1_SPEC>
0x320 - OTG device endpoint-1 control register
doepint1: Reg<DOEPINT1_SPEC>
0x328 - OTG_HS device endpoint-1 interrupt register
doeptsiz1: Reg<DOEPTSIZ1_SPEC>
0x330 - OTG_HS device endpoint-1 transfer size register
doepctl2: Reg<DOEPCTL2_SPEC>
0x340 - OTG device endpoint-2 control register
doepint2: Reg<DOEPINT2_SPEC>
0x348 - OTG_HS device endpoint-2 interrupt register
doeptsiz2: Reg<DOEPTSIZ2_SPEC>
0x350 - OTG_HS device endpoint-2 transfer size register
doepctl3: Reg<DOEPCTL3_SPEC>
0x360 - OTG device endpoint-3 control register
doepint3: Reg<DOEPINT3_SPEC>
0x368 - OTG_HS device endpoint-3 interrupt register
doeptsiz3: Reg<DOEPTSIZ3_SPEC>
0x370 - OTG_HS device endpoint-3 transfer size register
doepctl4: Reg<DOEPCTL4_SPEC>
0x380 - OTG device endpoint-4 control register
doepint4: Reg<DOEPINT4_SPEC>
0x388 - OTG_HS device endpoint-4 interrupt register
doeptsiz4: Reg<DOEPTSIZ4_SPEC>
0x390 - OTG_HS device endpoint-4 transfer size register
doepctl5: Reg<DOEPCTL5_SPEC>
0x3a0 - OTG device endpoint-5 control register
doepint5: Reg<DOEPINT5_SPEC>
0x3a8 - OTG_HS device endpoint-5 interrupt register
doeptsiz5: Reg<DOEPTSIZ5_SPEC>
0x3b0 - OTG_HS device endpoint-5 transfer size register
doepctl6: Reg<DOEPCTL6_SPEC>
0x3c0 - OTG device endpoint-6 control register
doepint6: Reg<DOEPINT6_SPEC>
0x3c8 - OTG_HS device endpoint-6 interrupt register
doeptsiz6: Reg<DOEPTSIZ6_SPEC>
0x3d0 - OTG_HS device endpoint-6 transfer size register
doepctl7: Reg<DOEPCTL7_SPEC>
0x3e0 - OTG device endpoint-7 control register
doepint7: Reg<DOEPINT7_SPEC>
0x3e8 - OTG_HS device endpoint-7 interrupt register
doeptsiz7: Reg<DOEPTSIZ7_SPEC>
0x3f0 - OTG_HS device endpoint-7 transfer size register
Implementations
sourceimpl RegisterBlock
impl RegisterBlock
sourcepub fn dieptsiz6(&self) -> &Reg<DIEPTSIZ6_SPEC>
pub fn dieptsiz6(&self) -> &Reg<DIEPTSIZ6_SPEC>
0x1a0 - OTG_HS device endpoint transfer size register
sourcepub fn diepctl5(&self) -> &Reg<DIEPCTL5_SPEC>
pub fn diepctl5(&self) -> &Reg<DIEPCTL5_SPEC>
0x1a0 - OTG device endpoint-5 control register
sourcepub fn dieptsiz7(&self) -> &Reg<DIEPTSIZ7_SPEC>
pub fn dieptsiz7(&self) -> &Reg<DIEPTSIZ7_SPEC>
0x1a8 - OTG_HS device endpoint transfer size register
sourcepub fn diepint5(&self) -> &Reg<DIEPINT5_SPEC>
pub fn diepint5(&self) -> &Reg<DIEPINT5_SPEC>
0x1a8 - OTG device endpoint-5 interrupt register
Auto Trait Implementations
impl !RefUnwindSafe for RegisterBlock
impl Send for RegisterBlock
impl !Sync for RegisterBlock
impl Unpin for RegisterBlock
impl UnwindSafe for RegisterBlock
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more