Struct stm32h7::stm32h743v::i2c1::oar2::OAR2_SPEC

pub struct OAR2_SPEC;

Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see oar2 module

Trait Implementations

impl Readable for OAR2_SPEC

read() method returns oar2::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for OAR2_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for OAR2_SPEC

reset() method sets OAR2 to value 0

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for OAR2_SPEC

write(|w| ..) method takes oar2::W writer structure

type Writer = W

Writer type argument to write, et al.