[][src]Struct stm32h7::stm32h743::fdcan1::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub crel: CREL,
    pub endn: ENDN,
    pub dbtp: DBTP,
    pub test: TEST,
    pub rwd: RWD,
    pub cccr: CCCR,
    pub nbtp: NBTP,
    pub tscc: TSCC,
    pub tscv: TSCV,
    pub tocc: TOCC,
    pub tocv: TOCV,
    pub ecr: ECR,
    pub psr: PSR,
    pub tdcr: TDCR,
    pub ir: IR,
    pub ie: IE,
    pub ils: ILS,
    pub ile: ILE,
    pub gfc: GFC,
    pub sidfc: SIDFC,
    pub xidfc: XIDFC,
    pub xidam: XIDAM,
    pub hpms: HPMS,
    pub ndat1: NDAT1,
    pub ndat2: NDAT2,
    pub rxf0c: RXF0C,
    pub rxf0s: RXF0S,
    pub rxf0a: RXF0A,
    pub rxbc: RXBC,
    pub rxf1c: RXF1C,
    pub rxf1s: RXF1S,
    pub rxf1a: RXF1A,
    pub rxesc: RXESC,
    pub txbc: TXBC,
    pub txfqs: TXFQS,
    pub txesc: TXESC,
    pub txbrp: TXBRP,
    pub txbar: TXBAR,
    pub txbcr: TXBCR,
    pub txbto: TXBTO,
    pub txbcf: TXBCF,
    pub txbtie: TXBTIE,
    pub txbcie: TXBCIE,
    pub txefc: TXEFC,
    pub txefs: TXEFS,
    pub txefa: TXEFA,
    pub tttmc: TTTMC,
    pub ttrmc: TTRMC,
    pub ttocf: TTOCF,
    pub ttmlm: TTMLM,
    pub turcf: TURCF,
    pub ttocn: TTOCN,
    pub can_ttgtp: CAN_TTGTP,
    pub tttmk: TTTMK,
    pub ttir: TTIR,
    pub ttie: TTIE,
    pub ttils: TTILS,
    pub ttost: TTOST,
    pub turna: TURNA,
    pub ttlgt: TTLGT,
    pub ttctc: TTCTC,
    pub ttcpt: TTCPT,
    pub ttcsm: TTCSM,
    pub ttts: TTTS,
    // some fields omitted
}

Register block

Fields

crel: CREL

0x00 - FDCAN Core Release Register

endn: ENDN

0x04 - FDCAN Core Release Register

dbtp: DBTP

0x0c - FDCAN Data Bit Timing and Prescaler Register

test: TEST

0x10 - FDCAN Test Register

rwd: RWD

0x14 - FDCAN RAM Watchdog Register

cccr: CCCR

0x18 - FDCAN CC Control Register

nbtp: NBTP

0x1c - FDCAN Nominal Bit Timing and Prescaler Register

tscc: TSCC

0x20 - FDCAN Timestamp Counter Configuration Register

tscv: TSCV

0x24 - FDCAN Timestamp Counter Value Register

tocc: TOCC

0x28 - FDCAN Timeout Counter Configuration Register

tocv: TOCV

0x2c - FDCAN Timeout Counter Value Register

ecr: ECR

0x40 - FDCAN Error Counter Register

psr: PSR

0x44 - FDCAN Protocol Status Register

tdcr: TDCR

0x48 - FDCAN Transmitter Delay Compensation Register

ir: IR

0x50 - FDCAN Interrupt Register

ie: IE

0x54 - FDCAN Interrupt Enable Register

ils: ILS

0x58 - FDCAN Interrupt Line Select Register

ile: ILE

0x5c - FDCAN Interrupt Line Enable Register

gfc: GFC

0x80 - FDCAN Global Filter Configuration Register

sidfc: SIDFC

0x84 - FDCAN Standard ID Filter Configuration Register

xidfc: XIDFC

0x88 - FDCAN Extended ID Filter Configuration Register

xidam: XIDAM

0x90 - FDCAN Extended ID and Mask Register

hpms: HPMS

0x94 - FDCAN High Priority Message Status Register

ndat1: NDAT1

0x98 - FDCAN New Data 1 Register

ndat2: NDAT2

0x9c - FDCAN New Data 2 Register

rxf0c: RXF0C

0xa0 - FDCAN Rx FIFO 0 Configuration Register

rxf0s: RXF0S

0xa4 - FDCAN Rx FIFO 0 Status Register

rxf0a: RXF0A

0xa8 - CAN Rx FIFO 0 Acknowledge Register

rxbc: RXBC

0xac - FDCAN Rx Buffer Configuration Register

rxf1c: RXF1C

0xb0 - FDCAN Rx FIFO 1 Configuration Register

rxf1s: RXF1S

0xb4 - FDCAN Rx FIFO 1 Status Register

rxf1a: RXF1A

0xb8 - FDCAN Rx FIFO 1 Acknowledge Register

rxesc: RXESC

0xbc - FDCAN Rx Buffer Element Size Configuration Register

txbc: TXBC

0xc0 - FDCAN Tx Buffer Configuration Register

txfqs: TXFQS

0xc4 - FDCAN Tx FIFO/Queue Status Register

txesc: TXESC

0xc8 - FDCAN Tx Buffer Element Size Configuration Register

txbrp: TXBRP

0xcc - FDCAN Tx Buffer Request Pending Register

txbar: TXBAR

0xd0 - FDCAN Tx Buffer Add Request Register

txbcr: TXBCR

0xd4 - FDCAN Tx Buffer Cancellation Request Register

txbto: TXBTO

0xd8 - FDCAN Tx Buffer Transmission Occurred Register

txbcf: TXBCF

0xdc - FDCAN Tx Buffer Cancellation Finished Register

txbtie: TXBTIE

0xe0 - FDCAN Tx Buffer Transmission Interrupt Enable Register

txbcie: TXBCIE

0xe4 - FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register

txefc: TXEFC

0xf0 - FDCAN Tx Event FIFO Configuration Register

txefs: TXEFS

0xf4 - FDCAN Tx Event FIFO Status Register

txefa: TXEFA

0xf8 - FDCAN Tx Event FIFO Acknowledge Register

tttmc: TTTMC

0x100 - FDCAN TT Trigger Memory Configuration Register

ttrmc: TTRMC

0x104 - FDCAN TT Reference Message Configuration Register

ttocf: TTOCF

0x108 - FDCAN TT Operation Configuration Register

ttmlm: TTMLM

0x10c - FDCAN TT Matrix Limits Register

turcf: TURCF

0x110 - FDCAN TUR Configuration Register

ttocn: TTOCN

0x114 - FDCAN TT Operation Control Register

can_ttgtp: CAN_TTGTP

0x118 - FDCAN TT Global Time Preset Register

tttmk: TTTMK

0x11c - FDCAN TT Time Mark Register

ttir: TTIR

0x120 - FDCAN TT Interrupt Register

ttie: TTIE

0x124 - FDCAN TT Interrupt Enable Register

ttils: TTILS

0x128 - FDCAN TT Interrupt Line Select Register

ttost: TTOST

0x12c - FDCAN TT Operation Status Register

turna: TURNA

0x130 - FDCAN TUR Numerator Actual Register

ttlgt: TTLGT

0x134 - FDCAN TT Local and Global Time Register

ttctc: TTCTC

0x138 - FDCAN TT Cycle Time and Count Register

ttcpt: TTCPT

0x13c - FDCAN TT Capture Time Register

ttcsm: TTCSM

0x140 - FDCAN TT Cycle Sync Mark Register

ttts: TTTS

0x300 - FDCAN TT Trigger Select Register

Auto Trait Implementations

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